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MdeModulePkg/PciHostBridge: Enhance boundary check in Io/Mem.Read/Write
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Garrett Kirkendall <garrett.kirkendall@amd.com>
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@ -301,6 +301,8 @@ CreateRootBridge (
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@retval EFI_INVALID_PARAMETER Buffer is NULL.
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@retval EFI_INVALID_PARAMETER Buffer is NULL.
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@retval EFI_INVALID_PARAMETER Address or Count is invalid.
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@retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
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@retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
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@retval EFI_UNSUPPORTED The address range specified by Address, Width,
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@retval EFI_UNSUPPORTED The address range specified by Address, Width,
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@ -321,6 +323,7 @@ RootBridgeIoCheckParameter (
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UINT64 Base;
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UINT64 Base;
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UINT64 Limit;
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UINT64 Limit;
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UINT32 Size;
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UINT32 Size;
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UINT64 Length;
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//
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//
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// Check to see if Buffer is NULL
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// Check to see if Buffer is NULL
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@ -337,7 +340,7 @@ RootBridgeIoCheckParameter (
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}
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}
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//
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//
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// For FIFO type, the target address won't increase during the access,
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// For FIFO type, the device address won't increase during the access,
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// so treat Count as 1
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// so treat Count as 1
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//
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//
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if (Width >= EfiPciWidthFifoUint8 && Width <= EfiPciWidthFifoUint64) {
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if (Width >= EfiPciWidthFifoUint8 && Width <= EfiPciWidthFifoUint64) {
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@ -347,6 +350,13 @@ RootBridgeIoCheckParameter (
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Width = (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) (Width & 0x03);
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Width = (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) (Width & 0x03);
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Size = 1 << Width;
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Size = 1 << Width;
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//
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// Make sure (Count * Size) doesn't exceed MAX_UINT64
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//
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if (Count > DivU64x32 (MAX_UINT64, Size)) {
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return EFI_INVALID_PARAMETER;
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}
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//
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//
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// Check to see if Address is aligned
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// Check to see if Address is aligned
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//
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//
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@ -354,6 +364,14 @@ RootBridgeIoCheckParameter (
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return EFI_UNSUPPORTED;
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return EFI_UNSUPPORTED;
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}
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}
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//
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// Make sure (Address + Count * Size) doesn't exceed MAX_UINT64
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//
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Length = MultU64x32 (Count, Size);
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if (Address > MAX_UINT64 - Length) {
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return EFI_INVALID_PARAMETER;
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}
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RootBridge = ROOT_BRIDGE_FROM_THIS (This);
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RootBridge = ROOT_BRIDGE_FROM_THIS (This);
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//
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//
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@ -372,7 +390,7 @@ RootBridgeIoCheckParameter (
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//
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//
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// Allow Legacy IO access
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// Allow Legacy IO access
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//
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//
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if (Address + MultU64x32 (Count, Size) <= 0x1000) {
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if (Address + Length <= 0x1000) {
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if ((RootBridge->Attributes & (
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if ((RootBridge->Attributes & (
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EFI_PCI_ATTRIBUTE_ISA_IO | EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO | EFI_PCI_ATTRIBUTE_VGA_IO |
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EFI_PCI_ATTRIBUTE_ISA_IO | EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO | EFI_PCI_ATTRIBUTE_VGA_IO |
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EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO | EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO |
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EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO | EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO |
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@ -386,7 +404,7 @@ RootBridgeIoCheckParameter (
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//
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//
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// Allow Legacy MMIO access
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// Allow Legacy MMIO access
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//
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//
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if ((Address >= 0xA0000) && (Address + MultU64x32 (Count, Size)) <= 0xC0000) {
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if ((Address >= 0xA0000) && (Address + Length) <= 0xC0000) {
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if ((RootBridge->Attributes & EFI_PCI_ATTRIBUTE_VGA_MEMORY) != 0) {
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if ((RootBridge->Attributes & EFI_PCI_ATTRIBUTE_VGA_MEMORY) != 0) {
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return EFI_SUCCESS;
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return EFI_SUCCESS;
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}
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}
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@ -395,7 +413,7 @@ RootBridgeIoCheckParameter (
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// By comparing the Address against Limit we know which range to be used
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// By comparing the Address against Limit we know which range to be used
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// for checking
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// for checking
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//
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//
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if (Address + MultU64x32 (Count, Size) <= RootBridge->Mem.Limit + 1) {
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if (Address + Length <= RootBridge->Mem.Limit + 1) {
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Base = RootBridge->Mem.Base;
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Base = RootBridge->Mem.Base;
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Limit = RootBridge->Mem.Limit;
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Limit = RootBridge->Mem.Limit;
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} else {
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} else {
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@ -427,7 +445,7 @@ RootBridgeIoCheckParameter (
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return EFI_INVALID_PARAMETER;
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return EFI_INVALID_PARAMETER;
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}
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}
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if (Address + MultU64x32 (Count, Size) > Limit + 1) {
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if (Address + Length > Limit + 1) {
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return EFI_INVALID_PARAMETER;
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return EFI_INVALID_PARAMETER;
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}
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}
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