mirror of https://github.com/acidanthera/audk.git
ArmVirtPkg/FdtPciHostBridgeLib: map ECAM and I/O spaces in GCD memory map
Up until now, we have been getting away with not declaring the ECAM and translated I/O spaces at all in the GCD memory map, simply because we map the entire address space with device attributes in the early PEI code, and so the ECAM space will be mapped wherever it ends up. Now that we are about to make changes to how ArmVirtQemu reasons about the size of the address space, it would be better to get rid of this mapping of the entire address space, since it can get arbitrarily large without real benefit. So start by mapping the ECAM and translated I/O spaces explicitly, instead of relying on the early PEI mapping. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
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@ -17,6 +17,7 @@
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#include <Library/PciHostBridgeLib.h>
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#include <Library/DebugLib.h>
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#include <Library/DevicePathLib.h>
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#include <Library/DxeServicesTableLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/PcdLib.h>
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#include <Library/UefiBootServicesTableLib.h>
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@ -82,6 +83,33 @@ typedef struct {
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#define DTB_PCI_HOST_RANGE_IO BIT24
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#define DTB_PCI_HOST_RANGE_TYPEMASK (BIT31 | BIT30 | BIT29 | BIT25 | BIT24)
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STATIC
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EFI_STATUS
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MapGcdMmioSpace (
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IN UINT64 Base,
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IN UINT64 Size
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)
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{
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EFI_STATUS Status;
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Status = gDS->AddMemorySpace (EfiGcdMemoryTypeMemoryMappedIo, Base, Size,
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EFI_MEMORY_UC);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR,
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"%a: failed to add GCD memory space for region [0x%Lx+0x%Lx)\n",
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__FUNCTION__, Base, Size));
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return Status;
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}
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Status = gDS->SetMemorySpaceAttributes (Base, Size, EFI_MEMORY_UC);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR,
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"%a: failed to set memory space attributes for region [0x%Lx+0x%Lx)\n",
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__FUNCTION__, Base, Size));
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}
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return Status;
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}
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STATIC
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EFI_STATUS
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ProcessPciHost (
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@ -266,7 +294,23 @@ ProcessPciHost (
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"Io[0x%Lx+0x%Lx)@0x%Lx Mem32[0x%Lx+0x%Lx)@0x0 Mem64[0x%Lx+0x%Lx)@0x0\n",
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__FUNCTION__, ConfigBase, ConfigSize, *BusMin, *BusMax, *IoBase, *IoSize,
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IoTranslation, *Mmio32Base, *Mmio32Size, *Mmio64Base, *Mmio64Size));
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return EFI_SUCCESS;
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// Map the ECAM space in the GCD memory map
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Status = MapGcdMmioSpace (ConfigBase, ConfigSize);
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ASSERT_EFI_ERROR (Status);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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//
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// Map the MMIO window that provides I/O access - the PCI host bridge code
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// is not aware of this translation and so it will only map the I/O view
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// in the GCD I/O map.
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//
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Status = MapGcdMmioSpace (*IoBase + IoTranslation, *IoSize);
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ASSERT_EFI_ERROR (Status);
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return Status;
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}
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STATIC PCI_ROOT_BRIDGE mRootBridge;
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@ -42,6 +42,7 @@
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[LibraryClasses]
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DebugLib
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DevicePathLib
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DxeServicesTableLib
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MemoryAllocationLib
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PciPcdProducerLib
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