ArmPlatformPkg RVCT: drop dependency on GCC macro library

The RVCT .asm files include AsmMacroIoLib.h only for the definition of
LoadConstantToReg (), which makes it tedious to make change to that file
without the risk of making the RVCT assembler unhappy. So simply replace
LoadConstantToReg() with mov32, which does the right thing in all cases.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
This commit is contained in:
Ard Biesheuvel 2016-08-10 15:50:25 +02:00
parent 874883a49d
commit 66edb631f8
9 changed files with 29 additions and 66 deletions

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@ -11,7 +11,6 @@
//
//
#include <AsmMacroIoLib.h>
#include <Library/ArmLib.h>
#include <ArmPlatform.h>
@ -48,7 +47,7 @@ ArmPlatformGetCorePosition FUNCTION
ArmPlatformIsPrimaryCore FUNCTION
// Extract cpu_id and cluster_id from ARM_SCC_CFGREG48
// with cpu_id[0:3] and cluster_id[4:7]
LoadConstantToReg (ARM_CTA15A7_SCC_CFGREG48, r1)
mov32 r1, ARM_CTA15A7_SCC_CFGREG48
ldr r1, [r1]
lsr r1, #24
@ -62,7 +61,7 @@ ArmPlatformIsPrimaryCore FUNCTION
orr r1, r1, r2
// Keep the Cluster ID and Core ID from the MPID
LoadConstantToReg (ARM_CLUSTER_MASK :OR: ARM_CORE_MASK, r2)
mov32 r2, ARM_CLUSTER_MASK :OR: ARM_CORE_MASK
and r0, r0, r2
// Compare mpid and boot cpu from ARM_SCC_CFGREG48
@ -79,7 +78,7 @@ ArmPlatformIsPrimaryCore FUNCTION
ArmPlatformGetPrimaryCoreMpId FUNCTION
// Extract cpu_id and cluster_id from ARM_SCC_CFGREG48
// with cpu_id[0:3] and cluster_id[4:7]
LoadConstantToReg (ARM_CTA15A7_SCC_CFGREG48, r0)
mov32 r0, ARM_CTA15A7_SCC_CFGREG48
ldr r0, [r0]
lsr r0, #24

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@ -11,7 +11,6 @@
//
//
#include <AsmMacroIoLib.h>
#include <Library/ArmLib.h>
#include <AutoGen.h>
@ -23,9 +22,6 @@
EXPORT ArmPlatformGetPrimaryCoreMpId
EXPORT ArmPlatformGetCorePosition
IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCore
IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCoreMask
AREA CTA9x4Helper, CODE, READONLY
//UINTN
@ -33,8 +29,7 @@
// VOID
// );
ArmPlatformGetPrimaryCoreMpId FUNCTION
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
ldr r0, [r0]
mov32 r0, FixedPcdGet32(PcdArmPrimaryCore)
bx lr
ENDFUNC
@ -43,11 +38,9 @@ ArmPlatformGetPrimaryCoreMpId FUNCTION
// IN UINTN MpId
// );
ArmPlatformIsPrimaryCore FUNCTION
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
ldr r1, [r1]
mov32 r1, FixedPcdGet32(PcdArmPrimaryCoreMask)
and r0, r0, r1
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)
ldr r1, [r1]
mov32 r1, FixedPcdGet32(PcdArmPrimaryCore)
cmp r0, r1
moveq r0, #1
movne r0, #0

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@ -11,7 +11,6 @@
//
//
#include <AsmMacroIoLib.h>
#include <Base.h>
#include <Library/ArmLib.h>
#include <Library/PcdLib.h>
@ -28,9 +27,6 @@
EXPORT ArmPlatformGetPrimaryCoreMpId
EXPORT ArmPlatformGetCorePosition
IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCore
IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCoreMask
AREA RTSMHelper, CODE, READONLY
ArmPlatformPeiBootAction FUNCTION
@ -52,8 +48,7 @@ ArmGetScuBaseAddress FUNCTION
// VOID
// );
ArmPlatformGetPrimaryCoreMpId FUNCTION
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
ldr r0, [r0]
mov32 r0, FixedPcdGet32(PcdArmPrimaryCore)
bx lr
ENDFUNC
@ -99,10 +94,9 @@ _Return
// IN UINTN MpId
// );
ArmPlatformIsPrimaryCore FUNCTION
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
ldr r1, [r1]
mov32 r1, FixedPcdGet32(PcdArmPrimaryCoreMask)
and r0, r0, r1
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)
mov32 r1, FixedPcdGet32(PcdArmPrimaryCore)
ldr r1, [r1]
cmp r0, r1
moveq r0, #1

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@ -11,7 +11,6 @@
//
//
#include <AsmMacroIoLib.h>
#include <Base.h>
#include <Library/ArmPlatformLib.h>
#include <Drivers/PL35xSmc.h>
@ -90,7 +89,7 @@ ArmPlatformSecBootMemoryInit
//
// Initialize PL354 SMC
//
LoadConstantToReg (ARM_VE_SMC_CTRL_BASE, r1)
mov32 r1, ARM_VE_SMC_CTRL_BASE
ldr r2, =VersatileExpressSmcConfiguration
ldr r3, =VersatileExpressSmcConfigurationEnd
blx PL35xSmcInitialize
@ -98,7 +97,7 @@ ArmPlatformSecBootMemoryInit
//
// Page mode setup for VRAM
//
LoadConstantToReg (VRAM_MOTHERBOARD_BASE, r2)
mov32 r2, VRAM_MOTHERBOARD_BASE
// Read current state
ldr r0, [r2, #0]

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@ -11,7 +11,6 @@
//
//
#include <AsmMacroIoLib.h>
#include <Library/ArmLib.h>
INCLUDE AsmMacroIoLib.inc
@ -47,8 +46,7 @@ ArmPlatformGetCorePosition FUNCTION
// VOID
// );
ArmPlatformGetPrimaryCoreMpId FUNCTION
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
ldr r0, [r0]
mov32 r0, FixedPcdGet32(PcdArmPrimaryCore)
bx lr
ENDFUNC
@ -57,11 +55,9 @@ ArmPlatformGetPrimaryCoreMpId FUNCTION
// IN UINTN MpId
// );
ArmPlatformIsPrimaryCore FUNCTION
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
ldr r1, [r1]
mov32 r1, FixedPcdGet32(PcdArmPrimaryCoreMask)
and r0, r0, r1
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)
ldr r1, [r1]
mov32 r1, FixedPcdGet32(PcdArmPrimaryCore)
cmp r0, r1
moveq r0, #1
movne r0, #0

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@ -11,8 +11,6 @@
//
//
#include <AsmMacroIoLib.h>
#include <Base.h>
#include <AutoGen.h>
INCLUDE AsmMacroIoLib.inc
@ -79,8 +77,7 @@ ArmPlatformStackSetPrimary FUNCTION
add r0, r0, r2
// Compute SecondaryCoresCount * SecondaryCoreStackSize
LoadConstantToReg (_gPcd_FixedAtBuild_PcdCoreCount, r1)
ldr r1, [r1]
mov32 r1, FixedPcdGet32 (PcdCoreCount)
sub r1, #1
mul r3, r3, r1

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@ -11,8 +11,6 @@
//
//
#include <AsmMacroIoLib.h>
#include <Base.h>
#include <AutoGen.h>
IMPORT PeiCommonExceptionEntry

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@ -11,9 +11,6 @@
//
//
#include <AsmMacroIoLib.h>
#include <Base.h>
#include <Library/PcdLib.h>
#include <AutoGen.h>
INCLUDE AsmMacroIoLib.inc
@ -43,9 +40,7 @@ _ModuleEntryPoint
bl ArmPlatformIsPrimaryCore
// Get the top of the primary stacks (and the base of the secondary stacks)
LoadConstantToReg (FixedPcdGet64(PcdCPUCoresStackBase), r1)
LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
add r1, r1, r2
mov32 r1, FixedPcdGet64(PcdCPUCoresStackBase) + FixedPcdGet32(PcdCPUCorePrimaryStackSize)
// r0 is equal to 1 if I am the primary core
cmp r0, #1
@ -62,16 +57,15 @@ _SetupSecondaryCoreStack
add r0, r0, #1
// StackOffset = CorePos * StackSize
LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r2)
mov32 r2, FixedPcdGet32(PcdCPUCoreSecondaryStackSize)
mul r0, r0, r2
// SP = StackBase + StackOffset
add sp, r6, r0
_PrepareArguments
// The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
LoadConstantToReg (FixedPcdGet32(PcdFvBaseAddress), r2)
add r2, r2, #4
ldr r1, [r2]
mov32 r2, FixedPcdGet32(PcdFvBaseAddress)
ldr r1, [r2, #4]
// Move sec startup address into a data register
// Ensure we're jumping to FV version of the code (not boot remapped alias)

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@ -11,11 +11,7 @@
//
//
#include <AsmMacroIoLib.h>
#include <Base.h>
#include <Library/PcdLib.h>
#include <AutoGen.h>
#include <Chipset/ArmV7.h>
INCLUDE AsmMacroIoLib.inc
@ -59,8 +55,8 @@ _SystemMemoryEndInit
cmp r1, #0
bne _SetupStackPosition
LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryBase), r1)
LoadConstantToReg (FixedPcdGet32(PcdSystemMemorySize), r2)
mov32 r1, FixedPcdGet32(PcdSystemMemoryBase)
mov32 r2, FixedPcdGet32(PcdSystemMemorySize)
sub r2, r2, #1
add r1, r1, r2
// Update the global variable
@ -71,13 +67,13 @@ _SetupStackPosition
// r1 = SystemMemoryTop
// Calculate Top of the Firmware Device
LoadConstantToReg (FixedPcdGet32(PcdFdBaseAddress), r2)
LoadConstantToReg (FixedPcdGet32(PcdFdSize), r3)
mov32 r2, FixedPcdGet32(PcdFdBaseAddress)
mov32 r3, FixedPcdGet32(PcdFdSize)
sub r3, r3, #1
add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize
// UEFI Memory Size (stacks are allocated in this region)
LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)
mov32 r4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize)
//
// Reserve the memory for the UEFI region (contain stacks on its top)
@ -108,7 +104,7 @@ _SetupAlignedStack
_SetupOverflowStack
// Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE
// aligned (4KB)
LoadConstantToReg (EFI_PAGE_MASK, r9)
mov32 r9, EFI_PAGE_MASK
and r9, r9, r1
sub r1, r1, r9
@ -119,22 +115,19 @@ _GetBaseUefiMemory
_GetStackBase
// r1 = The top of the Mpcore Stacks
// Stack for the primary core = PrimaryCoreStack
LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
mov32 r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize)
sub r10, r1, r2
// Stack for the secondary core = Number of Cores - 1
LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)
sub r0, r0, #1
LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)
mul r1, r1, r0
mov32 r1, (FixedPcdGet32(PcdCoreCount) - 1) * FixedPcdGet32(PcdCPUCoreSecondaryStackSize)
sub r10, r10, r1
// r10 = The base of the MpCore Stacks (primary stack & secondary stacks)
mov r0, r10
mov r1, r8
//ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)
LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)
mov32 r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize)
mov32 r3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize)
bl ArmPlatformStackSet
// Is it the Primary Core ?