mirror of https://github.com/acidanthera/audk.git
ArmPlatformPkg RVCT: drop dependency on GCC macro library
The RVCT .asm files include AsmMacroIoLib.h only for the definition of LoadConstantToReg (), which makes it tedious to make change to that file without the risk of making the RVCT assembler unhappy. So simply replace LoadConstantToReg() with mov32, which does the right thing in all cases. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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@ -11,7 +11,6 @@
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//
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//
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#include <AsmMacroIoLib.h>
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#include <Library/ArmLib.h>
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#include <ArmPlatform.h>
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@ -48,7 +47,7 @@ ArmPlatformGetCorePosition FUNCTION
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ArmPlatformIsPrimaryCore FUNCTION
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// Extract cpu_id and cluster_id from ARM_SCC_CFGREG48
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// with cpu_id[0:3] and cluster_id[4:7]
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LoadConstantToReg (ARM_CTA15A7_SCC_CFGREG48, r1)
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mov32 r1, ARM_CTA15A7_SCC_CFGREG48
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ldr r1, [r1]
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lsr r1, #24
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@ -62,7 +61,7 @@ ArmPlatformIsPrimaryCore FUNCTION
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orr r1, r1, r2
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// Keep the Cluster ID and Core ID from the MPID
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LoadConstantToReg (ARM_CLUSTER_MASK :OR: ARM_CORE_MASK, r2)
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mov32 r2, ARM_CLUSTER_MASK :OR: ARM_CORE_MASK
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and r0, r0, r2
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// Compare mpid and boot cpu from ARM_SCC_CFGREG48
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@ -79,7 +78,7 @@ ArmPlatformIsPrimaryCore FUNCTION
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ArmPlatformGetPrimaryCoreMpId FUNCTION
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// Extract cpu_id and cluster_id from ARM_SCC_CFGREG48
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// with cpu_id[0:3] and cluster_id[4:7]
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LoadConstantToReg (ARM_CTA15A7_SCC_CFGREG48, r0)
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mov32 r0, ARM_CTA15A7_SCC_CFGREG48
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ldr r0, [r0]
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lsr r0, #24
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@ -11,7 +11,6 @@
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//
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//
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#include <AsmMacroIoLib.h>
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#include <Library/ArmLib.h>
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#include <AutoGen.h>
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@ -23,9 +22,6 @@
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EXPORT ArmPlatformGetPrimaryCoreMpId
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EXPORT ArmPlatformGetCorePosition
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IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCore
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IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCoreMask
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AREA CTA9x4Helper, CODE, READONLY
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//UINTN
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@ -33,8 +29,7 @@
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// VOID
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// );
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ArmPlatformGetPrimaryCoreMpId FUNCTION
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LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
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ldr r0, [r0]
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mov32 r0, FixedPcdGet32(PcdArmPrimaryCore)
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bx lr
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ENDFUNC
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@ -43,11 +38,9 @@ ArmPlatformGetPrimaryCoreMpId FUNCTION
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// IN UINTN MpId
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// );
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ArmPlatformIsPrimaryCore FUNCTION
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LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
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ldr r1, [r1]
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mov32 r1, FixedPcdGet32(PcdArmPrimaryCoreMask)
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and r0, r0, r1
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LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)
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ldr r1, [r1]
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mov32 r1, FixedPcdGet32(PcdArmPrimaryCore)
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cmp r0, r1
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moveq r0, #1
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movne r0, #0
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@ -11,7 +11,6 @@
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//
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//
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#include <AsmMacroIoLib.h>
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#include <Base.h>
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#include <Library/ArmLib.h>
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#include <Library/PcdLib.h>
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@ -28,9 +27,6 @@
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EXPORT ArmPlatformGetPrimaryCoreMpId
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EXPORT ArmPlatformGetCorePosition
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IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCore
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IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCoreMask
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AREA RTSMHelper, CODE, READONLY
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ArmPlatformPeiBootAction FUNCTION
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@ -52,8 +48,7 @@ ArmGetScuBaseAddress FUNCTION
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// VOID
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// );
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ArmPlatformGetPrimaryCoreMpId FUNCTION
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LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
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ldr r0, [r0]
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mov32 r0, FixedPcdGet32(PcdArmPrimaryCore)
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bx lr
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ENDFUNC
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@ -99,10 +94,9 @@ _Return
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// IN UINTN MpId
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// );
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ArmPlatformIsPrimaryCore FUNCTION
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LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
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ldr r1, [r1]
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mov32 r1, FixedPcdGet32(PcdArmPrimaryCoreMask)
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and r0, r0, r1
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LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)
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mov32 r1, FixedPcdGet32(PcdArmPrimaryCore)
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ldr r1, [r1]
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cmp r0, r1
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moveq r0, #1
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@ -11,7 +11,6 @@
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//
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//
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#include <AsmMacroIoLib.h>
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#include <Base.h>
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#include <Library/ArmPlatformLib.h>
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#include <Drivers/PL35xSmc.h>
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@ -90,7 +89,7 @@ ArmPlatformSecBootMemoryInit
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//
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// Initialize PL354 SMC
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//
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LoadConstantToReg (ARM_VE_SMC_CTRL_BASE, r1)
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mov32 r1, ARM_VE_SMC_CTRL_BASE
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ldr r2, =VersatileExpressSmcConfiguration
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ldr r3, =VersatileExpressSmcConfigurationEnd
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blx PL35xSmcInitialize
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@ -98,7 +97,7 @@ ArmPlatformSecBootMemoryInit
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//
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// Page mode setup for VRAM
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//
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LoadConstantToReg (VRAM_MOTHERBOARD_BASE, r2)
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mov32 r2, VRAM_MOTHERBOARD_BASE
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// Read current state
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ldr r0, [r2, #0]
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@ -11,7 +11,6 @@
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//
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//
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#include <AsmMacroIoLib.h>
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#include <Library/ArmLib.h>
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INCLUDE AsmMacroIoLib.inc
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@ -47,8 +46,7 @@ ArmPlatformGetCorePosition FUNCTION
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// VOID
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// );
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ArmPlatformGetPrimaryCoreMpId FUNCTION
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LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
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ldr r0, [r0]
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mov32 r0, FixedPcdGet32(PcdArmPrimaryCore)
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bx lr
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ENDFUNC
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@ -57,11 +55,9 @@ ArmPlatformGetPrimaryCoreMpId FUNCTION
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// IN UINTN MpId
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// );
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ArmPlatformIsPrimaryCore FUNCTION
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LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
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ldr r1, [r1]
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mov32 r1, FixedPcdGet32(PcdArmPrimaryCoreMask)
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and r0, r0, r1
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LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)
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ldr r1, [r1]
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mov32 r1, FixedPcdGet32(PcdArmPrimaryCore)
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cmp r0, r1
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moveq r0, #1
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movne r0, #0
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@ -11,8 +11,6 @@
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//
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//
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#include <AsmMacroIoLib.h>
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#include <Base.h>
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#include <AutoGen.h>
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INCLUDE AsmMacroIoLib.inc
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@ -79,8 +77,7 @@ ArmPlatformStackSetPrimary FUNCTION
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add r0, r0, r2
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// Compute SecondaryCoresCount * SecondaryCoreStackSize
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LoadConstantToReg (_gPcd_FixedAtBuild_PcdCoreCount, r1)
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ldr r1, [r1]
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mov32 r1, FixedPcdGet32 (PcdCoreCount)
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sub r1, #1
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mul r3, r3, r1
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@ -11,8 +11,6 @@
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//
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//
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#include <AsmMacroIoLib.h>
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#include <Base.h>
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#include <AutoGen.h>
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IMPORT PeiCommonExceptionEntry
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@ -11,9 +11,6 @@
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//
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//
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#include <AsmMacroIoLib.h>
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#include <Base.h>
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#include <Library/PcdLib.h>
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#include <AutoGen.h>
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INCLUDE AsmMacroIoLib.inc
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@ -43,9 +40,7 @@ _ModuleEntryPoint
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bl ArmPlatformIsPrimaryCore
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// Get the top of the primary stacks (and the base of the secondary stacks)
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LoadConstantToReg (FixedPcdGet64(PcdCPUCoresStackBase), r1)
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LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
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add r1, r1, r2
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mov32 r1, FixedPcdGet64(PcdCPUCoresStackBase) + FixedPcdGet32(PcdCPUCorePrimaryStackSize)
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// r0 is equal to 1 if I am the primary core
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cmp r0, #1
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@ -62,16 +57,15 @@ _SetupSecondaryCoreStack
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add r0, r0, #1
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// StackOffset = CorePos * StackSize
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r2)
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mov32 r2, FixedPcdGet32(PcdCPUCoreSecondaryStackSize)
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mul r0, r0, r2
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// SP = StackBase + StackOffset
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add sp, r6, r0
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_PrepareArguments
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// The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
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LoadConstantToReg (FixedPcdGet32(PcdFvBaseAddress), r2)
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add r2, r2, #4
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ldr r1, [r2]
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mov32 r2, FixedPcdGet32(PcdFvBaseAddress)
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ldr r1, [r2, #4]
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// Move sec startup address into a data register
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// Ensure we're jumping to FV version of the code (not boot remapped alias)
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@ -11,11 +11,7 @@
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//
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//
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#include <AsmMacroIoLib.h>
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#include <Base.h>
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#include <Library/PcdLib.h>
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#include <AutoGen.h>
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#include <Chipset/ArmV7.h>
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INCLUDE AsmMacroIoLib.inc
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@ -59,8 +55,8 @@ _SystemMemoryEndInit
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cmp r1, #0
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bne _SetupStackPosition
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LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryBase), r1)
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LoadConstantToReg (FixedPcdGet32(PcdSystemMemorySize), r2)
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mov32 r1, FixedPcdGet32(PcdSystemMemoryBase)
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mov32 r2, FixedPcdGet32(PcdSystemMemorySize)
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sub r2, r2, #1
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add r1, r1, r2
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// Update the global variable
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@ -71,13 +67,13 @@ _SetupStackPosition
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// r1 = SystemMemoryTop
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// Calculate Top of the Firmware Device
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LoadConstantToReg (FixedPcdGet32(PcdFdBaseAddress), r2)
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LoadConstantToReg (FixedPcdGet32(PcdFdSize), r3)
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mov32 r2, FixedPcdGet32(PcdFdBaseAddress)
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mov32 r3, FixedPcdGet32(PcdFdSize)
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sub r3, r3, #1
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add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize
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// UEFI Memory Size (stacks are allocated in this region)
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LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)
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mov32 r4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize)
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//
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// Reserve the memory for the UEFI region (contain stacks on its top)
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@ -108,7 +104,7 @@ _SetupAlignedStack
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_SetupOverflowStack
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// Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE
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// aligned (4KB)
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LoadConstantToReg (EFI_PAGE_MASK, r9)
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mov32 r9, EFI_PAGE_MASK
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and r9, r9, r1
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sub r1, r1, r9
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@ -119,22 +115,19 @@ _GetBaseUefiMemory
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_GetStackBase
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// r1 = The top of the Mpcore Stacks
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// Stack for the primary core = PrimaryCoreStack
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LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
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mov32 r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize)
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sub r10, r1, r2
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// Stack for the secondary core = Number of Cores - 1
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LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)
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sub r0, r0, #1
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)
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mul r1, r1, r0
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mov32 r1, (FixedPcdGet32(PcdCoreCount) - 1) * FixedPcdGet32(PcdCPUCoreSecondaryStackSize)
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sub r10, r10, r1
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// r10 = The base of the MpCore Stacks (primary stack & secondary stacks)
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mov r0, r10
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mov r1, r8
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//ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)
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LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)
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mov32 r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize)
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mov32 r3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize)
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bl ArmPlatformStackSet
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// Is it the Primary Core ?
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