UefiPayloadPkg: Move FADT check to consumer coode.

ACPI FADT HW register interface fields are
optional but current UPL common entry code made it
as mandatory which caused compatibility issue on
some platforms.

Solution is to move those FADT HW register fields
check code to consumer code so only ASSERT when
those fields are consumed with error.

Currently only AcpiTimerLib and ResetSystemLib
consuming those register fields so if platforms
configured UPL to different library instances the
FADT HW register fields are not consumed thus will
not cause ASSERT.

Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
This commit is contained in:
Chasel Chiu 2024-09-12 15:42:41 -07:00 committed by mergify[bot]
parent 7843c8da06
commit 670e263419
3 changed files with 7 additions and 9 deletions

View File

@ -47,6 +47,7 @@ AcpiTimerLibConstructor (
pAcpiBoardInfo = (ACPI_BOARD_INFO *)GET_GUID_HOB_DATA (GuidHob);
mPmTimerReg = (UINTN)pAcpiBoardInfo->PmTimerRegBase;
ASSERT (pAcpiBoardInfo->PmTimerRegBase != 0);
return EFI_SUCCESS;
}

View File

@ -40,6 +40,12 @@ ResetSystemLibConstructor (
AcpiBoardInfoPtr = (ACPI_BOARD_INFO *)GET_GUID_HOB_DATA (GuidHob);
CopyMem (&mAcpiBoardInfo, AcpiBoardInfoPtr, sizeof (ACPI_BOARD_INFO));
ASSERT (mAcpiBoardInfo.ResetRegAddress != 0);
ASSERT (mAcpiBoardInfo.ResetValue != 0);
ASSERT (mAcpiBoardInfo.PmGpeEnBase != 0);
ASSERT (mAcpiBoardInfo.PmEvtBase != 0);
ASSERT (mAcpiBoardInfo.PmCtrlRegBase != 0);
return EFI_SUCCESS;
}

View File

@ -125,15 +125,6 @@ Done:
DEBUG ((DEBUG_INFO, "PcieBaseAddr 0x%lx\n", AcpiBoardInfo->PcieBaseAddress));
DEBUG ((DEBUG_INFO, "PcieBaseSize 0x%lx\n", AcpiBoardInfo->PcieBaseSize));
//
// Verify values for proper operation
//
// ASSERT (Fadt->Pm1aCntBlk != 0);
// ASSERT (Fadt->PmTmrBlk != 0);
// ASSERT (Fadt->ResetReg.Address != 0);
// ASSERT (Fadt->Pm1aEvtBlk != 0);
// ASSERT (Fadt->Gpe0Blk != 0);
return RETURN_SUCCESS;
}