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OvmfPkg: remove 8259InterruptControllerDxe
8259InterruptControllerDxe is not used by any platforms at this point, remove it. This patch removes mentions of the following CSM resources from the source code: - GUIDs (protocols or otherwise): - gEfiLegacy8259ProtocolGuid - headers: - Protocol/Legacy8259.h - PCDs: - Pcd8259LegacyModeEdgeLevel - Pcd8259LegacyModeMask which extends the list of resources scheduled for removal to: - GUIDs (protocols or otherwise): - gEfiLegacy8259ProtocolGuid - headers: - Protocol/Legacy8259.h - PCDs: - Pcd8259LegacyModeEdgeLevel - Pcd8259LegacyModeMask Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=4588 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20231110235820.644381-35-lersek@redhat.com> Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Acked-by: Corvin Köhne <corvink@FreeBSD.org> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
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@ -1,622 +0,0 @@
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/** @file
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This contains the installation function for the driver.
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Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include "8259.h"
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//
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// Global for the Legacy 8259 Protocol that is produced by this driver
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//
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EFI_LEGACY_8259_PROTOCOL mInterrupt8259 = {
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Interrupt8259SetVectorBase,
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Interrupt8259GetMask,
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Interrupt8259SetMask,
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Interrupt8259SetMode,
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Interrupt8259GetVector,
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Interrupt8259EnableIrq,
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Interrupt8259DisableIrq,
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Interrupt8259GetInterruptLine,
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Interrupt8259EndOfInterrupt
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};
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//
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// Global for the handle that the Legacy 8259 Protocol is installed
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//
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EFI_HANDLE m8259Handle = NULL;
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UINT8 mMasterBase = 0xff;
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UINT8 mSlaveBase = 0xff;
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EFI_8259_MODE mMode = Efi8259ProtectedMode;
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UINT16 mProtectedModeMask = 0xffff;
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UINT16 mLegacyModeMask;
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UINT16 mProtectedModeEdgeLevel = 0x0000;
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UINT16 mLegacyModeEdgeLevel;
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//
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// Worker Functions
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//
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/**
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Write to mask and edge/level triggered registers of master and slave PICs.
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@param[in] Mask low byte for master PIC mask register,
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high byte for slave PIC mask register.
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@param[in] EdgeLevel low byte for master PIC edge/level triggered register,
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high byte for slave PIC edge/level triggered register.
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**/
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VOID
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Interrupt8259WriteMask (
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IN UINT16 Mask,
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IN UINT16 EdgeLevel
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)
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{
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IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, (UINT8)Mask);
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IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, (UINT8)(Mask >> 8));
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IoWrite8 (LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_MASTER, (UINT8)EdgeLevel);
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IoWrite8 (LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_SLAVE, (UINT8)(EdgeLevel >> 8));
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}
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/**
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Read from mask and edge/level triggered registers of master and slave PICs.
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@param[out] Mask low byte for master PIC mask register,
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high byte for slave PIC mask register.
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@param[out] EdgeLevel low byte for master PIC edge/level triggered register,
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high byte for slave PIC edge/level triggered register.
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**/
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VOID
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Interrupt8259ReadMask (
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OUT UINT16 *Mask,
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OUT UINT16 *EdgeLevel
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)
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{
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UINT16 MasterValue;
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UINT16 SlaveValue;
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if (Mask != NULL) {
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MasterValue = IoRead8 (LEGACY_8259_MASK_REGISTER_MASTER);
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SlaveValue = IoRead8 (LEGACY_8259_MASK_REGISTER_SLAVE);
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*Mask = (UINT16)(MasterValue | (SlaveValue << 8));
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}
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if (EdgeLevel != NULL) {
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MasterValue = IoRead8 (LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_MASTER);
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SlaveValue = IoRead8 (LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_SLAVE);
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*EdgeLevel = (UINT16)(MasterValue | (SlaveValue << 8));
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}
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}
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//
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// Legacy 8259 Protocol Interface Functions
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//
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/**
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Sets the base address for the 8259 master and slave PICs.
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@param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
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@param[in] MasterBase Interrupt vectors for IRQ0-IRQ7.
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@param[in] SlaveBase Interrupt vectors for IRQ8-IRQ15.
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@retval EFI_SUCCESS The 8259 PIC was programmed successfully.
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@retval EFI_DEVICE_ERROR There was an error while writing to the 8259 PIC.
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**/
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EFI_STATUS
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EFIAPI
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Interrupt8259SetVectorBase (
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IN EFI_LEGACY_8259_PROTOCOL *This,
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IN UINT8 MasterBase,
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IN UINT8 SlaveBase
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)
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{
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UINT8 Mask;
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EFI_TPL OriginalTpl;
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OriginalTpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);
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//
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// Set vector base for slave PIC
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//
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if (SlaveBase != mSlaveBase) {
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mSlaveBase = SlaveBase;
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//
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// Initialization sequence is needed for setting vector base.
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//
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//
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// Preserve interrtup mask register before initialization sequence
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// because it will be cleared during initialization
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//
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Mask = IoRead8 (LEGACY_8259_MASK_REGISTER_SLAVE);
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//
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// ICW1: cascade mode, ICW4 write required
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//
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IoWrite8 (LEGACY_8259_CONTROL_REGISTER_SLAVE, 0x11);
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//
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// ICW2: new vector base (must be multiple of 8)
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//
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IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, mSlaveBase);
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//
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// ICW3: slave indentification code must be 2
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//
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IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0x02);
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//
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// ICW4: fully nested mode, non-buffered mode, normal EOI, IA processor
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//
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IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0x01);
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//
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// Restore interrupt mask register
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//
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IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, Mask);
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}
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//
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// Set vector base for master PIC
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//
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if (MasterBase != mMasterBase) {
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mMasterBase = MasterBase;
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//
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// Initialization sequence is needed for setting vector base.
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//
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//
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// Preserve interrtup mask register before initialization sequence
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// because it will be cleared during initialization
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//
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Mask = IoRead8 (LEGACY_8259_MASK_REGISTER_MASTER);
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//
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// ICW1: cascade mode, ICW4 write required
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//
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IoWrite8 (LEGACY_8259_CONTROL_REGISTER_MASTER, 0x11);
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//
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// ICW2: new vector base (must be multiple of 8)
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//
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IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, mMasterBase);
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//
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// ICW3: slave PIC is cascaded on IRQ2
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//
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IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0x04);
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//
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// ICW4: fully nested mode, non-buffered mode, normal EOI, IA processor
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//
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IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0x01);
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//
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// Restore interrupt mask register
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//
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IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, Mask);
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}
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IoWrite8 (LEGACY_8259_CONTROL_REGISTER_SLAVE, LEGACY_8259_EOI);
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IoWrite8 (LEGACY_8259_CONTROL_REGISTER_MASTER, LEGACY_8259_EOI);
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gBS->RestoreTPL (OriginalTpl);
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return EFI_SUCCESS;
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}
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/**
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Gets the current 16-bit real mode and 32-bit protected-mode IRQ masks.
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@param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
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@param[out] LegacyMask 16-bit mode interrupt mask for IRQ0-IRQ15.
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@param[out] LegacyEdgeLevel 16-bit mode edge/level mask for IRQ-IRQ15.
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@param[out] ProtectedMask 32-bit mode interrupt mask for IRQ0-IRQ15.
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@param[out] ProtectedEdgeLevel 32-bit mode edge/level mask for IRQ0-IRQ15.
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@retval EFI_SUCCESS The 8259 PIC was programmed successfully.
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@retval EFI_DEVICE_ERROR There was an error while reading the 8259 PIC.
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**/
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EFI_STATUS
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EFIAPI
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Interrupt8259GetMask (
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IN EFI_LEGACY_8259_PROTOCOL *This,
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OUT UINT16 *LegacyMask OPTIONAL,
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OUT UINT16 *LegacyEdgeLevel OPTIONAL,
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OUT UINT16 *ProtectedMask OPTIONAL,
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OUT UINT16 *ProtectedEdgeLevel OPTIONAL
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)
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{
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if (LegacyMask != NULL) {
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*LegacyMask = mLegacyModeMask;
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}
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if (LegacyEdgeLevel != NULL) {
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*LegacyEdgeLevel = mLegacyModeEdgeLevel;
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}
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if (ProtectedMask != NULL) {
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*ProtectedMask = mProtectedModeMask;
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}
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if (ProtectedEdgeLevel != NULL) {
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*ProtectedEdgeLevel = mProtectedModeEdgeLevel;
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}
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return EFI_SUCCESS;
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}
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/**
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Sets the current 16-bit real mode and 32-bit protected-mode IRQ masks.
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@param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
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@param[in] LegacyMask 16-bit mode interrupt mask for IRQ0-IRQ15.
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@param[in] LegacyEdgeLevel 16-bit mode edge/level mask for IRQ-IRQ15.
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@param[in] ProtectedMask 32-bit mode interrupt mask for IRQ0-IRQ15.
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@param[in] ProtectedEdgeLevel 32-bit mode edge/level mask for IRQ0-IRQ15.
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@retval EFI_SUCCESS The 8259 PIC was programmed successfully.
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@retval EFI_DEVICE_ERROR There was an error while writing the 8259 PIC.
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**/
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EFI_STATUS
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EFIAPI
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Interrupt8259SetMask (
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IN EFI_LEGACY_8259_PROTOCOL *This,
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IN UINT16 *LegacyMask OPTIONAL,
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IN UINT16 *LegacyEdgeLevel OPTIONAL,
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IN UINT16 *ProtectedMask OPTIONAL,
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IN UINT16 *ProtectedEdgeLevel OPTIONAL
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)
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{
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if (LegacyMask != NULL) {
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mLegacyModeMask = *LegacyMask;
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}
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if (LegacyEdgeLevel != NULL) {
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mLegacyModeEdgeLevel = *LegacyEdgeLevel;
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}
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if (ProtectedMask != NULL) {
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mProtectedModeMask = *ProtectedMask;
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}
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if (ProtectedEdgeLevel != NULL) {
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mProtectedModeEdgeLevel = *ProtectedEdgeLevel;
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}
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return EFI_SUCCESS;
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}
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/**
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Sets the mode of the PICs.
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@param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
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@param[in] Mode 16-bit real or 32-bit protected mode.
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@param[in] Mask The value with which to set the interrupt mask.
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@param[in] EdgeLevel The value with which to set the edge/level mask.
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@retval EFI_SUCCESS The mode was set successfully.
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@retval EFI_INVALID_PARAMETER The mode was not set.
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**/
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EFI_STATUS
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EFIAPI
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Interrupt8259SetMode (
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IN EFI_LEGACY_8259_PROTOCOL *This,
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IN EFI_8259_MODE Mode,
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IN UINT16 *Mask OPTIONAL,
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IN UINT16 *EdgeLevel OPTIONAL
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)
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{
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if (Mode == mMode) {
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return EFI_SUCCESS;
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}
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if (Mode == Efi8259LegacyMode) {
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//
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// In Efi8259ProtectedMode, mask and edge/level trigger registers should
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// be changed through this protocol, so we can track them in the
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// corresponding module variables.
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//
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Interrupt8259ReadMask (&mProtectedModeMask, &mProtectedModeEdgeLevel);
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if (Mask != NULL) {
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//
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// Update the Mask for the new mode
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//
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mLegacyModeMask = *Mask;
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}
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if (EdgeLevel != NULL) {
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//
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// Update the Edge/Level triggered mask for the new mode
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//
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mLegacyModeEdgeLevel = *EdgeLevel;
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}
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mMode = Mode;
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//
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// Write new legacy mode mask/trigger level
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//
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Interrupt8259WriteMask (mLegacyModeMask, mLegacyModeEdgeLevel);
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return EFI_SUCCESS;
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}
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if (Mode == Efi8259ProtectedMode) {
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//
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// Save the legacy mode mask/trigger level
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//
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Interrupt8259ReadMask (&mLegacyModeMask, &mLegacyModeEdgeLevel);
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//
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// Always force Timer to be enabled after return from 16-bit code.
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// This always insures that on next entry, timer is counting.
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//
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mLegacyModeMask &= 0xFFFE;
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if (Mask != NULL) {
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//
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// Update the Mask for the new mode
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//
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mProtectedModeMask = *Mask;
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}
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if (EdgeLevel != NULL) {
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//
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// Update the Edge/Level triggered mask for the new mode
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//
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mProtectedModeEdgeLevel = *EdgeLevel;
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}
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mMode = Mode;
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//
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// Write new protected mode mask/trigger level
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//
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|
||||||
Interrupt8259WriteMask (mProtectedModeMask, mProtectedModeEdgeLevel);
|
|
||||||
|
|
||||||
return EFI_SUCCESS;
|
|
||||||
}
|
|
||||||
|
|
||||||
return EFI_INVALID_PARAMETER;
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
Translates the IRQ into a vector.
|
|
||||||
|
|
||||||
@param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
|
|
||||||
@param[in] Irq IRQ0-IRQ15.
|
|
||||||
@param[out] Vector The vector that is assigned to the IRQ.
|
|
||||||
|
|
||||||
@retval EFI_SUCCESS The Vector that matches Irq was returned.
|
|
||||||
@retval EFI_INVALID_PARAMETER Irq is not valid.
|
|
||||||
|
|
||||||
**/
|
|
||||||
EFI_STATUS
|
|
||||||
EFIAPI
|
|
||||||
Interrupt8259GetVector (
|
|
||||||
IN EFI_LEGACY_8259_PROTOCOL *This,
|
|
||||||
IN EFI_8259_IRQ Irq,
|
|
||||||
OUT UINT8 *Vector
|
|
||||||
)
|
|
||||||
{
|
|
||||||
if ((UINT32)Irq > Efi8259Irq15) {
|
|
||||||
return EFI_INVALID_PARAMETER;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (Irq <= Efi8259Irq7) {
|
|
||||||
*Vector = (UINT8)(mMasterBase + Irq);
|
|
||||||
} else {
|
|
||||||
*Vector = (UINT8)(mSlaveBase + (Irq - Efi8259Irq8));
|
|
||||||
}
|
|
||||||
|
|
||||||
return EFI_SUCCESS;
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
Enables the specified IRQ.
|
|
||||||
|
|
||||||
@param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
|
|
||||||
@param[in] Irq IRQ0-IRQ15.
|
|
||||||
@param[in] LevelTriggered 0 = Edge triggered; 1 = Level triggered.
|
|
||||||
|
|
||||||
@retval EFI_SUCCESS The Irq was enabled on the 8259 PIC.
|
|
||||||
@retval EFI_INVALID_PARAMETER The Irq is not valid.
|
|
||||||
|
|
||||||
**/
|
|
||||||
EFI_STATUS
|
|
||||||
EFIAPI
|
|
||||||
Interrupt8259EnableIrq (
|
|
||||||
IN EFI_LEGACY_8259_PROTOCOL *This,
|
|
||||||
IN EFI_8259_IRQ Irq,
|
|
||||||
IN BOOLEAN LevelTriggered
|
|
||||||
)
|
|
||||||
{
|
|
||||||
if ((UINT32)Irq > Efi8259Irq15) {
|
|
||||||
return EFI_INVALID_PARAMETER;
|
|
||||||
}
|
|
||||||
|
|
||||||
mProtectedModeMask = (UINT16)(mProtectedModeMask & ~(1 << Irq));
|
|
||||||
if (LevelTriggered) {
|
|
||||||
mProtectedModeEdgeLevel = (UINT16)(mProtectedModeEdgeLevel | (1 << Irq));
|
|
||||||
} else {
|
|
||||||
mProtectedModeEdgeLevel = (UINT16)(mProtectedModeEdgeLevel & ~(1 << Irq));
|
|
||||||
}
|
|
||||||
|
|
||||||
Interrupt8259WriteMask (mProtectedModeMask, mProtectedModeEdgeLevel);
|
|
||||||
|
|
||||||
return EFI_SUCCESS;
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
Disables the specified IRQ.
|
|
||||||
|
|
||||||
@param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
|
|
||||||
@param[in] Irq IRQ0-IRQ15.
|
|
||||||
|
|
||||||
@retval EFI_SUCCESS The Irq was disabled on the 8259 PIC.
|
|
||||||
@retval EFI_INVALID_PARAMETER The Irq is not valid.
|
|
||||||
|
|
||||||
**/
|
|
||||||
EFI_STATUS
|
|
||||||
EFIAPI
|
|
||||||
Interrupt8259DisableIrq (
|
|
||||||
IN EFI_LEGACY_8259_PROTOCOL *This,
|
|
||||||
IN EFI_8259_IRQ Irq
|
|
||||||
)
|
|
||||||
{
|
|
||||||
if ((UINT32)Irq > Efi8259Irq15) {
|
|
||||||
return EFI_INVALID_PARAMETER;
|
|
||||||
}
|
|
||||||
|
|
||||||
mProtectedModeMask = (UINT16)(mProtectedModeMask | (1 << Irq));
|
|
||||||
|
|
||||||
mProtectedModeEdgeLevel = (UINT16)(mProtectedModeEdgeLevel & ~(1 << Irq));
|
|
||||||
|
|
||||||
Interrupt8259WriteMask (mProtectedModeMask, mProtectedModeEdgeLevel);
|
|
||||||
|
|
||||||
return EFI_SUCCESS;
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
Reads the PCI configuration space to get the interrupt number that is assigned to the card.
|
|
||||||
|
|
||||||
@param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
|
|
||||||
@param[in] PciHandle PCI function for which to return the vector.
|
|
||||||
@param[out] Vector IRQ number that corresponds to the interrupt line.
|
|
||||||
|
|
||||||
@retval EFI_SUCCESS The interrupt line value was read successfully.
|
|
||||||
|
|
||||||
**/
|
|
||||||
EFI_STATUS
|
|
||||||
EFIAPI
|
|
||||||
Interrupt8259GetInterruptLine (
|
|
||||||
IN EFI_LEGACY_8259_PROTOCOL *This,
|
|
||||||
IN EFI_HANDLE PciHandle,
|
|
||||||
OUT UINT8 *Vector
|
|
||||||
)
|
|
||||||
{
|
|
||||||
EFI_PCI_IO_PROTOCOL *PciIo;
|
|
||||||
UINT8 InterruptLine;
|
|
||||||
EFI_STATUS Status;
|
|
||||||
|
|
||||||
Status = gBS->HandleProtocol (
|
|
||||||
PciHandle,
|
|
||||||
&gEfiPciIoProtocolGuid,
|
|
||||||
(VOID **)&PciIo
|
|
||||||
);
|
|
||||||
if (EFI_ERROR (Status)) {
|
|
||||||
return EFI_INVALID_PARAMETER;
|
|
||||||
}
|
|
||||||
|
|
||||||
PciIo->Pci.Read (
|
|
||||||
PciIo,
|
|
||||||
EfiPciIoWidthUint8,
|
|
||||||
PCI_INT_LINE_OFFSET,
|
|
||||||
1,
|
|
||||||
&InterruptLine
|
|
||||||
);
|
|
||||||
//
|
|
||||||
// Interrupt line is same location for standard PCI cards, standard
|
|
||||||
// bridge and CardBus bridge.
|
|
||||||
//
|
|
||||||
*Vector = InterruptLine;
|
|
||||||
|
|
||||||
return EFI_SUCCESS;
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
Issues the End of Interrupt (EOI) commands to PICs.
|
|
||||||
|
|
||||||
@param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
|
|
||||||
@param[in] Irq The interrupt for which to issue the EOI command.
|
|
||||||
|
|
||||||
@retval EFI_SUCCESS The EOI command was issued.
|
|
||||||
@retval EFI_INVALID_PARAMETER The Irq is not valid.
|
|
||||||
|
|
||||||
**/
|
|
||||||
EFI_STATUS
|
|
||||||
EFIAPI
|
|
||||||
Interrupt8259EndOfInterrupt (
|
|
||||||
IN EFI_LEGACY_8259_PROTOCOL *This,
|
|
||||||
IN EFI_8259_IRQ Irq
|
|
||||||
)
|
|
||||||
{
|
|
||||||
if ((UINT32)Irq > Efi8259Irq15) {
|
|
||||||
return EFI_INVALID_PARAMETER;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (Irq >= Efi8259Irq8) {
|
|
||||||
IoWrite8 (LEGACY_8259_CONTROL_REGISTER_SLAVE, LEGACY_8259_EOI);
|
|
||||||
}
|
|
||||||
|
|
||||||
IoWrite8 (LEGACY_8259_CONTROL_REGISTER_MASTER, LEGACY_8259_EOI);
|
|
||||||
|
|
||||||
return EFI_SUCCESS;
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
Driver Entry point.
|
|
||||||
|
|
||||||
@param[in] ImageHandle ImageHandle of the loaded driver.
|
|
||||||
@param[in] SystemTable Pointer to the EFI System Table.
|
|
||||||
|
|
||||||
@retval EFI_SUCCESS One or more of the drivers returned a success code.
|
|
||||||
@retval !EFI_SUCCESS Error installing Legacy 8259 Protocol.
|
|
||||||
|
|
||||||
**/
|
|
||||||
EFI_STATUS
|
|
||||||
EFIAPI
|
|
||||||
Install8259 (
|
|
||||||
IN EFI_HANDLE ImageHandle,
|
|
||||||
IN EFI_SYSTEM_TABLE *SystemTable
|
|
||||||
)
|
|
||||||
{
|
|
||||||
EFI_STATUS Status;
|
|
||||||
EFI_8259_IRQ Irq;
|
|
||||||
|
|
||||||
//
|
|
||||||
// Initialze mask values from PCDs
|
|
||||||
//
|
|
||||||
mLegacyModeMask = PcdGet16 (Pcd8259LegacyModeMask);
|
|
||||||
mLegacyModeEdgeLevel = PcdGet16 (Pcd8259LegacyModeEdgeLevel);
|
|
||||||
|
|
||||||
//
|
|
||||||
// Clear all pending interrupt
|
|
||||||
//
|
|
||||||
for (Irq = Efi8259Irq0; Irq <= Efi8259Irq15; Irq++) {
|
|
||||||
Interrupt8259EndOfInterrupt (&mInterrupt8259, Irq);
|
|
||||||
}
|
|
||||||
|
|
||||||
//
|
|
||||||
// Set the 8259 Master base to 0x68 and the 8259 Slave base to 0x70
|
|
||||||
//
|
|
||||||
Status = Interrupt8259SetVectorBase (&mInterrupt8259, PROTECTED_MODE_BASE_VECTOR_MASTER, PROTECTED_MODE_BASE_VECTOR_SLAVE);
|
|
||||||
|
|
||||||
//
|
|
||||||
// Set all 8259 interrupts to edge triggered and disabled
|
|
||||||
//
|
|
||||||
Interrupt8259WriteMask (mProtectedModeMask, mProtectedModeEdgeLevel);
|
|
||||||
|
|
||||||
//
|
|
||||||
// Install 8259 Protocol onto a new handle
|
|
||||||
//
|
|
||||||
Status = gBS->InstallProtocolInterface (
|
|
||||||
&m8259Handle,
|
|
||||||
&gEfiLegacy8259ProtocolGuid,
|
|
||||||
EFI_NATIVE_INTERFACE,
|
|
||||||
&mInterrupt8259
|
|
||||||
);
|
|
||||||
return Status;
|
|
||||||
}
|
|
@ -1,218 +0,0 @@
|
|||||||
/** @file
|
|
||||||
Driver implementing the Tiano Legacy 8259 Protocol
|
|
||||||
|
|
||||||
Copyright (c) 2005 - 2019, Intel Corporation. All rights reserved.<BR>
|
|
||||||
SPDX-License-Identifier: BSD-2-Clause-Patent
|
|
||||||
|
|
||||||
**/
|
|
||||||
|
|
||||||
#ifndef _8259_H__
|
|
||||||
#define _8259_H__
|
|
||||||
|
|
||||||
#include <Protocol/Legacy8259.h>
|
|
||||||
#include <Protocol/PciIo.h>
|
|
||||||
|
|
||||||
#include <Library/UefiBootServicesTableLib.h>
|
|
||||||
#include <Library/DebugLib.h>
|
|
||||||
#include <Library/IoLib.h>
|
|
||||||
#include <Library/BaseLib.h>
|
|
||||||
#include <Library/PcdLib.h>
|
|
||||||
|
|
||||||
#include <IndustryStandard/Pci.h>
|
|
||||||
|
|
||||||
// 8259 Hardware definitions
|
|
||||||
|
|
||||||
#define LEGACY_MODE_BASE_VECTOR_MASTER 0x08
|
|
||||||
#define LEGACY_MODE_BASE_VECTOR_SLAVE 0x70
|
|
||||||
|
|
||||||
#define PROTECTED_MODE_BASE_VECTOR_MASTER 0x68
|
|
||||||
#define PROTECTED_MODE_BASE_VECTOR_SLAVE 0x70
|
|
||||||
|
|
||||||
#define LEGACY_8259_CONTROL_REGISTER_MASTER 0x20
|
|
||||||
#define LEGACY_8259_MASK_REGISTER_MASTER 0x21
|
|
||||||
#define LEGACY_8259_CONTROL_REGISTER_SLAVE 0xA0
|
|
||||||
#define LEGACY_8259_MASK_REGISTER_SLAVE 0xA1
|
|
||||||
#define LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_MASTER 0x4D0
|
|
||||||
#define LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_SLAVE 0x4D1
|
|
||||||
|
|
||||||
#define LEGACY_8259_EOI 0x20
|
|
||||||
|
|
||||||
// Protocol Function Prototypes
|
|
||||||
|
|
||||||
/**
|
|
||||||
Sets the base address for the 8259 master and slave PICs.
|
|
||||||
|
|
||||||
@param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
|
|
||||||
@param[in] MasterBase Interrupt vectors for IRQ0-IRQ7.
|
|
||||||
@param[in] SlaveBase Interrupt vectors for IRQ8-IRQ15.
|
|
||||||
|
|
||||||
@retval EFI_SUCCESS The 8259 PIC was programmed successfully.
|
|
||||||
@retval EFI_DEVICE_ERROR There was an error while writing to the 8259 PIC.
|
|
||||||
|
|
||||||
**/
|
|
||||||
EFI_STATUS
|
|
||||||
EFIAPI
|
|
||||||
Interrupt8259SetVectorBase (
|
|
||||||
IN EFI_LEGACY_8259_PROTOCOL *This,
|
|
||||||
IN UINT8 MasterBase,
|
|
||||||
IN UINT8 SlaveBase
|
|
||||||
);
|
|
||||||
|
|
||||||
/**
|
|
||||||
Gets the current 16-bit real mode and 32-bit protected-mode IRQ masks.
|
|
||||||
|
|
||||||
@param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
|
|
||||||
@param[out] LegacyMask 16-bit mode interrupt mask for IRQ0-IRQ15.
|
|
||||||
@param[out] LegacyEdgeLevel 16-bit mode edge/level mask for IRQ-IRQ15.
|
|
||||||
@param[out] ProtectedMask 32-bit mode interrupt mask for IRQ0-IRQ15.
|
|
||||||
@param[out] ProtectedEdgeLevel 32-bit mode edge/level mask for IRQ0-IRQ15.
|
|
||||||
|
|
||||||
@retval EFI_SUCCESS The 8259 PIC was programmed successfully.
|
|
||||||
@retval EFI_DEVICE_ERROR There was an error while reading the 8259 PIC.
|
|
||||||
|
|
||||||
**/
|
|
||||||
EFI_STATUS
|
|
||||||
EFIAPI
|
|
||||||
Interrupt8259GetMask (
|
|
||||||
IN EFI_LEGACY_8259_PROTOCOL *This,
|
|
||||||
OUT UINT16 *LegacyMask OPTIONAL,
|
|
||||||
OUT UINT16 *LegacyEdgeLevel OPTIONAL,
|
|
||||||
OUT UINT16 *ProtectedMask OPTIONAL,
|
|
||||||
OUT UINT16 *ProtectedEdgeLevel OPTIONAL
|
|
||||||
);
|
|
||||||
|
|
||||||
/**
|
|
||||||
Sets the current 16-bit real mode and 32-bit protected-mode IRQ masks.
|
|
||||||
|
|
||||||
@param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
|
|
||||||
@param[in] LegacyMask 16-bit mode interrupt mask for IRQ0-IRQ15.
|
|
||||||
@param[in] LegacyEdgeLevel 16-bit mode edge/level mask for IRQ-IRQ15.
|
|
||||||
@param[in] ProtectedMask 32-bit mode interrupt mask for IRQ0-IRQ15.
|
|
||||||
@param[in] ProtectedEdgeLevel 32-bit mode edge/level mask for IRQ0-IRQ15.
|
|
||||||
|
|
||||||
@retval EFI_SUCCESS The 8259 PIC was programmed successfully.
|
|
||||||
@retval EFI_DEVICE_ERROR There was an error while writing the 8259 PIC.
|
|
||||||
|
|
||||||
**/
|
|
||||||
EFI_STATUS
|
|
||||||
EFIAPI
|
|
||||||
Interrupt8259SetMask (
|
|
||||||
IN EFI_LEGACY_8259_PROTOCOL *This,
|
|
||||||
IN UINT16 *LegacyMask OPTIONAL,
|
|
||||||
IN UINT16 *LegacyEdgeLevel OPTIONAL,
|
|
||||||
IN UINT16 *ProtectedMask OPTIONAL,
|
|
||||||
IN UINT16 *ProtectedEdgeLevel OPTIONAL
|
|
||||||
);
|
|
||||||
|
|
||||||
/**
|
|
||||||
Sets the mode of the PICs.
|
|
||||||
|
|
||||||
@param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
|
|
||||||
@param[in] Mode 16-bit real or 32-bit protected mode.
|
|
||||||
@param[in] Mask The value with which to set the interrupt mask.
|
|
||||||
@param[in] EdgeLevel The value with which to set the edge/level mask.
|
|
||||||
|
|
||||||
@retval EFI_SUCCESS The mode was set successfully.
|
|
||||||
@retval EFI_INVALID_PARAMETER The mode was not set.
|
|
||||||
|
|
||||||
**/
|
|
||||||
EFI_STATUS
|
|
||||||
EFIAPI
|
|
||||||
Interrupt8259SetMode (
|
|
||||||
IN EFI_LEGACY_8259_PROTOCOL *This,
|
|
||||||
IN EFI_8259_MODE Mode,
|
|
||||||
IN UINT16 *Mask OPTIONAL,
|
|
||||||
IN UINT16 *EdgeLevel OPTIONAL
|
|
||||||
);
|
|
||||||
|
|
||||||
/**
|
|
||||||
Translates the IRQ into a vector.
|
|
||||||
|
|
||||||
@param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
|
|
||||||
@param[in] Irq IRQ0-IRQ15.
|
|
||||||
@param[out] Vector The vector that is assigned to the IRQ.
|
|
||||||
|
|
||||||
@retval EFI_SUCCESS The Vector that matches Irq was returned.
|
|
||||||
@retval EFI_INVALID_PARAMETER Irq is not valid.
|
|
||||||
|
|
||||||
**/
|
|
||||||
EFI_STATUS
|
|
||||||
EFIAPI
|
|
||||||
Interrupt8259GetVector (
|
|
||||||
IN EFI_LEGACY_8259_PROTOCOL *This,
|
|
||||||
IN EFI_8259_IRQ Irq,
|
|
||||||
OUT UINT8 *Vector
|
|
||||||
);
|
|
||||||
|
|
||||||
/**
|
|
||||||
Enables the specified IRQ.
|
|
||||||
|
|
||||||
@param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
|
|
||||||
@param[in] Irq IRQ0-IRQ15.
|
|
||||||
@param[in] LevelTriggered 0 = Edge triggered; 1 = Level triggered.
|
|
||||||
|
|
||||||
@retval EFI_SUCCESS The Irq was enabled on the 8259 PIC.
|
|
||||||
@retval EFI_INVALID_PARAMETER The Irq is not valid.
|
|
||||||
|
|
||||||
**/
|
|
||||||
EFI_STATUS
|
|
||||||
EFIAPI
|
|
||||||
Interrupt8259EnableIrq (
|
|
||||||
IN EFI_LEGACY_8259_PROTOCOL *This,
|
|
||||||
IN EFI_8259_IRQ Irq,
|
|
||||||
IN BOOLEAN LevelTriggered
|
|
||||||
);
|
|
||||||
|
|
||||||
/**
|
|
||||||
Disables the specified IRQ.
|
|
||||||
|
|
||||||
@param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
|
|
||||||
@param[in] Irq IRQ0-IRQ15.
|
|
||||||
|
|
||||||
@retval EFI_SUCCESS The Irq was disabled on the 8259 PIC.
|
|
||||||
@retval EFI_INVALID_PARAMETER The Irq is not valid.
|
|
||||||
|
|
||||||
**/
|
|
||||||
EFI_STATUS
|
|
||||||
EFIAPI
|
|
||||||
Interrupt8259DisableIrq (
|
|
||||||
IN EFI_LEGACY_8259_PROTOCOL *This,
|
|
||||||
IN EFI_8259_IRQ Irq
|
|
||||||
);
|
|
||||||
|
|
||||||
/**
|
|
||||||
Reads the PCI configuration space to get the interrupt number that is assigned to the card.
|
|
||||||
|
|
||||||
@param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
|
|
||||||
@param[in] PciHandle PCI function for which to return the vector.
|
|
||||||
@param[out] Vector IRQ number that corresponds to the interrupt line.
|
|
||||||
|
|
||||||
@retval EFI_SUCCESS The interrupt line value was read successfully.
|
|
||||||
|
|
||||||
**/
|
|
||||||
EFI_STATUS
|
|
||||||
EFIAPI
|
|
||||||
Interrupt8259GetInterruptLine (
|
|
||||||
IN EFI_LEGACY_8259_PROTOCOL *This,
|
|
||||||
IN EFI_HANDLE PciHandle,
|
|
||||||
OUT UINT8 *Vector
|
|
||||||
);
|
|
||||||
|
|
||||||
/**
|
|
||||||
Issues the End of Interrupt (EOI) commands to PICs.
|
|
||||||
|
|
||||||
@param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
|
|
||||||
@param[in] Irq The interrupt for which to issue the EOI command.
|
|
||||||
|
|
||||||
@retval EFI_SUCCESS The EOI command was issued.
|
|
||||||
@retval EFI_INVALID_PARAMETER The Irq is not valid.
|
|
||||||
|
|
||||||
**/
|
|
||||||
EFI_STATUS
|
|
||||||
EFIAPI
|
|
||||||
Interrupt8259EndOfInterrupt (
|
|
||||||
IN EFI_LEGACY_8259_PROTOCOL *This,
|
|
||||||
IN EFI_8259_IRQ Irq
|
|
||||||
);
|
|
||||||
|
|
||||||
#endif
|
|
@ -1,45 +0,0 @@
|
|||||||
## @file
|
|
||||||
# 8259 Interrupt Controller driver that provides Legacy 8259 protocol.
|
|
||||||
#
|
|
||||||
# Copyright (c) 2005 - 2019, Intel Corporation. All rights reserved.<BR>
|
|
||||||
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
|
||||||
#
|
|
||||||
##
|
|
||||||
|
|
||||||
[Defines]
|
|
||||||
INF_VERSION = 0x00010005
|
|
||||||
BASE_NAME = Legacy8259
|
|
||||||
MODULE_UNI_FILE = Legacy8259.uni
|
|
||||||
FILE_GUID = 245CB4DA-8E15-4A1B-87E3-9878FFA07520
|
|
||||||
MODULE_TYPE = DXE_DRIVER
|
|
||||||
VERSION_STRING = 1.0
|
|
||||||
ENTRY_POINT = Install8259
|
|
||||||
|
|
||||||
[Sources]
|
|
||||||
8259.c
|
|
||||||
8259.h
|
|
||||||
|
|
||||||
[Packages]
|
|
||||||
MdePkg/MdePkg.dec
|
|
||||||
OvmfPkg/OvmfPkg.dec
|
|
||||||
|
|
||||||
[LibraryClasses]
|
|
||||||
UefiBootServicesTableLib
|
|
||||||
DebugLib
|
|
||||||
UefiDriverEntryPoint
|
|
||||||
IoLib
|
|
||||||
PcdLib
|
|
||||||
|
|
||||||
[Protocols]
|
|
||||||
gEfiLegacy8259ProtocolGuid ## PRODUCES
|
|
||||||
gEfiPciIoProtocolGuid ## SOMETIMES_CONSUMES
|
|
||||||
|
|
||||||
[Pcd]
|
|
||||||
gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeMask ## CONSUMES
|
|
||||||
gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel ## CONSUMES
|
|
||||||
|
|
||||||
[Depex]
|
|
||||||
TRUE
|
|
||||||
|
|
||||||
[UserExtensions.TianoCore."ExtraFiles"]
|
|
||||||
Legacy8259Extra.uni
|
|
@ -1,16 +0,0 @@
|
|||||||
// /** @file
|
|
||||||
// 8259 Interrupt Controller driver that provides Legacy 8259 protocol.
|
|
||||||
//
|
|
||||||
// 8259 Interrupt Controller driver that provides Legacy 8259 protocol.
|
|
||||||
//
|
|
||||||
// Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>
|
|
||||||
//
|
|
||||||
// SPDX-License-Identifier: BSD-2-Clause-Patent
|
|
||||||
//
|
|
||||||
// **/
|
|
||||||
|
|
||||||
|
|
||||||
#string STR_MODULE_ABSTRACT #language en-US "8259 Interrupt Controller driver that provides Legacy 8259 protocol"
|
|
||||||
|
|
||||||
#string STR_MODULE_DESCRIPTION #language en-US "8259 Interrupt Controller driver that provides Legacy 8259 protocol."
|
|
||||||
|
|
@ -1,14 +0,0 @@
|
|||||||
// /** @file
|
|
||||||
// Legacy8259 Localized Strings and Content
|
|
||||||
//
|
|
||||||
// Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
|
|
||||||
//
|
|
||||||
// SPDX-License-Identifier: BSD-2-Clause-Patent
|
|
||||||
//
|
|
||||||
// **/
|
|
||||||
|
|
||||||
#string STR_PROPERTIES_MODULE_NAME
|
|
||||||
#language en-US
|
|
||||||
"Legacy 8259 Interrupt Controller DXE Driver"
|
|
||||||
|
|
||||||
|
|
Loading…
x
Reference in New Issue
Block a user