mirror of https://github.com/acidanthera/audk.git
Coding style verified.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@8133 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
gikidy
parent
1f9f8414d1
commit
6800ac833d
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@ -499,10 +499,10 @@ typedef struct {
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///
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typedef struct {
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union {
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UINT32 SymbolTableIndex; // Symbol table index of function name if Linenumber is 0.
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UINT32 VirtualAddress; // Virtual address of line number.
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UINT32 SymbolTableIndex; ///< Symbol table index of function name if Linenumber is 0.
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UINT32 VirtualAddress; ///< Virtual address of line number.
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} Type;
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UINT16 Linenumber; // Line number.
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UINT16 Linenumber; ///< Line number.
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} EFI_IMAGE_LINENUMBER;
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///
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@ -55,7 +55,7 @@ typedef UINT8 SMBIOS_TABLE_STRING;
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/// Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc.
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///
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typedef struct {
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UINT32 Reserved :2; //Bits 0-1
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UINT32 Reserved :2; ///< Bits 0-1
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UINT32 Unknown :1;
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UINT32 BiosCharacteristicsNotSupported :1;
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UINT32 IsaIsSupported :1;
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@ -86,8 +86,8 @@ typedef struct {
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UINT32 PrinterIsSupported :1;
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UINT32 CgaMonoIsSupported :1;
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UINT32 NecPc98 :1;
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UINT32 ReservedForVendor :32; // Bits 32-63. Bits 32-47 reserved for BIOS vendor
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// and bits 48-63 reserved for System Vendor.
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UINT32 ReservedForVendor :32; ///< Bits 32-63. Bits 32-47 reserved for BIOS vendor
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///< and bits 48-63 reserved for System Vendor.
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} MISC_BIOS_CHARACTERISTICS;
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///
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@ -115,7 +115,7 @@ typedef struct {
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UINT8 BiosBootSpecIsSupported :1;
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UINT8 FunctionKeyNetworkBootIsSupported :1;
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UINT8 TargetContentDistributionEnabled :1;
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UINT8 ExtensionByte2Reserved :1; //Bits 3-7
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UINT8 ExtensionByte2Reserved :1;
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} MBCE_SYSTEM_RESERVED;
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///
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@ -446,7 +446,7 @@ typedef enum {
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ProcessorFamilyIntelCeleronD = 0xBA,
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ProcessorFamilyIntelPentiumD = 0xBB,
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ProcessorFamilyIntelPentiumEx = 0xBC,
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ProcessorFamilyIntelCoreSolo = 0xBD, // SMBIOS spec 2.6 correct this value
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ProcessorFamilyIntelCoreSolo = 0xBD, ///< SMBIOS spec 2.6 correct this value
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ProcessorFamilyReserved = 0xBE,
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ProcessorFamilyIntelCore2 = 0xBF,
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ProcessorFamilyIBM390 = 0xC8,
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@ -468,12 +468,12 @@ typedef enum {
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/// Processor Information - Voltage
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///
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typedef struct {
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UINT8 ProcessorVoltageCapability5V :1; // Bit 0
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UINT8 ProcessorVoltageCapability3_3V :1; // Bit 1
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UINT8 ProcessorVoltageCapability2_9V :1; // Bit 2
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UINT8 ProcessorVoltageCapabilityReserved :1; // Bit 3 ,must be zero.
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UINT8 ProcessorVoltageReserved :3; // Bits 4-6, must be zero.
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UINT8 ProcessorVoltageIndicateLegacy :1; // Bit 7.
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UINT8 ProcessorVoltageCapability5V :1;
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UINT8 ProcessorVoltageCapability3_3V :1;
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UINT8 ProcessorVoltageCapability2_9V :1;
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UINT8 ProcessorVoltageCapabilityReserved :1; ///< Bit 3, must be zero.
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UINT8 ProcessorVoltageReserved :3; ///< Bits 4-6, must be zero.
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UINT8 ProcessorVoltageIndicateLegacy :1;
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} PROCESSOR_VOLTAGE;
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///
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@ -484,7 +484,7 @@ typedef enum {
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ProcessorUpgradeUnknown = 0x02,
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ProcessorUpgradeDaughterBoard = 0x03,
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ProcessorUpgradeZIFSocket = 0x04,
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ProcessorUpgradePiggyBack = 0x05, // Replaceable
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ProcessorUpgradePiggyBack = 0x05, ///< Replaceable
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ProcessorUpgradeNone = 0x06,
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ProcessorUpgradeLIFSocket = 0x07,
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ProcessorUpgradeSlot1 = 0x08,
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@ -493,7 +493,7 @@ typedef enum {
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ProcessorUpgradeSlotA = 0x0B,
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ProcessorUpgradeSlotM = 0x0C,
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ProcessorUpgradeSocket423 = 0x0D,
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ProcessorUpgradeSocketA = 0x0E, // Socket 462
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ProcessorUpgradeSocketA = 0x0E, ///< Socket 462
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ProcessorUpgradeSocket478 = 0x0F,
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ProcessorUpgradeSocket754 = 0x10,
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ProcessorUpgradeSocket940 = 0x11,
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@ -566,7 +566,7 @@ typedef struct {
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PROCESSOR_MISC_INFO MiscInfo;
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UINT32 Reserved;
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PROCESSOR_FEATURE_FLAGS FeatureFlags;
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} PROCESSOR_ID_DATA; // 4*4 bytes
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} PROCESSOR_ID_DATA;
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///
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/// Processor Information (Type 4)
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@ -710,7 +710,7 @@ typedef struct {
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/// Memory Module Information - Memory Size
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///
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typedef struct {
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UINT8 InstalledOrEnabledSize :7;// Size (n), where 2**n is the size in MB.
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UINT8 InstalledOrEnabledSize :7; ///< Size (n), where 2**n is the size in MB.
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UINT8 SingleOrDoubleBank :1;
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} MEMORY_INSTALLED_ENABLED_SIZE;
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@ -758,8 +758,8 @@ typedef enum {
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CacheErrorUnknown = 0x02,
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CacheErrorNone = 0x03,
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CacheErrorParity = 0x04,
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CacheErrorSingleBit = 0x05, // ECC
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CacheErrorMultiBit = 0x06 // ECC
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CacheErrorSingleBit = 0x05, ///< ECC
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CacheErrorMultiBit = 0x06 ///< ECC
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} CACHE_ERROR_TYPE_DATA;
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///
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@ -960,13 +960,13 @@ typedef enum {
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SlotDataBusWidth32Bit = 0x05,
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SlotDataBusWidth64Bit = 0x06,
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SlotDataBusWidth128Bit = 0x07,
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SlotDataBusWidth1X = 0x08, // Or X1
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SlotDataBusWidth2X = 0x09, // Or X2
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SlotDataBusWidth4X = 0x0A, // Or X4
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SlotDataBusWidth8X = 0x0B, // Or X8
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SlotDataBusWidth12X = 0x0C, // Or X12
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SlotDataBusWidth16X = 0x0D, // Or X16
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SlotDataBusWidth32X = 0x0E // Or X32
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SlotDataBusWidth1X = 0x08, ///< Or X1
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SlotDataBusWidth2X = 0x09, ///< Or X2
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SlotDataBusWidth4X = 0x0A, ///< Or X4
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SlotDataBusWidth8X = 0x0B, ///< Or X8
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SlotDataBusWidth12X = 0x0C, ///< Or X12
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SlotDataBusWidth16X = 0x0D, ///< Or X16
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SlotDataBusWidth32X = 0x0E ///< Or X32
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} MISC_SLOT_DATA_BUS_WIDTH;
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///
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@ -1009,7 +1009,7 @@ typedef struct {
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UINT8 PmeSignalSupported :1;
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UINT8 HotPlugDevicesSupported :1;
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UINT8 SmbusSignalSupported :1;
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UINT8 Reserved :5; //Set to 0.
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UINT8 Reserved :5; ///< Set to 0.
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} MISC_SLOT_CHARACTERISTICS2;
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///
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@ -1134,8 +1134,8 @@ typedef enum {
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EventLogTypeUncorrectCPUErr = 0x15,
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EventLogTypeAreaResetAndClr = 0x16,
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EventLogTypeSystemBoot = 0x17,
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EventLogTypeUnused = 0x18, // 0x18 - 0x7F
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EventLogTypeAvailForSys = 0x80, // 0x80 - 0xFE
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EventLogTypeUnused = 0x18, ///< 0x18 - 0x7F
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EventLogTypeAvailForSys = 0x80, ///< 0x80 - 0xFE
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EventLogTypeEndOfLog = 0xFF
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} EVENT_LOG_TYPE_DATA;
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@ -1761,9 +1761,9 @@ typedef struct {
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///
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typedef struct {
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SMBIOS_STRUCTURE Hdr;
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MEMORY_ERROR_TYPE ErrorType; // Same as Type 18
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MEMORY_ERROR_GRANULARITY ErrorGranularity; // Same as Type 18
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MEMORY_ERROR_OPERATION ErrorOperation; // Same as Type 18
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MEMORY_ERROR_TYPE ErrorType; ///< Same as Type 18
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MEMORY_ERROR_GRANULARITY ErrorGranularity; ///< Same as Type 18
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MEMORY_ERROR_OPERATION ErrorOperation; ///< Same as Type 18
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UINT32 VendorSyndrome;
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UINT64 MemoryArrayErrorAddress;
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UINT64 DeviceErrorAddress;
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@ -1883,9 +1883,9 @@ typedef struct {
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///
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typedef enum {
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IPMIDeviceInfoInterfaceTypeUnknown = 0x00,
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IPMIDeviceInfoInterfaceTypeKCS = 0x01, // Keyboard Controller Style
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IPMIDeviceInfoInterfaceTypeSMIC = 0x02, // Server Management Interface Chip
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IPMIDeviceInfoInterfaceTypeBT = 0x03, // Block Transfer
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IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< Keyboard Controller Style
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IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< Server Management Interface Chip
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IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< Block Transfer
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IPMIDeviceInfoInterfaceTypeReserved = 0x04
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} BMC_INTERFACE_TYPE;
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