mirror of https://github.com/acidanthera/audk.git
ArmPlatformPkg/NorFlashDxe: Fixed CFI NOR Flash driver
CFI Flash differentiates DeviceBaseAddress with BlockAddress in its protocol. The DeviceBaseAddress was not considered in the previous version of this driver. This version also fixes some bugs in the implementation of the CFI protocol. This new version also uses the Boot Mode Hob to reinitialized the FVB when Boot Mode is equal to BOOT_WITH_DEFAULT_SETTINGS. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13064 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
oliviermartin
parent
e34114ea3f
commit
68dda854c6
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@ -1,6 +1,6 @@
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#/** @file
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#
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# Copyright (c) 2011, ARM Limited. All rights reserved.
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# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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@ -52,6 +52,8 @@
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gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec|FALSE|BOOLEAN|0x00000002
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gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores|FALSE|BOOLEAN|0x00000004
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gArmPlatformTokenSpaceGuid.PcdNorFlashCheckBlockLocked|FALSE|BOOLEAN|0x0000003C
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[PcdsFixedAtBuild.common]
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gArmPlatformTokenSpaceGuid.PcdClusterCount|1|UINT32|0x00000038
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@ -1,6 +1,7 @@
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/** @file
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Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
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Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -20,6 +21,7 @@
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// RTSM
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NOR_FLASH_DESCRIPTION mNorFlashDevices[NOR_FLASH_DEVICE_COUNT] = {
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{ // UEFI
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ARM_EB_SMB_NOR_BASE,
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ARM_EB_SMB_NOR_BASE,
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SIZE_128KB * 512,
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SIZE_128KB,
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@ -1,6 +1,7 @@
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/** @file
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Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
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Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -21,24 +22,28 @@
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NOR_FLASH_DESCRIPTION mNorFlashDevices[NOR_FLASH_DEVICE_COUNT] = {
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{ // BootMon
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ARM_VE_SMB_NOR0_BASE,
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ARM_VE_SMB_NOR0_BASE,
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SIZE_256KB * 255,
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SIZE_256KB,
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{0xE7223039, 0x5836, 0x41E1, 0xB5, 0x42, 0xD7, 0xEC, 0x73, 0x6C, 0x5E, 0x59}
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},
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{ // BootMon non-volatile storage
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ARM_VE_SMB_NOR0_BASE,
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ARM_VE_SMB_NOR0_BASE + SIZE_256KB * 255,
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SIZE_64KB * 4,
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SIZE_64KB,
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{0x02118005, 0x9DA7, 0x443A, 0x92, 0xD5, 0x78, 0x1F, 0x02, 0x2A, 0xED, 0xBB}
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},
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{ // UEFI
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ARM_VE_SMB_NOR1_BASE,
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ARM_VE_SMB_NOR1_BASE,
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SIZE_256KB * 255,
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SIZE_256KB,
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{0x1F15DA3C, 0x37FF, 0x4070, 0xB4, 0x71, 0xBB, 0x4A, 0xF1, 0x2A, 0x72, 0x4A}
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},
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{ // UEFI Variable Services non-volatile storage
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ARM_VE_SMB_NOR1_BASE,
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ARM_VE_SMB_NOR1_BASE + SIZE_256KB * 255,
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SIZE_64KB * 3, //FIXME: Set 3 blocks because I did not succeed to copy 4 blocks into the ARM Versatile Express NOR Flash in the last NOR Flash. It should be 4 blocks
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SIZE_64KB,
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@ -1,6 +1,7 @@
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/** @file NorFlashBlockIoDxe.c
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Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
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Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -16,47 +17,6 @@
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#include "NorFlashDxe.h"
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EFI_STATUS
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EFIAPI
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NorFlashBlkIoInitialize (
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IN NOR_FLASH_INSTANCE* Instance
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)
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{
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UINT32 Reply;
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EFI_STATUS Status = EFI_SUCCESS;
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DEBUG((DEBUG_BLKIO,"NorFlashBlkIoInitialize()\n"));
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//
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// Verify that there is a physical hardware device where we expect it to be.
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//
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// Read a specific CFI query that returns back "QRY"
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// This ensures that there is really a device present there
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SEND_NOR_COMMAND (Instance->BaseAddress, 0, P30_CMD_READ_CFI_QUERY);
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// Read CFI 'QRY' data
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Status = NorFlashReadCfiData (Instance->BaseAddress, P30_CFI_ADDR_QUERY_UNIQUE_QRY, 3, &Reply);
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if (EFI_ERROR(Status)) {
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return Status;
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}
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if (Reply != CFI_QRY) {
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DEBUG((EFI_D_ERROR, "NorFlashBlkIoInitialize: CFI QRY=0x%x (expected 0x595251)\n", Reply));
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return EFI_DEVICE_ERROR;
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}
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// Reset the device
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Status = NorFlashBlockIoReset (&Instance->BlockIoProtocol, FALSE);
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if (EFI_ERROR(Status)) {
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return Status;
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}
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Instance->Initialized = TRUE;
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return EFI_SUCCESS;
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}
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//
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// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.Reset
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//
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@ -73,7 +33,7 @@ NorFlashBlockIoReset (
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DEBUG ((DEBUG_BLKIO, "NorFlashBlockIoReset(MediaId=0x%x)\n", This->Media->MediaId));
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return NorFlashReset(Instance);
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return NorFlashReset (Instance);
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}
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//
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@ -101,7 +61,7 @@ NorFlashBlockIoReadBlocks (
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} else if( This->Media->MediaId != MediaId ) {
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Status = EFI_MEDIA_CHANGED;
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} else {
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Status = NorFlashReadBlocks(Instance,Lba,BufferSizeInBytes,Buffer);
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Status = NorFlashReadBlocks (Instance,Lba,BufferSizeInBytes,Buffer);
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}
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return Status;
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@ -134,7 +94,7 @@ NorFlashBlockIoWriteBlocks (
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} else if( This->Media->ReadOnly ) {
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Status = EFI_WRITE_PROTECTED;
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} else {
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Status = NorFlashWriteBlocks(Instance,Lba,BufferSizeInBytes,Buffer);
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Status = NorFlashWriteBlocks (Instance,Lba,BufferSizeInBytes,Buffer);
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}
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return Status;
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@ -1,6 +1,7 @@
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/** @file NorFlashDxe.c
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Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
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Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -32,7 +33,8 @@ NOR_FLASH_INSTANCE mNorFlashInstanceTemplate = {
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FALSE, // Initialized
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NULL, // Initialize
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0, // BaseAddress ... NEED TO BE FILLED
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0, // DeviceBaseAddress ... NEED TO BE FILLED
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0, // RegionBaseAddress ... NEED TO BE FILLED
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0, // Size ... NEED TO BE FILLED
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0, // StartLba
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@ -92,7 +94,8 @@ NOR_FLASH_INSTANCE mNorFlashInstanceTemplate = {
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EFI_STATUS
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NorFlashCreateInstance (
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IN UINTN NorFlashBase,
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IN UINTN NorFlashDeviceBase,
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IN UINTN NorFlashRegionBase,
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IN UINTN NorFlashSize,
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IN UINT32 MediaId,
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IN UINT32 BlockSize,
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@ -111,7 +114,8 @@ NorFlashCreateInstance (
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return EFI_OUT_OF_RESOURCES;
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}
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Instance->BaseAddress = NorFlashBase;
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Instance->DeviceBaseAddress = NorFlashDeviceBase;
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Instance->RegionBaseAddress = NorFlashRegionBase;
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Instance->Size = NorFlashSize;
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Instance->BlockIoProtocol.Media = &Instance->Media;
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@ -137,7 +141,7 @@ NorFlashCreateInstance (
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return Status;
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}
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} else {
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Instance->Initialize = NorFlashBlkIoInitialize;
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Instance->Initialized = TRUE;
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Status = gBS->InstallMultipleProtocolInterfaces (
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&Instance->Handle,
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@ -152,151 +156,48 @@ NorFlashCreateInstance (
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}
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*NorFlashInstance = Instance;
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return Status;
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}
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EFI_STATUS
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NorFlashReadCfiData (
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IN UINTN BaseAddress,
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IN UINTN CfiOffset,
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IN UINT32 NumberOfBytes,
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OUT UINT32 *Data
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)
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{
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UINT32 CurrentByte;
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UINTN ReadAddress;
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UINT32 ReadData;
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UINT32 Byte1;
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UINT32 Byte2;
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UINT32 CombinedData = 0;
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EFI_STATUS Status = EFI_SUCCESS;
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if (NumberOfBytes > 4) {
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// Using 32 bit variable so can only read 4 bytes
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return EFI_INVALID_PARAMETER;
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}
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// First combine the base address with the offset address to create an absolute read address.
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// However, because we are in little endian, read from the last address down to the first
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ReadAddress = CREATE_NOR_ADDRESS (BaseAddress, CfiOffset) + (NumberOfBytes - 1) * sizeof(UINT32);
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// Although each read returns 32 bits, because of the NOR Flash structure,
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// each 16 bits (16 MSB and 16 LSB) come from two different chips.
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// When in CFI mode, each chip read returns valid data in only the 8 LSBits;
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// the 8 MSBits are invalid and can be ignored.
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// Therefore, each read address returns one byte from each chip.
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//
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// Also note: As we are in little endian notation and we are reading
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// bytes from incremental addresses, we should assemble them in little endian order.
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for (CurrentByte=0; CurrentByte<NumberOfBytes; CurrentByte++) {
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// Read the bytes from the two chips
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ReadData = MmioRead32(ReadAddress);
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// Check the data validity:
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// The 'Dual Data' function means that
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// each chip should return identical data.
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// If that is not the case then we have a problem.
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Byte1 = GET_LOW_BYTE (ReadData);
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Byte2 = GET_HIGH_BYTE(ReadData);
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if(Byte1 != Byte2) {
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// The two bytes should have been identical
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return EFI_DEVICE_ERROR;
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} else {
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// Each successive iteration of the 'for' loop reads a lower address.
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// As we read lower addresses and as we use little endian,
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// we read lower significance bytes. So combine them in the correct order.
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CombinedData = (CombinedData << 8) | Byte1;
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// Decrement down to the next address
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ReadAddress -= sizeof(UINT32);
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}
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}
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*Data = CombinedData;
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return Status;
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}
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EFI_STATUS
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UINT32
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NorFlashReadStatusRegister (
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IN UINTN SR_Address
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IN NOR_FLASH_INSTANCE *Instance,
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IN UINTN SR_Address
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)
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{
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volatile UINT32 *pStatusRegister;
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UINT32 StatusRegister;
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UINT32 ErrorMask;
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EFI_STATUS Status = EFI_SUCCESS;
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// Prepare the read address
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pStatusRegister = (UINT32 *) SR_Address;
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do {
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// Prepare to read the status register
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SEND_NOR_COMMAND (SR_Address, 0, P30_CMD_READ_STATUS_REGISTER);
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// Snapshot the status register
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StatusRegister = *pStatusRegister;
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}
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// The chip is busy while the WRITE bit is not asserted
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while ((StatusRegister & P30_SR_BIT_WRITE) != P30_SR_BIT_WRITE);
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// Perform a full status check:
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// Mask the relevant bits of Status Register.
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// Everything should be zero, if not, we have a problem
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// Prepare the Error Mask by setting bits 5, 4, 3, 1
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ErrorMask = P30_SR_BIT_ERASE | P30_SR_BIT_PROGRAM | P30_SR_BIT_VPP | P30_SR_BIT_BLOCK_LOCKED ;
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if ( (StatusRegister & ErrorMask) != 0 ) {
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if ( (StatusRegister & P30_SR_BIT_VPP) != 0 ) {
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DEBUG((EFI_D_ERROR,"NorFlashReadStatusRegister: VPP Range Error\n"));
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} else if ( (StatusRegister & (P30_SR_BIT_ERASE | P30_SR_BIT_PROGRAM) ) != 0 ) {
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DEBUG((EFI_D_ERROR,"NorFlashReadStatusRegister: Command Sequence Error\n"));
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} else if ( (StatusRegister & P30_SR_BIT_PROGRAM) != 0 ) {
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DEBUG((EFI_D_ERROR,"NorFlashReadStatusRegister: Program Error\n"));
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} else if ( (StatusRegister & P30_SR_BIT_BLOCK_LOCKED) != 0 ) {
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DEBUG((EFI_D_ERROR,"NorFlashReadStatusRegister: Device Protect Error\n"));
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} else {
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DEBUG((EFI_D_ERROR,"NorFlashReadStatusRegister: Error (0x%X)\n",Status));
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}
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// If an error is detected we must clear the Status Register
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SEND_NOR_COMMAND(SR_Address, 0, P30_CMD_CLEAR_STATUS_REGISTER);
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Status = EFI_DEVICE_ERROR;
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}
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SEND_NOR_COMMAND(SR_Address, 0, P30_CMD_READ_ARRAY);
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return Status;
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// Prepare to read the status register
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SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_STATUS_REGISTER);
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return MmioRead32 (Instance->DeviceBaseAddress);
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}
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BOOLEAN
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NorFlashBlockIsLocked (
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IN UINTN BlockAddress
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IN NOR_FLASH_INSTANCE *Instance,
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IN UINTN BlockAddress
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)
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{
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UINT32 LockStatus;
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BOOLEAN BlockIsLocked = TRUE;
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BOOLEAN BlockIsLocked;
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BlockIsLocked = TRUE;
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// Send command for reading device id
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SEND_NOR_COMMAND (BlockAddress, 2, P30_CMD_READ_DEVICE_ID);
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// Read block lock status
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LockStatus = MmioRead32 (CREATE_NOR_ADDRESS( BlockAddress, 2 ));
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LockStatus = MmioRead32 (CREATE_NOR_ADDRESS(BlockAddress, 2));
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// Decode block lock status
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LockStatus = FOLD_32BIT_INTO_16BIT(LockStatus);
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if((LockStatus & 0x2) != 0) {
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DEBUG((EFI_D_ERROR, "UnlockSingleBlock: WARNING: Block LOCKED DOWN\n"));
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if ((LockStatus & 0x2) != 0) {
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DEBUG((EFI_D_ERROR, "NorFlashBlockIsLocked: WARNING: Block LOCKED DOWN\n"));
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}
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if((LockStatus & 0x1) == 0) {
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if ((LockStatus & 0x1) == 0) {
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// This means the block is unlocked
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DEBUG((DEBUG_BLKIO, "UnlockSingleBlock: Block 0x%08x unlocked\n", BlockAddress ));
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DEBUG((DEBUG_BLKIO, "UnlockSingleBlock: Block 0x%08x unlocked\n", BlockAddress));
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BlockIsLocked = FALSE;
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}
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@ -306,22 +207,48 @@ NorFlashBlockIsLocked (
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EFI_STATUS
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NorFlashUnlockSingleBlock (
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IN UINTN BlockAddress
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IN NOR_FLASH_INSTANCE *Instance,
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IN UINTN BlockAddress
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)
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{
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EFI_STATUS Status = EFI_SUCCESS;
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UINT32 LockStatus;
|
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|
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// Raise the Task Priority Level to TPL_NOTIFY to serialise all its operations
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// and to protect shared data structures.
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// Request a lock setup
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SEND_NOR_COMMAND(BlockAddress, 0, P30_CMD_LOCK_BLOCK_SETUP);
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if (FeaturePcdGet (PcdNorFlashCheckBlockLocked) == TRUE) {
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do {
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// Request a lock setup
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SEND_NOR_COMMAND (BlockAddress, 0, P30_CMD_LOCK_BLOCK_SETUP);
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// Request an unlock
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SEND_NOR_COMMAND(BlockAddress, 0, P30_CMD_UNLOCK_BLOCK);
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// Request an unlock
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SEND_NOR_COMMAND (BlockAddress, 0, P30_CMD_UNLOCK_BLOCK);
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// Send command for reading device id
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SEND_NOR_COMMAND (BlockAddress, 2, P30_CMD_READ_DEVICE_ID);
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// Read block lock status
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LockStatus = MmioRead32 (CREATE_NOR_ADDRESS(BlockAddress, 2));
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// Decode block lock status
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LockStatus = FOLD_32BIT_INTO_16BIT(LockStatus);
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} while ((LockStatus & 0x1) == 1);
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} else {
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// Request a lock setup
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SEND_NOR_COMMAND (BlockAddress, 0, P30_CMD_LOCK_BLOCK_SETUP);
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// Request an unlock
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SEND_NOR_COMMAND (BlockAddress, 0, P30_CMD_UNLOCK_BLOCK);
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// Wait until the status register gives us the all clear
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do {
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LockStatus = NorFlashReadStatusRegister (Instance, BlockAddress);
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} while ((LockStatus & P30_SR_BIT_WRITE) != P30_SR_BIT_WRITE);
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}
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|
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// Put device back into Read Array mode
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SEND_NOR_COMMAND(BlockAddress, 0, P30_CMD_READ_ARRAY);
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SEND_NOR_COMMAND (BlockAddress, 0, P30_CMD_READ_ARRAY);
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DEBUG((DEBUG_BLKIO, "UnlockSingleBlock: BlockAddress=0x%08x, Exit Status = \"%r\".\n", BlockAddress, Status));
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@ -331,13 +258,14 @@ NorFlashUnlockSingleBlock (
|
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|
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EFI_STATUS
|
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NorFlashUnlockSingleBlockIfNecessary (
|
||||
IN UINTN BlockAddress
|
||||
IN NOR_FLASH_INSTANCE *Instance,
|
||||
IN UINTN BlockAddress
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status = EFI_SUCCESS;
|
||||
|
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if ( NorFlashBlockIsLocked(BlockAddress) == TRUE ) {
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Status = NorFlashUnlockSingleBlock(BlockAddress);
|
||||
if (NorFlashBlockIsLocked (Instance, BlockAddress) == TRUE) {
|
||||
Status = NorFlashUnlockSingleBlock (Instance, BlockAddress);
|
||||
}
|
||||
|
||||
return Status;
|
||||
|
|
@ -349,20 +277,53 @@ NorFlashUnlockSingleBlockIfNecessary (
|
|||
**/
|
||||
EFI_STATUS
|
||||
NorFlashEraseSingleBlock (
|
||||
IN UINTN BlockAddress
|
||||
IN NOR_FLASH_INSTANCE *Instance,
|
||||
IN UINTN BlockAddress
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status = EFI_SUCCESS;
|
||||
EFI_STATUS Status;
|
||||
UINT32 StatusRegister;
|
||||
|
||||
Status = EFI_SUCCESS;
|
||||
|
||||
// Request a block erase and then confirm it
|
||||
SEND_NOR_COMMAND (BlockAddress, 0, P30_CMD_BLOCK_ERASE_SETUP);
|
||||
SEND_NOR_COMMAND (BlockAddress, 0, P30_CMD_BLOCK_ERASE_CONFIRM);
|
||||
SEND_NOR_COMMAND(BlockAddress, 0, P30_CMD_BLOCK_ERASE_SETUP);
|
||||
SEND_NOR_COMMAND(BlockAddress, 0, P30_CMD_BLOCK_ERASE_CONFIRM);
|
||||
|
||||
// Wait until the status register gives us the all clear
|
||||
Status = NorFlashReadStatusRegister( BlockAddress );
|
||||
do {
|
||||
StatusRegister = NorFlashReadStatusRegister (Instance, BlockAddress);
|
||||
} while ((StatusRegister & P30_SR_BIT_WRITE) != P30_SR_BIT_WRITE);
|
||||
|
||||
if (StatusRegister & P30_SR_BIT_VPP) {
|
||||
DEBUG((EFI_D_ERROR,"EraseSingleBlock(BlockAddress=0x%08x: VPP Range Error\n", BlockAddress));
|
||||
Status = EFI_DEVICE_ERROR;
|
||||
}
|
||||
|
||||
if ((StatusRegister & (P30_SR_BIT_ERASE | P30_SR_BIT_PROGRAM)) == (P30_SR_BIT_ERASE | P30_SR_BIT_PROGRAM)) {
|
||||
DEBUG((EFI_D_ERROR,"EraseSingleBlock(BlockAddress=0x%08x: Command Sequence Error\n", BlockAddress));
|
||||
Status = EFI_DEVICE_ERROR;
|
||||
}
|
||||
|
||||
if (StatusRegister & P30_SR_BIT_ERASE) {
|
||||
DEBUG((EFI_D_ERROR,"EraseSingleBlock(BlockAddress=0x%08x: Block Erase Error StatusRegister:0x%X\n", BlockAddress, StatusRegister));
|
||||
Status = EFI_DEVICE_ERROR;
|
||||
}
|
||||
|
||||
if (StatusRegister & P30_SR_BIT_BLOCK_LOCKED) {
|
||||
// The debug level message has been reduced because a device lock might happen. In this case we just retry it ...
|
||||
DEBUG((EFI_D_INFO,"EraseSingleBlock(BlockAddress=0x%08x: Block Locked Error\n", BlockAddress));
|
||||
Status = EFI_WRITE_PROTECTED;
|
||||
}
|
||||
|
||||
if (EFI_ERROR(Status)) {
|
||||
DEBUG((DEBUG_BLKIO, "EraseSingleBlock(BlockAddress=0x%08x) = '%r'\n", BlockAddress, Status));
|
||||
// Clear the Status Register
|
||||
SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_CLEAR_STATUS_REGISTER);
|
||||
}
|
||||
|
||||
// Put device back into Read Array mode
|
||||
SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_ARRAY);
|
||||
|
||||
return Status;
|
||||
}
|
||||
|
||||
|
|
@ -371,41 +332,91 @@ NorFlashEraseSingleBlock (
|
|||
**/
|
||||
EFI_STATUS
|
||||
NorFlashUnlockAndEraseSingleBlock (
|
||||
IN UINTN BlockAddress
|
||||
IN NOR_FLASH_INSTANCE *Instance,
|
||||
IN UINTN BlockAddress
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
EFI_STATUS Status;
|
||||
UINTN Index;
|
||||
EFI_TPL OriginalTPL;
|
||||
|
||||
// Unlock the block if we have to
|
||||
Status = NorFlashUnlockSingleBlockIfNecessary (BlockAddress);
|
||||
if (!EFI_ERROR(Status)) {
|
||||
Status = NorFlashEraseSingleBlock(BlockAddress);
|
||||
// Raise TPL to TPL_HIGH to stop anyone from interrupting us.
|
||||
OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL);
|
||||
|
||||
Index = 0;
|
||||
// The block erase might fail a first time (SW bug ?). Retry it ...
|
||||
do {
|
||||
// Unlock the block if we have to
|
||||
Status = NorFlashUnlockSingleBlockIfNecessary (Instance, BlockAddress);
|
||||
if (!EFI_ERROR(Status)) {
|
||||
Status = NorFlashEraseSingleBlock (Instance, BlockAddress);
|
||||
}
|
||||
Index++;
|
||||
} while ((Index < NOR_FLASH_ERASE_RETRY) && (Status == EFI_WRITE_PROTECTED));
|
||||
|
||||
if (Index == NOR_FLASH_ERASE_RETRY) {
|
||||
DEBUG((EFI_D_ERROR,"EraseSingleBlock(BlockAddress=0x%08x: Block Locked Error (try to erase %d times)\n", BlockAddress,Index));
|
||||
}
|
||||
|
||||
// Interruptions can resume.
|
||||
gBS->RestoreTPL (OriginalTPL);
|
||||
|
||||
return Status;
|
||||
}
|
||||
|
||||
|
||||
EFI_STATUS
|
||||
NorFlashWriteSingleWord (
|
||||
IN UINTN WordAddress,
|
||||
IN UINT32 WriteData
|
||||
IN NOR_FLASH_INSTANCE *Instance,
|
||||
IN UINTN WordAddress,
|
||||
IN UINT32 WriteData
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
volatile UINT32 *Data;
|
||||
UINT32 StatusRegister;
|
||||
|
||||
// Prepare the read address
|
||||
Data = (UINT32 *)WordAddress;
|
||||
Status = EFI_SUCCESS;
|
||||
|
||||
// Request a write single word command
|
||||
SEND_NOR_COMMAND( WordAddress, 0, P30_CMD_WORD_PROGRAM_SETUP );
|
||||
SEND_NOR_COMMAND(WordAddress, 0, P30_CMD_WORD_PROGRAM_SETUP);
|
||||
|
||||
// Store the word into NOR Flash;
|
||||
*Data = WriteData;
|
||||
MmioWrite32 (WordAddress, WriteData);
|
||||
|
||||
// Wait for the write to complete and then check for any errors; i.e. check the Status Register
|
||||
Status = NorFlashReadStatusRegister( WordAddress );
|
||||
do {
|
||||
// Prepare to read the status register
|
||||
StatusRegister = NorFlashReadStatusRegister (Instance, WordAddress);
|
||||
// The chip is busy while the WRITE bit is not asserted
|
||||
} while ((StatusRegister & P30_SR_BIT_WRITE) != P30_SR_BIT_WRITE);
|
||||
|
||||
|
||||
// Perform a full status check:
|
||||
// Mask the relevant bits of Status Register.
|
||||
// Everything should be zero, if not, we have a problem
|
||||
|
||||
if (StatusRegister & P30_SR_BIT_VPP) {
|
||||
DEBUG((EFI_D_ERROR,"NorFlashWriteSingleWord(WordAddress:0x%X): VPP Range Error\n",WordAddress));
|
||||
Status = EFI_DEVICE_ERROR;
|
||||
}
|
||||
|
||||
if (StatusRegister & P30_SR_BIT_PROGRAM) {
|
||||
DEBUG((EFI_D_ERROR,"NorFlashWriteSingleWord(WordAddress:0x%X): Program Error\n",WordAddress));
|
||||
Status = EFI_DEVICE_ERROR;
|
||||
}
|
||||
|
||||
if (StatusRegister & P30_SR_BIT_BLOCK_LOCKED) {
|
||||
DEBUG((EFI_D_ERROR,"NorFlashWriteSingleWord(WordAddress:0x%X): Device Protect Error\n",WordAddress));
|
||||
Status = EFI_DEVICE_ERROR;
|
||||
}
|
||||
|
||||
if (!EFI_ERROR(Status)) {
|
||||
// Clear the Status Register
|
||||
SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_CLEAR_STATUS_REGISTER);
|
||||
}
|
||||
|
||||
// Put device back into Read Array mode
|
||||
SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_ARRAY);
|
||||
|
||||
return Status;
|
||||
}
|
||||
|
|
@ -427,36 +438,40 @@ NorFlashWriteSingleWord (
|
|||
*/
|
||||
EFI_STATUS
|
||||
NorFlashWriteBuffer (
|
||||
IN UINTN TargetAddress,
|
||||
IN UINTN BufferSizeInBytes,
|
||||
IN UINT32 *Buffer
|
||||
IN NOR_FLASH_INSTANCE *Instance,
|
||||
IN UINTN TargetAddress,
|
||||
IN UINTN BufferSizeInBytes,
|
||||
IN UINT32 *Buffer
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
UINTN BufferSizeInWords;
|
||||
UINTN Count;
|
||||
volatile UINT32 *Data;
|
||||
UINTN WaitForBuffer = MAX_BUFFERED_PROG_ITERATIONS;
|
||||
BOOLEAN BufferAvailable = FALSE;
|
||||
UINTN WaitForBuffer;
|
||||
BOOLEAN BufferAvailable;
|
||||
UINT32 StatusRegister;
|
||||
|
||||
WaitForBuffer = MAX_BUFFERED_PROG_ITERATIONS;
|
||||
BufferAvailable = FALSE;
|
||||
|
||||
// Check that the target address does not cross a 32-word boundary.
|
||||
if ( (TargetAddress & BOUNDARY_OF_32_WORDS) != 0 ) {
|
||||
if ((TargetAddress & BOUNDARY_OF_32_WORDS) != 0) {
|
||||
return EFI_INVALID_PARAMETER;
|
||||
}
|
||||
|
||||
// Check there are some data to program
|
||||
if ( BufferSizeInBytes == 0 ) {
|
||||
if (BufferSizeInBytes == 0) {
|
||||
return EFI_BUFFER_TOO_SMALL;
|
||||
}
|
||||
|
||||
// Check that the buffer size does not exceed the maximum hardware buffer size on chip.
|
||||
if ( BufferSizeInBytes > P30_MAX_BUFFER_SIZE_IN_BYTES ) {
|
||||
if (BufferSizeInBytes > P30_MAX_BUFFER_SIZE_IN_BYTES) {
|
||||
return EFI_BAD_BUFFER_SIZE;
|
||||
}
|
||||
|
||||
// Check that the buffer size is a multiple of 32-bit words
|
||||
if ( (BufferSizeInBytes % 4) != 0 ) {
|
||||
if ((BufferSizeInBytes % 4) != 0) {
|
||||
return EFI_BAD_BUFFER_SIZE;
|
||||
}
|
||||
|
||||
|
|
@ -468,21 +483,22 @@ NorFlashWriteBuffer (
|
|||
// Check the availability of the buffer
|
||||
do {
|
||||
// Issue the Buffered Program Setup command
|
||||
SEND_NOR_COMMAND( TargetAddress, 0, P30_CMD_BUFFERED_PROGRAM_SETUP );
|
||||
SEND_NOR_COMMAND(TargetAddress, 0, P30_CMD_BUFFERED_PROGRAM_SETUP);
|
||||
|
||||
// Read back the status register bit#7 from the same address
|
||||
if ( ((*Data) & P30_SR_BIT_WRITE) == P30_SR_BIT_WRITE ) {
|
||||
if (((*Data) & P30_SR_BIT_WRITE) == P30_SR_BIT_WRITE) {
|
||||
BufferAvailable = TRUE;
|
||||
}
|
||||
|
||||
// Update the loop counter
|
||||
WaitForBuffer--;
|
||||
|
||||
} while (( WaitForBuffer > 0 ) && ( BufferAvailable == FALSE ));
|
||||
} while ((WaitForBuffer > 0) && (BufferAvailable == FALSE));
|
||||
|
||||
// The buffer was not available for writing
|
||||
if ( WaitForBuffer == 0 ) {
|
||||
return EFI_DEVICE_ERROR;
|
||||
if (WaitForBuffer == 0) {
|
||||
Status = EFI_DEVICE_ERROR;
|
||||
goto EXIT;
|
||||
}
|
||||
|
||||
// From now on we work in 32-bit words
|
||||
|
|
@ -490,52 +506,92 @@ NorFlashWriteBuffer (
|
|||
|
||||
// Write the word count, which is (buffer_size_in_words - 1),
|
||||
// because word count 0 means one word.
|
||||
SEND_NOR_COMMAND( TargetAddress, 0, (BufferSizeInWords - 1) );
|
||||
SEND_NOR_COMMAND(TargetAddress, 0, (BufferSizeInWords - 1));
|
||||
|
||||
// Write the data to the NOR Flash, advancing each address by 4 bytes
|
||||
for( Count=0; Count<BufferSizeInWords; Count++, Data++, Buffer++ ) {
|
||||
for(Count=0; Count < BufferSizeInWords; Count++, Data++, Buffer++) {
|
||||
*Data = *Buffer;
|
||||
}
|
||||
|
||||
// Issue the Buffered Program Confirm command, to start the programming operation
|
||||
SEND_NOR_COMMAND( TargetAddress, 0, P30_CMD_BUFFERED_PROGRAM_CONFIRM );
|
||||
SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_BUFFERED_PROGRAM_CONFIRM);
|
||||
|
||||
// Wait for the write to complete and then check for any errors; i.e. check the Status Register
|
||||
Status = NorFlashReadStatusRegister( TargetAddress );
|
||||
do {
|
||||
StatusRegister = NorFlashReadStatusRegister (Instance, TargetAddress);
|
||||
// The chip is busy while the WRITE bit is not asserted
|
||||
} while ((StatusRegister & P30_SR_BIT_WRITE) != P30_SR_BIT_WRITE);
|
||||
|
||||
|
||||
// Perform a full status check:
|
||||
// Mask the relevant bits of Status Register.
|
||||
// Everything should be zero, if not, we have a problem
|
||||
|
||||
Status = EFI_SUCCESS;
|
||||
|
||||
if (StatusRegister & P30_SR_BIT_VPP) {
|
||||
DEBUG((EFI_D_ERROR,"NorFlashWriteBuffer(TargetAddress:0x%X): VPP Range Error\n", TargetAddress));
|
||||
Status = EFI_DEVICE_ERROR;
|
||||
}
|
||||
|
||||
if (StatusRegister & P30_SR_BIT_PROGRAM) {
|
||||
DEBUG((EFI_D_ERROR,"NorFlashWriteBuffer(TargetAddress:0x%X): Program Error\n", TargetAddress));
|
||||
Status = EFI_DEVICE_ERROR;
|
||||
}
|
||||
|
||||
if (StatusRegister & P30_SR_BIT_BLOCK_LOCKED) {
|
||||
DEBUG((EFI_D_ERROR,"NorFlashWriteBuffer(TargetAddress:0x%X): Device Protect Error\n",TargetAddress));
|
||||
Status = EFI_DEVICE_ERROR;
|
||||
}
|
||||
|
||||
if (!EFI_ERROR(Status)) {
|
||||
// Clear the Status Register
|
||||
SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_CLEAR_STATUS_REGISTER);
|
||||
}
|
||||
|
||||
EXIT:
|
||||
// Put device back into Read Array mode
|
||||
SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_ARRAY);
|
||||
|
||||
return Status;
|
||||
}
|
||||
|
||||
EFI_STATUS
|
||||
NorFlashWriteSingleBlock (
|
||||
IN UINTN DeviceBaseAddress,
|
||||
IN EFI_LBA Lba,
|
||||
IN UINT32 *DataBuffer,
|
||||
IN UINT32 BlockSizeInWords
|
||||
IN NOR_FLASH_INSTANCE *Instance,
|
||||
IN EFI_LBA Lba,
|
||||
IN UINT32 *DataBuffer,
|
||||
IN UINT32 BlockSizeInWords
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status = EFI_SUCCESS;
|
||||
EFI_STATUS Status;
|
||||
UINTN WordAddress;
|
||||
UINT32 WordIndex;
|
||||
UINTN BufferIndex;
|
||||
UINTN BlockAddress;
|
||||
UINTN BuffersInBlock;
|
||||
UINTN RemainingWords;
|
||||
EFI_TPL OriginalTPL;
|
||||
|
||||
Status = EFI_SUCCESS;
|
||||
|
||||
// Get the physical address of the block
|
||||
BlockAddress = GET_NOR_BLOCK_ADDRESS(DeviceBaseAddress, Lba, BlockSizeInWords * 4);
|
||||
|
||||
Status = NorFlashUnlockAndEraseSingleBlock( BlockAddress );
|
||||
if (EFI_ERROR(Status)) {
|
||||
DEBUG((EFI_D_ERROR, "WriteSingleBlock: ERROR - Failed to Unlock and Erase the single block at 0x%X\n", BlockAddress));
|
||||
return Status;
|
||||
}
|
||||
|
||||
// To speed up the programming operation, NOR Flash is programmed using the Buffered Programming method.
|
||||
BlockAddress = GET_NOR_BLOCK_ADDRESS (Instance->RegionBaseAddress, Lba, BlockSizeInWords * 4);
|
||||
|
||||
// Start writing from the first address at the start of the block
|
||||
WordAddress = BlockAddress;
|
||||
|
||||
// Raise TPL to TPL_HIGH to stop anyone from interrupting us.
|
||||
OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL);
|
||||
|
||||
Status = NorFlashUnlockAndEraseSingleBlock (Instance, BlockAddress);
|
||||
if (EFI_ERROR(Status)) {
|
||||
DEBUG((EFI_D_ERROR, "WriteSingleBlock: ERROR - Failed to Unlock and Erase the single block at 0x%X\n", BlockAddress));
|
||||
goto EXIT;
|
||||
}
|
||||
|
||||
// To speed up the programming operation, NOR Flash is programmed using the Buffered Programming method.
|
||||
|
||||
// Check that the address starts at a 32-word boundary, i.e. last 7 bits must be zero
|
||||
if ((WordAddress & BOUNDARY_OF_32_WORDS) == 0x00) {
|
||||
|
||||
|
|
@ -543,11 +599,11 @@ NorFlashWriteSingleBlock (
|
|||
BuffersInBlock = (UINTN)BlockSizeInWords / P30_MAX_BUFFER_SIZE_IN_BYTES;
|
||||
|
||||
// Then feed each buffer chunk to the NOR Flash
|
||||
for( BufferIndex=0;
|
||||
for(BufferIndex=0;
|
||||
BufferIndex < BuffersInBlock;
|
||||
BufferIndex++, WordAddress += P30_MAX_BUFFER_SIZE_IN_BYTES, DataBuffer += P30_MAX_BUFFER_SIZE_IN_WORDS
|
||||
) {
|
||||
Status = NorFlashWriteBuffer ( WordAddress, P30_MAX_BUFFER_SIZE_IN_BYTES, DataBuffer );
|
||||
) {
|
||||
Status = NorFlashWriteBuffer (Instance, WordAddress, P30_MAX_BUFFER_SIZE_IN_BYTES, DataBuffer);
|
||||
if (EFI_ERROR(Status)) {
|
||||
goto EXIT;
|
||||
}
|
||||
|
|
@ -556,8 +612,8 @@ NorFlashWriteSingleBlock (
|
|||
// Finally, finish off any remaining words that are less than the maximum size of the buffer
|
||||
RemainingWords = BlockSizeInWords % P30_MAX_BUFFER_SIZE_IN_WORDS;
|
||||
|
||||
if( RemainingWords != 0) {
|
||||
Status = NorFlashWriteBuffer ( WordAddress, (RemainingWords * 4), DataBuffer );
|
||||
if(RemainingWords != 0) {
|
||||
Status = NorFlashWriteBuffer (Instance, WordAddress, (RemainingWords * 4), DataBuffer);
|
||||
if (EFI_ERROR(Status)) {
|
||||
goto EXIT;
|
||||
}
|
||||
|
|
@ -567,15 +623,18 @@ NorFlashWriteSingleBlock (
|
|||
// For now, use the single word programming algorithm
|
||||
// It is unlikely that the NOR Flash will exist in an address which falls within a 32 word boundary range,
|
||||
// i.e. which ends in the range 0x......01 - 0x......7F.
|
||||
for( WordIndex=0; WordIndex<BlockSizeInWords; WordIndex++, DataBuffer++, WordAddress = WordAddress + 4 ) {
|
||||
Status = NorFlashWriteSingleWord( WordAddress, *DataBuffer );
|
||||
for(WordIndex=0; WordIndex<BlockSizeInWords; WordIndex++, DataBuffer++, WordAddress = WordAddress + 4) {
|
||||
Status = NorFlashWriteSingleWord (Instance, WordAddress, *DataBuffer);
|
||||
if (EFI_ERROR(Status)) {
|
||||
goto EXIT;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
EXIT:
|
||||
EXIT:
|
||||
// Interruptions can resume.
|
||||
gBS->RestoreTPL (OriginalTPL);
|
||||
|
||||
if (EFI_ERROR(Status)) {
|
||||
DEBUG((EFI_D_ERROR, "NOR FLASH Programming [WriteSingleBlock] failed at address 0x%08x. Exit Status = \"%r\".\n", WordAddress, Status));
|
||||
}
|
||||
|
|
@ -585,7 +644,7 @@ NorFlashWriteSingleBlock (
|
|||
|
||||
EFI_STATUS
|
||||
NorFlashWriteBlocks (
|
||||
IN NOR_FLASH_INSTANCE *Instance,
|
||||
IN NOR_FLASH_INSTANCE *Instance,
|
||||
IN EFI_LBA Lba,
|
||||
IN UINTN BufferSizeInBytes,
|
||||
IN VOID *Buffer
|
||||
|
|
@ -603,18 +662,18 @@ NorFlashWriteBlocks (
|
|||
return EFI_INVALID_PARAMETER;
|
||||
}
|
||||
|
||||
if( Instance->Media.ReadOnly == TRUE ) {
|
||||
if(Instance->Media.ReadOnly == TRUE) {
|
||||
return EFI_WRITE_PROTECTED;
|
||||
}
|
||||
|
||||
// We must have some bytes to read
|
||||
DEBUG((DEBUG_BLKIO, "NorFlashWriteBlocks: BufferSizeInBytes=0x%x\n", BufferSizeInBytes));
|
||||
if( BufferSizeInBytes == 0 ) {
|
||||
if(BufferSizeInBytes == 0) {
|
||||
return EFI_BAD_BUFFER_SIZE;
|
||||
}
|
||||
|
||||
// The size of the buffer must be a multiple of the block size
|
||||
DEBUG((DEBUG_BLKIO, "NorFlashWriteBlocks: BlockSize in bytes =0x%x\n", Instance->Media.BlockSize ));
|
||||
DEBUG((DEBUG_BLKIO, "NorFlashWriteBlocks: BlockSize in bytes =0x%x\n", Instance->Media.BlockSize));
|
||||
if ((BufferSizeInBytes % Instance->Media.BlockSize) != 0) {
|
||||
return EFI_BAD_BUFFER_SIZE;
|
||||
}
|
||||
|
|
@ -624,7 +683,7 @@ NorFlashWriteBlocks (
|
|||
|
||||
DEBUG((DEBUG_BLKIO, "NorFlashWriteBlocks: NumBlocks=%d, LastBlock=%ld, Lba=%ld.\n", NumBlocks, Instance->Media.LastBlock, Lba));
|
||||
|
||||
if ( ( Lba + NumBlocks ) > ( Instance->Media.LastBlock + 1 ) ) {
|
||||
if ((Lba + NumBlocks) > (Instance->Media.LastBlock + 1)) {
|
||||
DEBUG((EFI_D_ERROR, "NorFlashWriteBlocks: ERROR - Write will exceed last block.\n"));
|
||||
return EFI_INVALID_PARAMETER;
|
||||
}
|
||||
|
|
@ -636,29 +695,27 @@ NorFlashWriteBlocks (
|
|||
pWriteBuffer = (UINT32 *)Buffer;
|
||||
|
||||
CurrentBlock = Lba;
|
||||
for( BlockCount=0; BlockCount<NumBlocks; BlockCount++, CurrentBlock++, pWriteBuffer = pWriteBuffer + BlockSizeInWords ) {
|
||||
for (BlockCount=0; BlockCount < NumBlocks; BlockCount++, CurrentBlock++, pWriteBuffer = pWriteBuffer + BlockSizeInWords) {
|
||||
|
||||
DEBUG((DEBUG_BLKIO, "NorFlashWriteBlocks: Writing block #%d\n", (UINTN)CurrentBlock ));
|
||||
DEBUG((DEBUG_BLKIO, "NorFlashWriteBlocks: Writing block #%d\n", (UINTN)CurrentBlock));
|
||||
|
||||
Status = NorFlashWriteSingleBlock( Instance->BaseAddress, CurrentBlock, pWriteBuffer, BlockSizeInWords );
|
||||
Status = NorFlashWriteSingleBlock (Instance, CurrentBlock, pWriteBuffer, BlockSizeInWords);
|
||||
|
||||
if (EFI_ERROR(Status)) {
|
||||
break;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
DEBUG((DEBUG_BLKIO, "NorFlashWriteBlocks: Exit Status = \"%r\".\n", Status));
|
||||
return Status;
|
||||
}
|
||||
|
||||
|
||||
EFI_STATUS
|
||||
NorFlashReadBlocks (
|
||||
IN NOR_FLASH_INSTANCE *Instance,
|
||||
IN EFI_LBA Lba,
|
||||
IN UINTN BufferSizeInBytes,
|
||||
OUT VOID *Buffer
|
||||
IN EFI_LBA Lba,
|
||||
IN UINTN BufferSizeInBytes,
|
||||
OUT VOID *Buffer
|
||||
)
|
||||
{
|
||||
UINT32 NumBlocks;
|
||||
|
|
@ -671,12 +728,12 @@ NorFlashReadBlocks (
|
|||
|
||||
// We must have some bytes to read
|
||||
DEBUG((DEBUG_BLKIO, "NorFlashReadBlocks: BufferSize=0x%x bytes.\n", BufferSizeInBytes));
|
||||
if( BufferSizeInBytes == 0 ) {
|
||||
if(BufferSizeInBytes == 0) {
|
||||
return EFI_BAD_BUFFER_SIZE;
|
||||
}
|
||||
|
||||
// The size of the buffer must be a multiple of the block size
|
||||
DEBUG((DEBUG_BLKIO, "NorFlashReadBlocks: BlockSize=0x%x bytes.\n", Instance->Media.BlockSize ));
|
||||
DEBUG((DEBUG_BLKIO, "NorFlashReadBlocks: BlockSize=0x%x bytes.\n", Instance->Media.BlockSize));
|
||||
if ((BufferSizeInBytes % Instance->Media.BlockSize) != 0) {
|
||||
return EFI_BAD_BUFFER_SIZE;
|
||||
}
|
||||
|
|
@ -686,19 +743,19 @@ NorFlashReadBlocks (
|
|||
|
||||
DEBUG((DEBUG_BLKIO, "NorFlashReadBlocks: NumBlocks=%d, LastBlock=%ld, Lba=%ld\n", NumBlocks, Instance->Media.LastBlock, Lba));
|
||||
|
||||
if ( ( Lba + NumBlocks ) > (Instance->Media.LastBlock + 1) ) {
|
||||
if ((Lba + NumBlocks) > (Instance->Media.LastBlock + 1)) {
|
||||
DEBUG((EFI_D_ERROR, "NorFlashReadBlocks: ERROR - Read will exceed last block\n"));
|
||||
return EFI_INVALID_PARAMETER;
|
||||
}
|
||||
|
||||
// Get the address to start reading from
|
||||
StartAddress = GET_NOR_BLOCK_ADDRESS (Instance->BaseAddress,
|
||||
StartAddress = GET_NOR_BLOCK_ADDRESS (Instance->RegionBaseAddress,
|
||||
Lba,
|
||||
Instance->Media.BlockSize
|
||||
);
|
||||
);
|
||||
|
||||
// Put the device into Read Array mode
|
||||
SEND_NOR_COMMAND (Instance->BaseAddress, 0, P30_CMD_READ_ARRAY);
|
||||
SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_ARRAY);
|
||||
|
||||
// Readout the data
|
||||
CopyMem(Buffer, (UINTN *)StartAddress, BufferSizeInBytes);
|
||||
|
|
@ -706,19 +763,16 @@ NorFlashReadBlocks (
|
|||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
EFI_STATUS
|
||||
NorFlashReset (
|
||||
IN NOR_FLASH_INSTANCE *Instance
|
||||
)
|
||||
{
|
||||
// As there is no specific RESET to perform, ensure that the devices is in the default Read Array mode
|
||||
SEND_NOR_COMMAND( Instance->BaseAddress, 0, P30_CMD_READ_ARRAY);
|
||||
SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_ARRAY);
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
NorFlashInitialise (
|
||||
|
|
@ -744,16 +798,17 @@ NorFlashInitialise (
|
|||
return Status;
|
||||
}
|
||||
|
||||
mNorFlashInstances = AllocatePool(sizeof(NOR_FLASH_INSTANCE*) * NorFlashDeviceCount);
|
||||
mNorFlashInstances = AllocatePool (sizeof(NOR_FLASH_INSTANCE*) * NorFlashDeviceCount);
|
||||
|
||||
for (Index = 0; Index < NorFlashDeviceCount; Index++) {
|
||||
// Check if this NOR Flash device contain the variable storage region
|
||||
ContainVariableStorage =
|
||||
(NorFlashDevices[Index].BaseAddress <= PcdGet32 (PcdFlashNvStorageVariableBase)) &&
|
||||
(PcdGet32 (PcdFlashNvStorageVariableBase) + PcdGet32 (PcdFlashNvStorageVariableSize) <= NorFlashDevices[Index].BaseAddress + NorFlashDevices[Index].Size);
|
||||
(NorFlashDevices[Index].RegionBaseAddress <= PcdGet32 (PcdFlashNvStorageVariableBase)) &&
|
||||
(PcdGet32 (PcdFlashNvStorageVariableBase) + PcdGet32 (PcdFlashNvStorageVariableSize) <= NorFlashDevices[Index].RegionBaseAddress + NorFlashDevices[Index].Size);
|
||||
|
||||
Status = NorFlashCreateInstance (
|
||||
NorFlashDevices[Index].BaseAddress,
|
||||
NorFlashDevices[Index].DeviceBaseAddress,
|
||||
NorFlashDevices[Index].RegionBaseAddress,
|
||||
NorFlashDevices[Index].Size,
|
||||
Index,
|
||||
NorFlashDevices[Index].BlockSize,
|
||||
|
|
|
|||
|
|
@ -1,6 +1,7 @@
|
|||
/** @file NorFlashDxe.h
|
||||
|
||||
Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
|
||||
Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
|
|
@ -26,13 +27,15 @@
|
|||
#include <Library/NorFlashPlatformLib.h>
|
||||
#include <Library/UefiLib.h>
|
||||
|
||||
#define HIGH_16_BITS 0xFFFF0000
|
||||
#define LOW_16_BITS 0x0000FFFF
|
||||
#define LOW_8_BITS 0x000000FF
|
||||
#define NOR_FLASH_ERASE_RETRY 10
|
||||
|
||||
// Device access macros
|
||||
// These are necessary because we use 2 x 16bit parts to make up 32bit data
|
||||
|
||||
#define HIGH_16_BITS 0xFFFF0000
|
||||
#define LOW_16_BITS 0x0000FFFF
|
||||
#define LOW_8_BITS 0x000000FF
|
||||
|
||||
#define FOLD_32BIT_INTO_16BIT(value) ( ( value >> 16 ) | ( value & LOW_16_BITS ) )
|
||||
|
||||
#define GET_LOW_BYTE(value) ( value & LOW_8_BITS )
|
||||
|
|
@ -42,7 +45,7 @@
|
|||
// i.e. at the lower 16 bits AND at the higher 16 bits
|
||||
#define CREATE_NOR_ADDRESS(BaseAddr,OffsetAddr) ((BaseAddr) + ((OffsetAddr) << 2))
|
||||
#define CREATE_DUAL_CMD(Cmd) ( ( Cmd << 16) | ( Cmd & LOW_16_BITS) )
|
||||
#define SEND_NOR_COMMAND(BaseAddr,OffsetAddr,Cmd) MmioWrite32 (CREATE_NOR_ADDRESS(BaseAddr,OffsetAddr), CREATE_DUAL_CMD(Cmd))
|
||||
#define SEND_NOR_COMMAND(BaseAddr,Offset,Cmd) MmioWrite32 (CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd))
|
||||
#define GET_NOR_BLOCK_ADDRESS(BaseAddr,Lba,LbaSize)( BaseAddr + (UINTN)((Lba) * LbaSize) )
|
||||
|
||||
// Status Register Bits
|
||||
|
|
@ -128,7 +131,8 @@ struct _NOR_FLASH_INSTANCE {
|
|||
BOOLEAN Initialized;
|
||||
NOR_FLASH_INITIALIZE Initialize;
|
||||
|
||||
UINTN BaseAddress;
|
||||
UINTN DeviceBaseAddress;
|
||||
UINTN RegionBaseAddress;
|
||||
UINTN Size;
|
||||
EFI_LBA StartLba;
|
||||
|
||||
|
|
@ -141,45 +145,21 @@ struct _NOR_FLASH_INSTANCE {
|
|||
NOR_FLASH_DEVICE_PATH DevicePath;
|
||||
};
|
||||
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
NorFlashGetDriverName (
|
||||
IN EFI_COMPONENT_NAME_PROTOCOL *This,
|
||||
IN CHAR8 *Language,
|
||||
OUT CHAR16 **DriverName
|
||||
);
|
||||
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
NorFlashGetControllerName (
|
||||
IN EFI_COMPONENT_NAME_PROTOCOL *This,
|
||||
IN EFI_HANDLE ControllerHandle,
|
||||
IN EFI_HANDLE ChildHandle OPTIONAL,
|
||||
IN CHAR8 *Language,
|
||||
OUT CHAR16 **ControllerName
|
||||
);
|
||||
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
NorFlashBlkIoInitialize (
|
||||
IN NOR_FLASH_INSTANCE* Instance
|
||||
);
|
||||
|
||||
EFI_STATUS
|
||||
NorFlashReadCfiData (
|
||||
IN UINTN BaseAddress,
|
||||
IN UINTN CFI_Offset,
|
||||
IN UINT32 NumberOfBytes,
|
||||
IN UINTN DeviceBaseAddress,
|
||||
IN UINTN CFI_Offset,
|
||||
IN UINT32 NumberOfBytes,
|
||||
OUT UINT32 *Data
|
||||
);
|
||||
);
|
||||
|
||||
EFI_STATUS
|
||||
NorFlashWriteBuffer (
|
||||
IN UINTN TargetAddress,
|
||||
IN UINTN BufferSizeInBytes,
|
||||
IN UINT32 *Buffer
|
||||
);
|
||||
|
||||
IN NOR_FLASH_INSTANCE *Instance,
|
||||
IN UINTN TargetAddress,
|
||||
IN UINTN BufferSizeInBytes,
|
||||
IN UINT32 *Buffer
|
||||
);
|
||||
|
||||
//
|
||||
// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.Reset
|
||||
|
|
@ -235,28 +215,28 @@ EFI_STATUS
|
|||
EFIAPI
|
||||
NorFlashFvbInitialize (
|
||||
IN NOR_FLASH_INSTANCE* Instance
|
||||
);
|
||||
);
|
||||
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
FvbGetAttributes(
|
||||
IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
|
||||
OUT EFI_FVB_ATTRIBUTES_2 *Attributes
|
||||
);
|
||||
);
|
||||
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
FvbSetAttributes(
|
||||
IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
|
||||
IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
|
||||
);
|
||||
);
|
||||
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
FvbGetPhysicalAddress(
|
||||
IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
|
||||
OUT EFI_PHYSICAL_ADDRESS *Address
|
||||
);
|
||||
);
|
||||
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
|
|
@ -265,7 +245,7 @@ FvbGetBlockSize(
|
|||
IN EFI_LBA Lba,
|
||||
OUT UINTN *BlockSize,
|
||||
OUT UINTN *NumberOfBlocks
|
||||
);
|
||||
);
|
||||
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
|
|
@ -275,7 +255,7 @@ FvbRead(
|
|||
IN UINTN Offset,
|
||||
IN OUT UINTN *NumBytes,
|
||||
IN OUT UINT8 *Buffer
|
||||
);
|
||||
);
|
||||
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
|
|
@ -285,31 +265,32 @@ FvbWrite(
|
|||
IN UINTN Offset,
|
||||
IN OUT UINTN *NumBytes,
|
||||
IN UINT8 *Buffer
|
||||
);
|
||||
);
|
||||
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
FvbEraseBlocks(
|
||||
IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
|
||||
...
|
||||
);
|
||||
);
|
||||
|
||||
//
|
||||
// NorFlashDxe.c
|
||||
//
|
||||
|
||||
EFI_STATUS
|
||||
NorFlashUnlockAndEraseSingleBlock(
|
||||
IN UINTN BlockAddress
|
||||
);
|
||||
NorFlashUnlockAndEraseSingleBlock (
|
||||
IN NOR_FLASH_INSTANCE *Instance,
|
||||
IN UINTN BlockAddress
|
||||
);
|
||||
|
||||
EFI_STATUS
|
||||
NorFlashWriteSingleBlock (
|
||||
IN UINTN DeviceBaseAddress,
|
||||
IN EFI_LBA Lba,
|
||||
IN UINT32 *pDataBuffer,
|
||||
IN UINT32 BlockSizeInWords
|
||||
);
|
||||
IN NOR_FLASH_INSTANCE *Instance,
|
||||
IN EFI_LBA Lba,
|
||||
IN UINT32 *DataBuffer,
|
||||
IN UINT32 BlockSizeInWords
|
||||
);
|
||||
|
||||
EFI_STATUS
|
||||
NorFlashWriteBlocks (
|
||||
|
|
@ -317,19 +298,19 @@ NorFlashWriteBlocks (
|
|||
IN EFI_LBA Lba,
|
||||
IN UINTN BufferSizeInBytes,
|
||||
IN VOID *Buffer
|
||||
);
|
||||
);
|
||||
|
||||
EFI_STATUS
|
||||
NorFlashReadBlocks (
|
||||
IN NOR_FLASH_INSTANCE *Instance,
|
||||
IN EFI_LBA Lba,
|
||||
IN UINTN BufferSizeInBytes,
|
||||
OUT VOID *Buffer
|
||||
);
|
||||
IN NOR_FLASH_INSTANCE *Instance,
|
||||
IN EFI_LBA Lba,
|
||||
IN UINTN BufferSizeInBytes,
|
||||
OUT VOID *Buffer
|
||||
);
|
||||
|
||||
EFI_STATUS
|
||||
NorFlashReset (
|
||||
IN NOR_FLASH_INSTANCE *Instance
|
||||
);
|
||||
);
|
||||
|
||||
#endif /* __NOR_FLASH_DXE_H__ */
|
||||
|
|
|
|||
|
|
@ -1,8 +1,9 @@
|
|||
#/** @file
|
||||
#
|
||||
# Component discription file for NorFlashDxe module
|
||||
# Component description file for NorFlashDxe module
|
||||
#
|
||||
# Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
|
||||
#
|
||||
# Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
|
|
@ -35,6 +36,7 @@
|
|||
IoLib
|
||||
BaseLib
|
||||
DebugLib
|
||||
HobLib
|
||||
NorFlashPlatformLib
|
||||
UefiLib
|
||||
UefiDriverEntryPoint
|
||||
|
|
@ -56,6 +58,8 @@
|
|||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
|
||||
|
||||
gArmPlatformTokenSpaceGuid.PcdNorFlashCheckBlockLocked
|
||||
|
||||
[Depex]
|
||||
#
|
||||
|
|
|
|||
|
|
@ -1,6 +1,7 @@
|
|||
/*++ @file NorFlashFvbDxe.c
|
||||
|
||||
Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
|
||||
Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
|
|
@ -15,6 +16,7 @@
|
|||
|
||||
#include <Library/PcdLib.h>
|
||||
#include <Library/BaseLib.h>
|
||||
#include <Library/HobLib.h>
|
||||
#include <Library/UefiLib.h>
|
||||
#include <Library/BaseMemoryLib.h>
|
||||
#include <Library/MemoryAllocationLib.h>
|
||||
|
|
@ -54,8 +56,8 @@ InitializeFvAndVariableStoreHeaders (
|
|||
EFI_FIRMWARE_VOLUME_HEADER *FirmwareVolumeHeader;
|
||||
VARIABLE_STORE_HEADER *VariableStoreHeader;
|
||||
|
||||
if (!Instance->Initialized) {
|
||||
Instance->Initialize(Instance);
|
||||
if (!Instance->Initialized && Instance->Initialize) {
|
||||
Instance->Initialize (Instance);
|
||||
}
|
||||
|
||||
HeadersLength = sizeof(EFI_FIRMWARE_VOLUME_HEADER) + sizeof(EFI_FV_BLOCK_MAP_ENTRY) + sizeof(VARIABLE_STORE_HEADER);
|
||||
|
|
@ -138,7 +140,7 @@ ValidateFvHeader (
|
|||
UINTN VariableStoreLength;
|
||||
UINTN FvLength;
|
||||
|
||||
FwVolHeader = (EFI_FIRMWARE_VOLUME_HEADER*)Instance->BaseAddress;
|
||||
FwVolHeader = (EFI_FIRMWARE_VOLUME_HEADER*)Instance->RegionBaseAddress;
|
||||
|
||||
FvLength = PcdGet32(PcdFlashNvStorageVariableSize) + PcdGet32(PcdFlashNvStorageFtwWorkingSize) +
|
||||
PcdGet32(PcdFlashNvStorageFtwSpareSize);
|
||||
|
|
@ -286,7 +288,7 @@ FvbSetAttributes(
|
|||
**/
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
FvbGetPhysicalAddress(
|
||||
FvbGetPhysicalAddress (
|
||||
IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
|
||||
OUT EFI_PHYSICAL_ADDRESS *Address
|
||||
)
|
||||
|
|
@ -295,7 +297,7 @@ FvbGetPhysicalAddress(
|
|||
|
||||
Instance = INSTANCE_FROM_FVB_THIS(This);
|
||||
|
||||
DEBUG ((DEBUG_BLKIO, "FvbGetPhysicalAddress(BaseAddress=0x%08x)\n", Instance->BaseAddress));
|
||||
DEBUG ((DEBUG_BLKIO, "FvbGetPhysicalAddress(BaseAddress=0x%08x)\n", Instance->RegionBaseAddress));
|
||||
|
||||
ASSERT(Address != NULL);
|
||||
|
||||
|
|
@ -422,7 +424,7 @@ FvbRead (
|
|||
|
||||
DEBUG ((DEBUG_BLKIO, "FvbRead(Parameters: Lba=%ld, Offset=0x%x, *NumBytes=0x%x, Buffer @ 0x%08x)\n", Instance->StartLba + Lba, Offset, *NumBytes, Buffer));
|
||||
|
||||
if (!Instance->Initialized) {
|
||||
if (!Instance->Initialized && Instance->Initialize) {
|
||||
Instance->Initialize(Instance);
|
||||
}
|
||||
|
||||
|
|
@ -451,7 +453,7 @@ FvbRead (
|
|||
// FixMe: Allow an arbitrary number of bytes to be read out, not just a multiple of block size.
|
||||
|
||||
// Allocate runtime memory to read in the NOR Flash data. Variable Services are runtime.
|
||||
BlockBuffer = AllocateRuntimePool(BlockSize);
|
||||
BlockBuffer = AllocateRuntimePool (BlockSize);
|
||||
|
||||
// Check if the memory allocation was successful
|
||||
if (BlockBuffer == NULL) {
|
||||
|
|
@ -549,7 +551,7 @@ FvbWrite (
|
|||
|
||||
Instance = INSTANCE_FROM_FVB_THIS(This);
|
||||
|
||||
if (!Instance->Initialized) {
|
||||
if (!Instance->Initialized && Instance->Initialize) {
|
||||
Instance->Initialize(Instance);
|
||||
}
|
||||
|
||||
|
|
@ -586,7 +588,7 @@ FvbWrite (
|
|||
// Allocate runtime memory to read in the NOR Flash data.
|
||||
// Since the intention is to use this with Variable Services and since these are runtime,
|
||||
// allocate the memory from the runtime pool.
|
||||
BlockBuffer = AllocateRuntimePool(BlockSize);
|
||||
BlockBuffer = AllocateRuntimePool (BlockSize);
|
||||
|
||||
// Check we did get some memory
|
||||
if( BlockBuffer == NULL ) {
|
||||
|
|
@ -595,7 +597,7 @@ FvbWrite (
|
|||
}
|
||||
|
||||
// Read NOR Flash data into shadow buffer
|
||||
TempStatus = NorFlashReadBlocks(Instance, Instance->StartLba + Lba, BlockSize, BlockBuffer);
|
||||
TempStatus = NorFlashReadBlocks (Instance, Instance->StartLba + Lba, BlockSize, BlockBuffer);
|
||||
if (EFI_ERROR (TempStatus)) {
|
||||
// Return one of the pre-approved error statuses
|
||||
Status = EFI_DEVICE_ERROR;
|
||||
|
|
@ -606,7 +608,7 @@ FvbWrite (
|
|||
CopyMem((BlockBuffer + Offset), Buffer, *NumBytes);
|
||||
|
||||
// Write the modified buffer back to the NorFlash
|
||||
Status = NorFlashWriteBlocks(Instance, Instance->StartLba + Lba, BlockSize, BlockBuffer);
|
||||
Status = NorFlashWriteBlocks (Instance, Instance->StartLba + Lba, BlockSize, BlockBuffer);
|
||||
if (EFI_ERROR (TempStatus)) {
|
||||
// Return one of the pre-approved error statuses
|
||||
Status = EFI_DEVICE_ERROR;
|
||||
|
|
@ -715,7 +717,6 @@ FvbEraseBlocks (
|
|||
} while (TRUE);
|
||||
VA_END (Args);
|
||||
|
||||
|
||||
//
|
||||
// To get here, all must be ok, so start erasing
|
||||
//
|
||||
|
|
@ -738,14 +739,14 @@ FvbEraseBlocks (
|
|||
|
||||
// Get the physical address of Lba to erase
|
||||
BlockAddress = GET_NOR_BLOCK_ADDRESS (
|
||||
Instance->BaseAddress,
|
||||
Instance->RegionBaseAddress,
|
||||
Instance->StartLba + StartingLba,
|
||||
Instance->Media.BlockSize
|
||||
);
|
||||
|
||||
// Erase it
|
||||
DEBUG ((DEBUG_BLKIO, "FvbEraseBlocks: Erasing Lba=%ld @ 0x%08x.\n", Instance->StartLba + StartingLba, BlockAddress));
|
||||
Status = NorFlashUnlockAndEraseSingleBlock (BlockAddress);
|
||||
Status = NorFlashUnlockAndEraseSingleBlock (Instance, BlockAddress);
|
||||
if (EFI_ERROR(Status)) {
|
||||
VA_END (Args);
|
||||
Status = EFI_DEVICE_ERROR;
|
||||
|
|
@ -771,21 +772,24 @@ NorFlashFvbInitialize (
|
|||
{
|
||||
EFI_STATUS Status;
|
||||
UINT32 FvbNumLba;
|
||||
EFI_BOOT_MODE BootMode;
|
||||
|
||||
DEBUG((DEBUG_BLKIO,"NorFlashFvbInitialize\n"));
|
||||
|
||||
Status = NorFlashBlkIoInitialize (Instance);
|
||||
if (EFI_ERROR(Status)) {
|
||||
DEBUG((EFI_D_ERROR,"NorFlashFvbInitialize: ERROR - Failed to initialize FVB\n"));
|
||||
return Status;
|
||||
}
|
||||
Instance->Initialized = TRUE;
|
||||
|
||||
// Set the index of the first LBA for the FVB
|
||||
Instance->StartLba = (PcdGet32 (PcdFlashNvStorageVariableBase) - Instance->BaseAddress) / Instance->Media.BlockSize;
|
||||
Instance->StartLba = (PcdGet32 (PcdFlashNvStorageVariableBase) - Instance->RegionBaseAddress) / Instance->Media.BlockSize;
|
||||
|
||||
// Determine if there is a valid header at the beginning of the NorFlash
|
||||
Status = ValidateFvHeader (Instance);
|
||||
BootMode = GetBootModeHob ();
|
||||
if (BootMode == BOOT_WITH_DEFAULT_SETTINGS) {
|
||||
Status = EFI_INVALID_PARAMETER;
|
||||
} else {
|
||||
// Determine if there is a valid header at the beginning of the NorFlash
|
||||
Status = ValidateFvHeader (Instance);
|
||||
}
|
||||
|
||||
// Install the Default FVB header if required
|
||||
if (EFI_ERROR(Status)) {
|
||||
// There is no valid header, so time to install one.
|
||||
DEBUG((EFI_D_ERROR,"NorFlashFvbInitialize: ERROR - The FVB Header is not valid. Installing a correct one for this volume.\n"));
|
||||
|
|
|
|||
|
|
@ -1,6 +1,7 @@
|
|||
/** @file
|
||||
|
||||
Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
|
||||
Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
|
|
@ -15,10 +16,11 @@
|
|||
#define _NORFLASHPLATFORMLIB_H_
|
||||
|
||||
typedef struct {
|
||||
UINTN BaseAddress;
|
||||
UINTN Size;
|
||||
UINTN BlockSize;
|
||||
EFI_GUID Guid;
|
||||
UINTN DeviceBaseAddress; // Start address of the Device Base Address (DBA)
|
||||
UINTN RegionBaseAddress; // Start address of one single region
|
||||
UINTN Size;
|
||||
UINTN BlockSize;
|
||||
EFI_GUID Guid;
|
||||
} NOR_FLASH_DESCRIPTION;
|
||||
|
||||
EFI_STATUS
|
||||
|
|
|
|||
Loading…
Reference in New Issue