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ArmPlatformPkg/NorFlashDxe: Fixed CFI NOR Flash driver

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CFI Flash differentiates DeviceBaseAddress with BlockAddress in
its protocol. The DeviceBaseAddress was not considered in the
previous version of this driver.
This version also fixes some bugs in the implementation of the
CFI protocol.

This new version also uses the Boot Mode Hob to reinitialized the
FVB when Boot Mode is equal to BOOT_WITH_DEFAULT_SETTINGS.



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13064 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
oliviermartin 2012-02-28 17:32:47 +00:00
parent e34114ea3f
commit 68dda854c6
9 changed files with 375 additions and 360 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
ArmPlatformPkg/ArmPlatformPkg.dec
View File

@ -1,6 +1,6 @@
#/** @file #/** @file
# #
# Copyright (c) 2011, ARM Limited. All rights reserved. # Copyright (c) 2011-2012, ARM Limited. All rights reserved.
# #
# This program and the accompanying materials # This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License # are licensed and made available under the terms and conditions of the BSD License
@ -52,6 +52,8 @@
gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec|FALSE|BOOLEAN|0x00000002 gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec|FALSE|BOOLEAN|0x00000002
gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores|FALSE|BOOLEAN|0x00000004 gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores|FALSE|BOOLEAN|0x00000004
gArmPlatformTokenSpaceGuid.PcdNorFlashCheckBlockLocked|FALSE|BOOLEAN|0x0000003C
[PcdsFixedAtBuild.common] [PcdsFixedAtBuild.common]
gArmPlatformTokenSpaceGuid.PcdClusterCount|1|UINT32|0x00000038 gArmPlatformTokenSpaceGuid.PcdClusterCount|1|UINT32|0x00000038

4
ArmPlatformPkg/ArmRealViewEbPkg/Library/NorFlashArmRealViewEbLib/NorFlashArmRealViewEb.c
View File

@ -1,6 +1,7 @@
/** @file /** @file
Copyright (c) 2011, ARM Ltd. All rights reserved.<BR> Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
This program and the accompanying materials This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at which accompanies this distribution. The full text of the license may be found at
@ -20,6 +21,7 @@
// RTSM // RTSM
NOR_FLASH_DESCRIPTION mNorFlashDevices[NOR_FLASH_DEVICE_COUNT] = { NOR_FLASH_DESCRIPTION mNorFlashDevices[NOR_FLASH_DEVICE_COUNT] = {
{ // UEFI { // UEFI
ARM_EB_SMB_NOR_BASE,
ARM_EB_SMB_NOR_BASE, ARM_EB_SMB_NOR_BASE,
SIZE_128KB * 512, SIZE_128KB * 512,
SIZE_128KB, SIZE_128KB,

7
ArmPlatformPkg/ArmVExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpress.c
View File

@ -1,6 +1,7 @@
/** @file /** @file
Copyright (c) 2011, ARM Ltd. All rights reserved.<BR> Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
This program and the accompanying materials This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at which accompanies this distribution. The full text of the license may be found at
@ -21,24 +22,28 @@
NOR_FLASH_DESCRIPTION mNorFlashDevices[NOR_FLASH_DEVICE_COUNT] = { NOR_FLASH_DESCRIPTION mNorFlashDevices[NOR_FLASH_DEVICE_COUNT] = {
{ // BootMon { // BootMon
ARM_VE_SMB_NOR0_BASE,
ARM_VE_SMB_NOR0_BASE, ARM_VE_SMB_NOR0_BASE,
SIZE_256KB * 255, SIZE_256KB * 255,
SIZE_256KB, SIZE_256KB,
{0xE7223039, 0x5836, 0x41E1, 0xB5, 0x42, 0xD7, 0xEC, 0x73, 0x6C, 0x5E, 0x59} {0xE7223039, 0x5836, 0x41E1, 0xB5, 0x42, 0xD7, 0xEC, 0x73, 0x6C, 0x5E, 0x59}
}, },
{ // BootMon non-volatile storage { // BootMon non-volatile storage
ARM_VE_SMB_NOR0_BASE,
ARM_VE_SMB_NOR0_BASE + SIZE_256KB * 255, ARM_VE_SMB_NOR0_BASE + SIZE_256KB * 255,
SIZE_64KB * 4, SIZE_64KB * 4,
SIZE_64KB, SIZE_64KB,
{0x02118005, 0x9DA7, 0x443A, 0x92, 0xD5, 0x78, 0x1F, 0x02, 0x2A, 0xED, 0xBB} {0x02118005, 0x9DA7, 0x443A, 0x92, 0xD5, 0x78, 0x1F, 0x02, 0x2A, 0xED, 0xBB}
}, },
{ // UEFI { // UEFI
ARM_VE_SMB_NOR1_BASE,
ARM_VE_SMB_NOR1_BASE, ARM_VE_SMB_NOR1_BASE,
SIZE_256KB * 255, SIZE_256KB * 255,
SIZE_256KB, SIZE_256KB,
{0x1F15DA3C, 0x37FF, 0x4070, 0xB4, 0x71, 0xBB, 0x4A, 0xF1, 0x2A, 0x72, 0x4A} {0x1F15DA3C, 0x37FF, 0x4070, 0xB4, 0x71, 0xBB, 0x4A, 0xF1, 0x2A, 0x72, 0x4A}
}, },
{ // UEFI Variable Services non-volatile storage { // UEFI Variable Services non-volatile storage
ARM_VE_SMB_NOR1_BASE,
ARM_VE_SMB_NOR1_BASE + SIZE_256KB * 255, ARM_VE_SMB_NOR1_BASE + SIZE_256KB * 255,
SIZE_64KB * 3, //FIXME: Set 3 blocks because I did not succeed to copy 4 blocks into the ARM Versatile Express NOR Flash in the last NOR Flash. It should be 4 blocks SIZE_64KB * 3, //FIXME: Set 3 blocks because I did not succeed to copy 4 blocks into the ARM Versatile Express NOR Flash in the last NOR Flash. It should be 4 blocks
SIZE_64KB, SIZE_64KB,

44
ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashBlockIoDxe.c
View File

@ -1,6 +1,7 @@
/** @file NorFlashBlockIoDxe.c /** @file NorFlashBlockIoDxe.c
Copyright (c) 2011, ARM Ltd. All rights reserved.<BR> Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
This program and the accompanying materials This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at which accompanies this distribution. The full text of the license may be found at
@ -16,47 +17,6 @@
#include "NorFlashDxe.h" #include "NorFlashDxe.h"
EFI_STATUS
EFIAPI
NorFlashBlkIoInitialize (
IN NOR_FLASH_INSTANCE* Instance
)
{
UINT32 Reply;
EFI_STATUS Status = EFI_SUCCESS;
DEBUG((DEBUG_BLKIO,"NorFlashBlkIoInitialize()\n"));
//
// Verify that there is a physical hardware device where we expect it to be.
//
// Read a specific CFI query that returns back "QRY"
// This ensures that there is really a device present there
SEND_NOR_COMMAND (Instance->BaseAddress, 0, P30_CMD_READ_CFI_QUERY);
// Read CFI 'QRY' data
Status = NorFlashReadCfiData (Instance->BaseAddress, P30_CFI_ADDR_QUERY_UNIQUE_QRY, 3, &Reply);
if (EFI_ERROR(Status)) {
return Status;
}
if (Reply != CFI_QRY) {
DEBUG((EFI_D_ERROR, "NorFlashBlkIoInitialize: CFI QRY=0x%x (expected 0x595251)\n", Reply));
return EFI_DEVICE_ERROR;
}
// Reset the device
Status = NorFlashBlockIoReset (&Instance->BlockIoProtocol, FALSE);
if (EFI_ERROR(Status)) {
return Status;
}
Instance->Initialized = TRUE;
return EFI_SUCCESS;
}
// //
// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.Reset // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.Reset
// //

375
ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.c
View File

@ -1,6 +1,7 @@
/** @file NorFlashDxe.c /** @file NorFlashDxe.c
Copyright (c) 2011, ARM Ltd. All rights reserved.<BR> Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
This program and the accompanying materials This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at which accompanies this distribution. The full text of the license may be found at
@ -32,7 +33,8 @@ NOR_FLASH_INSTANCE mNorFlashInstanceTemplate = {
FALSE, // Initialized FALSE, // Initialized
NULL, // Initialize NULL, // Initialize
0, // BaseAddress ... NEED TO BE FILLED 0, // DeviceBaseAddress ... NEED TO BE FILLED
0, // RegionBaseAddress ... NEED TO BE FILLED
0, // Size ... NEED TO BE FILLED 0, // Size ... NEED TO BE FILLED
0, // StartLba 0, // StartLba
@ -92,7 +94,8 @@ NOR_FLASH_INSTANCE mNorFlashInstanceTemplate = {
EFI_STATUS EFI_STATUS
NorFlashCreateInstance ( NorFlashCreateInstance (
IN UINTN NorFlashBase, IN UINTN NorFlashDeviceBase,
IN UINTN NorFlashRegionBase,
IN UINTN NorFlashSize, IN UINTN NorFlashSize,
IN UINT32 MediaId, IN UINT32 MediaId,
IN UINT32 BlockSize, IN UINT32 BlockSize,
@ -111,7 +114,8 @@ NorFlashCreateInstance (
return EFI_OUT_OF_RESOURCES; return EFI_OUT_OF_RESOURCES;
} }
Instance->BaseAddress = NorFlashBase; Instance->DeviceBaseAddress = NorFlashDeviceBase;
Instance->RegionBaseAddress = NorFlashRegionBase;
Instance->Size = NorFlashSize; Instance->Size = NorFlashSize;
Instance->BlockIoProtocol.Media = &Instance->Media; Instance->BlockIoProtocol.Media = &Instance->Media;
@ -137,7 +141,7 @@ NorFlashCreateInstance (
return Status; return Status;
} }
} else { } else {
Instance->Initialize = NorFlashBlkIoInitialize; Instance->Initialized = TRUE;
Status = gBS->InstallMultipleProtocolInterfaces ( Status = gBS->InstallMultipleProtocolInterfaces (
&Instance->Handle, &Instance->Handle,
@ -155,131 +159,28 @@ NorFlashCreateInstance (
return Status; return Status;
} }
EFI_STATUS UINT32
NorFlashReadCfiData (
IN UINTN BaseAddress,
IN UINTN CfiOffset,
IN UINT32 NumberOfBytes,
OUT UINT32 *Data
)
{
UINT32 CurrentByte;
UINTN ReadAddress;
UINT32 ReadData;
UINT32 Byte1;
UINT32 Byte2;
UINT32 CombinedData = 0;
EFI_STATUS Status = EFI_SUCCESS;
if (NumberOfBytes > 4) {
// Using 32 bit variable so can only read 4 bytes
return EFI_INVALID_PARAMETER;
}
// First combine the base address with the offset address to create an absolute read address.
// However, because we are in little endian, read from the last address down to the first
ReadAddress = CREATE_NOR_ADDRESS (BaseAddress, CfiOffset) + (NumberOfBytes - 1) * sizeof(UINT32);
// Although each read returns 32 bits, because of the NOR Flash structure,
// each 16 bits (16 MSB and 16 LSB) come from two different chips.
// When in CFI mode, each chip read returns valid data in only the 8 LSBits;
// the 8 MSBits are invalid and can be ignored.
// Therefore, each read address returns one byte from each chip.
//
// Also note: As we are in little endian notation and we are reading
// bytes from incremental addresses, we should assemble them in little endian order.
for (CurrentByte=0; CurrentByte<NumberOfBytes; CurrentByte++) {
// Read the bytes from the two chips
ReadData = MmioRead32(ReadAddress);
// Check the data validity:
// The 'Dual Data' function means that
// each chip should return identical data.
// If that is not the case then we have a problem.
Byte1 = GET_LOW_BYTE (ReadData);
Byte2 = GET_HIGH_BYTE(ReadData);
if(Byte1 != Byte2) {
// The two bytes should have been identical
return EFI_DEVICE_ERROR;
} else {
// Each successive iteration of the 'for' loop reads a lower address.
// As we read lower addresses and as we use little endian,
// we read lower significance bytes. So combine them in the correct order.
CombinedData = (CombinedData << 8) | Byte1;
// Decrement down to the next address
ReadAddress -= sizeof(UINT32);
}
}
*Data = CombinedData;
return Status;
}
EFI_STATUS
NorFlashReadStatusRegister ( NorFlashReadStatusRegister (
IN NOR_FLASH_INSTANCE *Instance,
IN UINTN SR_Address IN UINTN SR_Address
) )
{ {
volatile UINT32 *pStatusRegister;
UINT32 StatusRegister;
UINT32 ErrorMask;
EFI_STATUS Status = EFI_SUCCESS;
// Prepare the read address
pStatusRegister = (UINT32 *) SR_Address;
do {
// Prepare to read the status register // Prepare to read the status register
SEND_NOR_COMMAND (SR_Address, 0, P30_CMD_READ_STATUS_REGISTER); SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_STATUS_REGISTER);
// Snapshot the status register return MmioRead32 (Instance->DeviceBaseAddress);
StatusRegister = *pStatusRegister;
}
// The chip is busy while the WRITE bit is not asserted
while ((StatusRegister & P30_SR_BIT_WRITE) != P30_SR_BIT_WRITE);
// Perform a full status check:
// Mask the relevant bits of Status Register.
// Everything should be zero, if not, we have a problem
// Prepare the Error Mask by setting bits 5, 4, 3, 1
ErrorMask = P30_SR_BIT_ERASE | P30_SR_BIT_PROGRAM | P30_SR_BIT_VPP | P30_SR_BIT_BLOCK_LOCKED ;
if ( (StatusRegister & ErrorMask) != 0 ) {
if ( (StatusRegister & P30_SR_BIT_VPP) != 0 ) {
DEBUG((EFI_D_ERROR,"NorFlashReadStatusRegister: VPP Range Error\n"));
} else if ( (StatusRegister & (P30_SR_BIT_ERASE | P30_SR_BIT_PROGRAM) ) != 0 ) {
DEBUG((EFI_D_ERROR,"NorFlashReadStatusRegister: Command Sequence Error\n"));
} else if ( (StatusRegister & P30_SR_BIT_PROGRAM) != 0 ) {
DEBUG((EFI_D_ERROR,"NorFlashReadStatusRegister: Program Error\n"));
} else if ( (StatusRegister & P30_SR_BIT_BLOCK_LOCKED) != 0 ) {
DEBUG((EFI_D_ERROR,"NorFlashReadStatusRegister: Device Protect Error\n"));
} else {
DEBUG((EFI_D_ERROR,"NorFlashReadStatusRegister: Error (0x%X)\n",Status));
}
// If an error is detected we must clear the Status Register
SEND_NOR_COMMAND(SR_Address, 0, P30_CMD_CLEAR_STATUS_REGISTER);
Status = EFI_DEVICE_ERROR;
}
SEND_NOR_COMMAND(SR_Address, 0, P30_CMD_READ_ARRAY);
return Status;
} }
BOOLEAN BOOLEAN
NorFlashBlockIsLocked ( NorFlashBlockIsLocked (
IN NOR_FLASH_INSTANCE *Instance,
IN UINTN BlockAddress IN UINTN BlockAddress
) )
{ {
UINT32 LockStatus; UINT32 LockStatus;
BOOLEAN BlockIsLocked = TRUE; BOOLEAN BlockIsLocked;
BlockIsLocked = TRUE;
// Send command for reading device id // Send command for reading device id
SEND_NOR_COMMAND (BlockAddress, 2, P30_CMD_READ_DEVICE_ID); SEND_NOR_COMMAND (BlockAddress, 2, P30_CMD_READ_DEVICE_ID);
@ -291,7 +192,7 @@ NorFlashBlockIsLocked (
LockStatus = FOLD_32BIT_INTO_16BIT(LockStatus); LockStatus = FOLD_32BIT_INTO_16BIT(LockStatus);
if ((LockStatus & 0x2) != 0) { if ((LockStatus & 0x2) != 0) {
DEBUG((EFI_D_ERROR, "UnlockSingleBlock: WARNING: Block LOCKED DOWN\n")); DEBUG((EFI_D_ERROR, "NorFlashBlockIsLocked: WARNING: Block LOCKED DOWN\n"));
} }
if ((LockStatus & 0x1) == 0) { if ((LockStatus & 0x1) == 0) {
@ -306,20 +207,46 @@ NorFlashBlockIsLocked (
EFI_STATUS EFI_STATUS
NorFlashUnlockSingleBlock ( NorFlashUnlockSingleBlock (
IN NOR_FLASH_INSTANCE *Instance,
IN UINTN BlockAddress IN UINTN BlockAddress
) )
{ {
EFI_STATUS Status = EFI_SUCCESS; EFI_STATUS Status = EFI_SUCCESS;
UINT32 LockStatus;
// Raise the Task Priority Level to TPL_NOTIFY to serialise all its operations // Raise the Task Priority Level to TPL_NOTIFY to serialise all its operations
// and to protect shared data structures. // and to protect shared data structures.
if (FeaturePcdGet (PcdNorFlashCheckBlockLocked) == TRUE) {
do {
// Request a lock setup // Request a lock setup
SEND_NOR_COMMAND (BlockAddress, 0, P30_CMD_LOCK_BLOCK_SETUP); SEND_NOR_COMMAND (BlockAddress, 0, P30_CMD_LOCK_BLOCK_SETUP);
// Request an unlock // Request an unlock
SEND_NOR_COMMAND (BlockAddress, 0, P30_CMD_UNLOCK_BLOCK); SEND_NOR_COMMAND (BlockAddress, 0, P30_CMD_UNLOCK_BLOCK);
// Send command for reading device id
SEND_NOR_COMMAND (BlockAddress, 2, P30_CMD_READ_DEVICE_ID);
// Read block lock status
LockStatus = MmioRead32 (CREATE_NOR_ADDRESS(BlockAddress, 2));
// Decode block lock status
LockStatus = FOLD_32BIT_INTO_16BIT(LockStatus);
} while ((LockStatus & 0x1) == 1);
} else {
// Request a lock setup
SEND_NOR_COMMAND (BlockAddress, 0, P30_CMD_LOCK_BLOCK_SETUP);
// Request an unlock
SEND_NOR_COMMAND (BlockAddress, 0, P30_CMD_UNLOCK_BLOCK);
// Wait until the status register gives us the all clear
do {
LockStatus = NorFlashReadStatusRegister (Instance, BlockAddress);
} while ((LockStatus & P30_SR_BIT_WRITE) != P30_SR_BIT_WRITE);
}
// Put device back into Read Array mode // Put device back into Read Array mode
SEND_NOR_COMMAND (BlockAddress, 0, P30_CMD_READ_ARRAY); SEND_NOR_COMMAND (BlockAddress, 0, P30_CMD_READ_ARRAY);
@ -331,13 +258,14 @@ NorFlashUnlockSingleBlock (
EFI_STATUS EFI_STATUS
NorFlashUnlockSingleBlockIfNecessary ( NorFlashUnlockSingleBlockIfNecessary (
IN NOR_FLASH_INSTANCE *Instance,
IN UINTN BlockAddress IN UINTN BlockAddress
) )
{ {
EFI_STATUS Status = EFI_SUCCESS; EFI_STATUS Status = EFI_SUCCESS;
if ( NorFlashBlockIsLocked(BlockAddress) == TRUE ) { if (NorFlashBlockIsLocked (Instance, BlockAddress) == TRUE) {
Status = NorFlashUnlockSingleBlock(BlockAddress); Status = NorFlashUnlockSingleBlock (Instance, BlockAddress);
} }
return Status; return Status;
@ -349,20 +277,53 @@ NorFlashUnlockSingleBlockIfNecessary (
**/ **/
EFI_STATUS EFI_STATUS
NorFlashEraseSingleBlock ( NorFlashEraseSingleBlock (
IN NOR_FLASH_INSTANCE *Instance,
IN UINTN BlockAddress IN UINTN BlockAddress
) )
{ {
EFI_STATUS Status = EFI_SUCCESS; EFI_STATUS Status;
UINT32 StatusRegister;
Status = EFI_SUCCESS;
// Request a block erase and then confirm it // Request a block erase and then confirm it
SEND_NOR_COMMAND(BlockAddress, 0, P30_CMD_BLOCK_ERASE_SETUP); SEND_NOR_COMMAND(BlockAddress, 0, P30_CMD_BLOCK_ERASE_SETUP);
SEND_NOR_COMMAND(BlockAddress, 0, P30_CMD_BLOCK_ERASE_CONFIRM); SEND_NOR_COMMAND(BlockAddress, 0, P30_CMD_BLOCK_ERASE_CONFIRM);
// Wait until the status register gives us the all clear // Wait until the status register gives us the all clear
Status = NorFlashReadStatusRegister( BlockAddress ); do {
StatusRegister = NorFlashReadStatusRegister (Instance, BlockAddress);
} while ((StatusRegister & P30_SR_BIT_WRITE) != P30_SR_BIT_WRITE);
if (StatusRegister & P30_SR_BIT_VPP) {
DEBUG((EFI_D_ERROR,"EraseSingleBlock(BlockAddress=0x%08x: VPP Range Error\n", BlockAddress));
Status = EFI_DEVICE_ERROR;
}
if ((StatusRegister & (P30_SR_BIT_ERASE | P30_SR_BIT_PROGRAM)) == (P30_SR_BIT_ERASE | P30_SR_BIT_PROGRAM)) {
DEBUG((EFI_D_ERROR,"EraseSingleBlock(BlockAddress=0x%08x: Command Sequence Error\n", BlockAddress));
Status = EFI_DEVICE_ERROR;
}
if (StatusRegister & P30_SR_BIT_ERASE) {
DEBUG((EFI_D_ERROR,"EraseSingleBlock(BlockAddress=0x%08x: Block Erase Error StatusRegister:0x%X\n", BlockAddress, StatusRegister));
Status = EFI_DEVICE_ERROR;
}
if (StatusRegister & P30_SR_BIT_BLOCK_LOCKED) {
// The debug level message has been reduced because a device lock might happen. In this case we just retry it ...
DEBUG((EFI_D_INFO,"EraseSingleBlock(BlockAddress=0x%08x: Block Locked Error\n", BlockAddress));
Status = EFI_WRITE_PROTECTED;
}
if (EFI_ERROR(Status)) { if (EFI_ERROR(Status)) {
DEBUG((DEBUG_BLKIO, "EraseSingleBlock(BlockAddress=0x%08x) = '%r'\n", BlockAddress, Status)); // Clear the Status Register
SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_CLEAR_STATUS_REGISTER);
} }
// Put device back into Read Array mode
SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_ARRAY);
return Status; return Status;
} }
@ -371,16 +332,34 @@ NorFlashEraseSingleBlock (
**/ **/
EFI_STATUS EFI_STATUS
NorFlashUnlockAndEraseSingleBlock ( NorFlashUnlockAndEraseSingleBlock (
IN NOR_FLASH_INSTANCE *Instance,
IN UINTN BlockAddress IN UINTN BlockAddress
) )
{ {
EFI_STATUS Status; EFI_STATUS Status;
UINTN Index;
EFI_TPL OriginalTPL;
// Raise TPL to TPL_HIGH to stop anyone from interrupting us.
OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL);
Index = 0;
// The block erase might fail a first time (SW bug ?). Retry it ...
do {
// Unlock the block if we have to // Unlock the block if we have to
Status = NorFlashUnlockSingleBlockIfNecessary (BlockAddress); Status = NorFlashUnlockSingleBlockIfNecessary (Instance, BlockAddress);
if (!EFI_ERROR(Status)) { if (!EFI_ERROR(Status)) {
Status = NorFlashEraseSingleBlock(BlockAddress); Status = NorFlashEraseSingleBlock (Instance, BlockAddress);
} }
Index++;
} while ((Index < NOR_FLASH_ERASE_RETRY) && (Status == EFI_WRITE_PROTECTED));
if (Index == NOR_FLASH_ERASE_RETRY) {
DEBUG((EFI_D_ERROR,"EraseSingleBlock(BlockAddress=0x%08x: Block Locked Error (try to erase %d times)\n", BlockAddress,Index));
}
// Interruptions can resume.
gBS->RestoreTPL (OriginalTPL);
return Status; return Status;
} }
@ -388,24 +367,56 @@ NorFlashUnlockAndEraseSingleBlock (
EFI_STATUS EFI_STATUS
NorFlashWriteSingleWord ( NorFlashWriteSingleWord (
IN NOR_FLASH_INSTANCE *Instance,
IN UINTN WordAddress, IN UINTN WordAddress,
IN UINT32 WriteData IN UINT32 WriteData
) )
{ {
EFI_STATUS Status; EFI_STATUS Status;
volatile UINT32 *Data; UINT32 StatusRegister;
// Prepare the read address Status = EFI_SUCCESS;
Data = (UINT32 *)WordAddress;
// Request a write single word command // Request a write single word command
SEND_NOR_COMMAND(WordAddress, 0, P30_CMD_WORD_PROGRAM_SETUP); SEND_NOR_COMMAND(WordAddress, 0, P30_CMD_WORD_PROGRAM_SETUP);
// Store the word into NOR Flash; // Store the word into NOR Flash;
*Data = WriteData; MmioWrite32 (WordAddress, WriteData);
// Wait for the write to complete and then check for any errors; i.e. check the Status Register // Wait for the write to complete and then check for any errors; i.e. check the Status Register
Status = NorFlashReadStatusRegister( WordAddress ); do {
// Prepare to read the status register
StatusRegister = NorFlashReadStatusRegister (Instance, WordAddress);
// The chip is busy while the WRITE bit is not asserted
} while ((StatusRegister & P30_SR_BIT_WRITE) != P30_SR_BIT_WRITE);
// Perform a full status check:
// Mask the relevant bits of Status Register.
// Everything should be zero, if not, we have a problem
if (StatusRegister & P30_SR_BIT_VPP) {
DEBUG((EFI_D_ERROR,"NorFlashWriteSingleWord(WordAddress:0x%X): VPP Range Error\n",WordAddress));
Status = EFI_DEVICE_ERROR;
}
if (StatusRegister & P30_SR_BIT_PROGRAM) {
DEBUG((EFI_D_ERROR,"NorFlashWriteSingleWord(WordAddress:0x%X): Program Error\n",WordAddress));
Status = EFI_DEVICE_ERROR;
}
if (StatusRegister & P30_SR_BIT_BLOCK_LOCKED) {
DEBUG((EFI_D_ERROR,"NorFlashWriteSingleWord(WordAddress:0x%X): Device Protect Error\n",WordAddress));
Status = EFI_DEVICE_ERROR;
}
if (!EFI_ERROR(Status)) {
// Clear the Status Register
SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_CLEAR_STATUS_REGISTER);
}
// Put device back into Read Array mode
SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_ARRAY);
return Status; return Status;
} }
@ -427,6 +438,7 @@ NorFlashWriteSingleWord (
*/ */
EFI_STATUS EFI_STATUS
NorFlashWriteBuffer ( NorFlashWriteBuffer (
IN NOR_FLASH_INSTANCE *Instance,
IN UINTN TargetAddress, IN UINTN TargetAddress,
IN UINTN BufferSizeInBytes, IN UINTN BufferSizeInBytes,
IN UINT32 *Buffer IN UINT32 *Buffer
@ -436,9 +448,12 @@ NorFlashWriteBuffer (
UINTN BufferSizeInWords; UINTN BufferSizeInWords;
UINTN Count; UINTN Count;
volatile UINT32 *Data; volatile UINT32 *Data;
UINTN WaitForBuffer = MAX_BUFFERED_PROG_ITERATIONS; UINTN WaitForBuffer;
BOOLEAN BufferAvailable = FALSE; BOOLEAN BufferAvailable;
UINT32 StatusRegister;
WaitForBuffer = MAX_BUFFERED_PROG_ITERATIONS;
BufferAvailable = FALSE;
// Check that the target address does not cross a 32-word boundary. // Check that the target address does not cross a 32-word boundary.
if ((TargetAddress & BOUNDARY_OF_32_WORDS) != 0) { if ((TargetAddress & BOUNDARY_OF_32_WORDS) != 0) {
@ -482,7 +497,8 @@ NorFlashWriteBuffer (
// The buffer was not available for writing // The buffer was not available for writing
if (WaitForBuffer == 0) { if (WaitForBuffer == 0) {
return EFI_DEVICE_ERROR; Status = EFI_DEVICE_ERROR;
goto EXIT;
} }
// From now on we work in 32-bit words // From now on we work in 32-bit words
@ -498,44 +514,84 @@ NorFlashWriteBuffer (
} }
// Issue the Buffered Program Confirm command, to start the programming operation // Issue the Buffered Program Confirm command, to start the programming operation
SEND_NOR_COMMAND( TargetAddress, 0, P30_CMD_BUFFERED_PROGRAM_CONFIRM ); SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_BUFFERED_PROGRAM_CONFIRM);
// Wait for the write to complete and then check for any errors; i.e. check the Status Register // Wait for the write to complete and then check for any errors; i.e. check the Status Register
Status = NorFlashReadStatusRegister( TargetAddress ); do {
StatusRegister = NorFlashReadStatusRegister (Instance, TargetAddress);
// The chip is busy while the WRITE bit is not asserted
} while ((StatusRegister & P30_SR_BIT_WRITE) != P30_SR_BIT_WRITE);
// Perform a full status check:
// Mask the relevant bits of Status Register.
// Everything should be zero, if not, we have a problem
Status = EFI_SUCCESS;
if (StatusRegister & P30_SR_BIT_VPP) {
DEBUG((EFI_D_ERROR,"NorFlashWriteBuffer(TargetAddress:0x%X): VPP Range Error\n", TargetAddress));
Status = EFI_DEVICE_ERROR;
}
if (StatusRegister & P30_SR_BIT_PROGRAM) {
DEBUG((EFI_D_ERROR,"NorFlashWriteBuffer(TargetAddress:0x%X): Program Error\n", TargetAddress));
Status = EFI_DEVICE_ERROR;
}
if (StatusRegister & P30_SR_BIT_BLOCK_LOCKED) {
DEBUG((EFI_D_ERROR,"NorFlashWriteBuffer(TargetAddress:0x%X): Device Protect Error\n",TargetAddress));
Status = EFI_DEVICE_ERROR;
}
if (!EFI_ERROR(Status)) {
// Clear the Status Register
SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_CLEAR_STATUS_REGISTER);
}
EXIT:
// Put device back into Read Array mode
SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_ARRAY);
return Status; return Status;
} }
EFI_STATUS EFI_STATUS
NorFlashWriteSingleBlock ( NorFlashWriteSingleBlock (
IN UINTN DeviceBaseAddress, IN NOR_FLASH_INSTANCE *Instance,
IN EFI_LBA Lba, IN EFI_LBA Lba,
IN UINT32 *DataBuffer, IN UINT32 *DataBuffer,
IN UINT32 BlockSizeInWords IN UINT32 BlockSizeInWords
) )
{ {
EFI_STATUS Status = EFI_SUCCESS; EFI_STATUS Status;
UINTN WordAddress; UINTN WordAddress;
UINT32 WordIndex; UINT32 WordIndex;
UINTN BufferIndex; UINTN BufferIndex;
UINTN BlockAddress; UINTN BlockAddress;
UINTN BuffersInBlock; UINTN BuffersInBlock;
UINTN RemainingWords; UINTN RemainingWords;
EFI_TPL OriginalTPL;
Status = EFI_SUCCESS;
// Get the physical address of the block // Get the physical address of the block
BlockAddress = GET_NOR_BLOCK_ADDRESS(DeviceBaseAddress, Lba, BlockSizeInWords * 4); BlockAddress = GET_NOR_BLOCK_ADDRESS (Instance->RegionBaseAddress, Lba, BlockSizeInWords * 4);
Status = NorFlashUnlockAndEraseSingleBlock( BlockAddress );
if (EFI_ERROR(Status)) {
DEBUG((EFI_D_ERROR, "WriteSingleBlock: ERROR - Failed to Unlock and Erase the single block at 0x%X\n", BlockAddress));
return Status;
}
// To speed up the programming operation, NOR Flash is programmed using the Buffered Programming method.
// Start writing from the first address at the start of the block // Start writing from the first address at the start of the block
WordAddress = BlockAddress; WordAddress = BlockAddress;
// Raise TPL to TPL_HIGH to stop anyone from interrupting us.
OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL);
Status = NorFlashUnlockAndEraseSingleBlock (Instance, BlockAddress);
if (EFI_ERROR(Status)) {
DEBUG((EFI_D_ERROR, "WriteSingleBlock: ERROR - Failed to Unlock and Erase the single block at 0x%X\n", BlockAddress));
goto EXIT;
}
// To speed up the programming operation, NOR Flash is programmed using the Buffered Programming method.
// Check that the address starts at a 32-word boundary, i.e. last 7 bits must be zero // Check that the address starts at a 32-word boundary, i.e. last 7 bits must be zero
if ((WordAddress & BOUNDARY_OF_32_WORDS) == 0x00) { if ((WordAddress & BOUNDARY_OF_32_WORDS) == 0x00) {
@ -547,7 +603,7 @@ NorFlashWriteSingleBlock (
BufferIndex < BuffersInBlock; BufferIndex < BuffersInBlock;
BufferIndex++, WordAddress += P30_MAX_BUFFER_SIZE_IN_BYTES, DataBuffer += P30_MAX_BUFFER_SIZE_IN_WORDS BufferIndex++, WordAddress += P30_MAX_BUFFER_SIZE_IN_BYTES, DataBuffer += P30_MAX_BUFFER_SIZE_IN_WORDS
) { ) {
Status = NorFlashWriteBuffer ( WordAddress, P30_MAX_BUFFER_SIZE_IN_BYTES, DataBuffer ); Status = NorFlashWriteBuffer (Instance, WordAddress, P30_MAX_BUFFER_SIZE_IN_BYTES, DataBuffer);
if (EFI_ERROR(Status)) { if (EFI_ERROR(Status)) {
goto EXIT; goto EXIT;
} }
@ -557,7 +613,7 @@ NorFlashWriteSingleBlock (
RemainingWords = BlockSizeInWords % P30_MAX_BUFFER_SIZE_IN_WORDS; RemainingWords = BlockSizeInWords % P30_MAX_BUFFER_SIZE_IN_WORDS;
if(RemainingWords != 0) { if(RemainingWords != 0) {
Status = NorFlashWriteBuffer ( WordAddress, (RemainingWords * 4), DataBuffer ); Status = NorFlashWriteBuffer (Instance, WordAddress, (RemainingWords * 4), DataBuffer);
if (EFI_ERROR(Status)) { if (EFI_ERROR(Status)) {
goto EXIT; goto EXIT;
} }
@ -568,7 +624,7 @@ NorFlashWriteSingleBlock (
// It is unlikely that the NOR Flash will exist in an address which falls within a 32 word boundary range, // It is unlikely that the NOR Flash will exist in an address which falls within a 32 word boundary range,
// i.e. which ends in the range 0x......01 - 0x......7F. // i.e. which ends in the range 0x......01 - 0x......7F.
for(WordIndex=0; WordIndex<BlockSizeInWords; WordIndex++, DataBuffer++, WordAddress = WordAddress + 4) { for(WordIndex=0; WordIndex<BlockSizeInWords; WordIndex++, DataBuffer++, WordAddress = WordAddress + 4) {
Status = NorFlashWriteSingleWord( WordAddress, *DataBuffer ); Status = NorFlashWriteSingleWord (Instance, WordAddress, *DataBuffer);
if (EFI_ERROR(Status)) { if (EFI_ERROR(Status)) {
goto EXIT; goto EXIT;
} }
@ -576,6 +632,9 @@ NorFlashWriteSingleBlock (
} }
EXIT: EXIT:
// Interruptions can resume.
gBS->RestoreTPL (OriginalTPL);
if (EFI_ERROR(Status)) { if (EFI_ERROR(Status)) {
DEBUG((EFI_D_ERROR, "NOR FLASH Programming [WriteSingleBlock] failed at address 0x%08x. Exit Status = \"%r\".\n", WordAddress, Status)); DEBUG((EFI_D_ERROR, "NOR FLASH Programming [WriteSingleBlock] failed at address 0x%08x. Exit Status = \"%r\".\n", WordAddress, Status));
} }
@ -640,19 +699,17 @@ NorFlashWriteBlocks (
DEBUG((DEBUG_BLKIO, "NorFlashWriteBlocks: Writing block #%d\n", (UINTN)CurrentBlock)); DEBUG((DEBUG_BLKIO, "NorFlashWriteBlocks: Writing block #%d\n", (UINTN)CurrentBlock));
Status = NorFlashWriteSingleBlock( Instance->BaseAddress, CurrentBlock, pWriteBuffer, BlockSizeInWords ); Status = NorFlashWriteSingleBlock (Instance, CurrentBlock, pWriteBuffer, BlockSizeInWords);
if (EFI_ERROR(Status)) { if (EFI_ERROR(Status)) {
break; break;
} }
} }
DEBUG((DEBUG_BLKIO, "NorFlashWriteBlocks: Exit Status = \"%r\".\n", Status)); DEBUG((DEBUG_BLKIO, "NorFlashWriteBlocks: Exit Status = \"%r\".\n", Status));
return Status; return Status;
} }
EFI_STATUS EFI_STATUS
NorFlashReadBlocks ( NorFlashReadBlocks (
IN NOR_FLASH_INSTANCE *Instance, IN NOR_FLASH_INSTANCE *Instance,
@ -692,13 +749,13 @@ NorFlashReadBlocks (
} }
// Get the address to start reading from // Get the address to start reading from
StartAddress = GET_NOR_BLOCK_ADDRESS (Instance->BaseAddress, StartAddress = GET_NOR_BLOCK_ADDRESS (Instance->RegionBaseAddress,
Lba, Lba,
Instance->Media.BlockSize Instance->Media.BlockSize
); );
// Put the device into Read Array mode // Put the device into Read Array mode
SEND_NOR_COMMAND (Instance->BaseAddress, 0, P30_CMD_READ_ARRAY); SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_ARRAY);
// Readout the data // Readout the data
CopyMem(Buffer, (UINTN *)StartAddress, BufferSizeInBytes); CopyMem(Buffer, (UINTN *)StartAddress, BufferSizeInBytes);
@ -706,19 +763,16 @@ NorFlashReadBlocks (
return EFI_SUCCESS; return EFI_SUCCESS;
} }
EFI_STATUS EFI_STATUS
NorFlashReset ( NorFlashReset (
IN NOR_FLASH_INSTANCE *Instance IN NOR_FLASH_INSTANCE *Instance
) )
{ {
// As there is no specific RESET to perform, ensure that the devices is in the default Read Array mode // As there is no specific RESET to perform, ensure that the devices is in the default Read Array mode
SEND_NOR_COMMAND( Instance->BaseAddress, 0, P30_CMD_READ_ARRAY); SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_ARRAY);
return EFI_SUCCESS; return EFI_SUCCESS;
} }
EFI_STATUS EFI_STATUS
EFIAPI EFIAPI
NorFlashInitialise ( NorFlashInitialise (
@ -749,11 +803,12 @@ NorFlashInitialise (
for (Index = 0; Index < NorFlashDeviceCount; Index++) { for (Index = 0; Index < NorFlashDeviceCount; Index++) {
// Check if this NOR Flash device contain the variable storage region // Check if this NOR Flash device contain the variable storage region
ContainVariableStorage = ContainVariableStorage =
(NorFlashDevices[Index].BaseAddress <= PcdGet32 (PcdFlashNvStorageVariableBase)) && (NorFlashDevices[Index].RegionBaseAddress <= PcdGet32 (PcdFlashNvStorageVariableBase)) &&
(PcdGet32 (PcdFlashNvStorageVariableBase) + PcdGet32 (PcdFlashNvStorageVariableSize) <= NorFlashDevices[Index].BaseAddress + NorFlashDevices[Index].Size); (PcdGet32 (PcdFlashNvStorageVariableBase) + PcdGet32 (PcdFlashNvStorageVariableSize) <= NorFlashDevices[Index].RegionBaseAddress + NorFlashDevices[Index].Size);
Status = NorFlashCreateInstance ( Status = NorFlashCreateInstance (
NorFlashDevices[Index].BaseAddress, NorFlashDevices[Index].DeviceBaseAddress,
NorFlashDevices[Index].RegionBaseAddress,
NorFlashDevices[Index].Size, NorFlashDevices[Index].Size,
Index, Index,
NorFlashDevices[Index].BlockSize, NorFlashDevices[Index].BlockSize,

49
ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.h
View File

@ -1,6 +1,7 @@
/** @file NorFlashDxe.h /** @file NorFlashDxe.h
Copyright (c) 2011, ARM Ltd. All rights reserved.<BR> Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
This program and the accompanying materials This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at which accompanies this distribution. The full text of the license may be found at
@ -26,13 +27,15 @@
#include <Library/NorFlashPlatformLib.h> #include <Library/NorFlashPlatformLib.h>
#include <Library/UefiLib.h> #include <Library/UefiLib.h>
#define HIGH_16_BITS 0xFFFF0000 #define NOR_FLASH_ERASE_RETRY 10
#define LOW_16_BITS 0x0000FFFF
#define LOW_8_BITS 0x000000FF
// Device access macros // Device access macros
// These are necessary because we use 2 x 16bit parts to make up 32bit data // These are necessary because we use 2 x 16bit parts to make up 32bit data
#define HIGH_16_BITS 0xFFFF0000
#define LOW_16_BITS 0x0000FFFF
#define LOW_8_BITS 0x000000FF
#define FOLD_32BIT_INTO_16BIT(value) ( ( value >> 16 ) | ( value & LOW_16_BITS ) ) #define FOLD_32BIT_INTO_16BIT(value) ( ( value >> 16 ) | ( value & LOW_16_BITS ) )
#define GET_LOW_BYTE(value) ( value & LOW_8_BITS ) #define GET_LOW_BYTE(value) ( value & LOW_8_BITS )
@ -42,7 +45,7 @@
// i.e. at the lower 16 bits AND at the higher 16 bits // i.e. at the lower 16 bits AND at the higher 16 bits
#define CREATE_NOR_ADDRESS(BaseAddr,OffsetAddr) ((BaseAddr) + ((OffsetAddr) << 2)) #define CREATE_NOR_ADDRESS(BaseAddr,OffsetAddr) ((BaseAddr) + ((OffsetAddr) << 2))
#define CREATE_DUAL_CMD(Cmd) ( ( Cmd << 16) | ( Cmd & LOW_16_BITS) ) #define CREATE_DUAL_CMD(Cmd) ( ( Cmd << 16) | ( Cmd & LOW_16_BITS) )
#define SEND_NOR_COMMAND(BaseAddr,OffsetAddr,Cmd) MmioWrite32 (CREATE_NOR_ADDRESS(BaseAddr,OffsetAddr), CREATE_DUAL_CMD(Cmd)) #define SEND_NOR_COMMAND(BaseAddr,Offset,Cmd) MmioWrite32 (CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd))
#define GET_NOR_BLOCK_ADDRESS(BaseAddr,Lba,LbaSize)( BaseAddr + (UINTN)((Lba) * LbaSize) ) #define GET_NOR_BLOCK_ADDRESS(BaseAddr,Lba,LbaSize)( BaseAddr + (UINTN)((Lba) * LbaSize) )
// Status Register Bits // Status Register Bits
@ -128,7 +131,8 @@ struct _NOR_FLASH_INSTANCE {
BOOLEAN Initialized; BOOLEAN Initialized;
NOR_FLASH_INITIALIZE Initialize; NOR_FLASH_INITIALIZE Initialize;
UINTN BaseAddress; UINTN DeviceBaseAddress;
UINTN RegionBaseAddress;
UINTN Size; UINTN Size;
EFI_LBA StartLba; EFI_LBA StartLba;
@ -141,33 +145,9 @@ struct _NOR_FLASH_INSTANCE {
NOR_FLASH_DEVICE_PATH DevicePath; NOR_FLASH_DEVICE_PATH DevicePath;
}; };
EFI_STATUS
EFIAPI
NorFlashGetDriverName (
IN EFI_COMPONENT_NAME_PROTOCOL *This,
IN CHAR8 *Language,
OUT CHAR16 **DriverName
);
EFI_STATUS
EFIAPI
NorFlashGetControllerName (
IN EFI_COMPONENT_NAME_PROTOCOL *This,
IN EFI_HANDLE ControllerHandle,
IN EFI_HANDLE ChildHandle OPTIONAL,
IN CHAR8 *Language,
OUT CHAR16 **ControllerName
);
EFI_STATUS
EFIAPI
NorFlashBlkIoInitialize (
IN NOR_FLASH_INSTANCE* Instance
);
EFI_STATUS EFI_STATUS
NorFlashReadCfiData ( NorFlashReadCfiData (
IN UINTN BaseAddress, IN UINTN DeviceBaseAddress,
IN UINTN CFI_Offset, IN UINTN CFI_Offset,
IN UINT32 NumberOfBytes, IN UINT32 NumberOfBytes,
OUT UINT32 *Data OUT UINT32 *Data
@ -175,12 +155,12 @@ NorFlashReadCfiData (
EFI_STATUS EFI_STATUS
NorFlashWriteBuffer ( NorFlashWriteBuffer (
IN NOR_FLASH_INSTANCE *Instance,
IN UINTN TargetAddress, IN UINTN TargetAddress,
IN UINTN BufferSizeInBytes, IN UINTN BufferSizeInBytes,
IN UINT32 *Buffer IN UINT32 *Buffer
); );
// //
// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.Reset // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.Reset
// //
@ -300,14 +280,15 @@ FvbEraseBlocks(
EFI_STATUS EFI_STATUS
NorFlashUnlockAndEraseSingleBlock ( NorFlashUnlockAndEraseSingleBlock (
IN NOR_FLASH_INSTANCE *Instance,
IN UINTN BlockAddress IN UINTN BlockAddress
); );
EFI_STATUS EFI_STATUS
NorFlashWriteSingleBlock ( NorFlashWriteSingleBlock (
IN UINTN DeviceBaseAddress, IN NOR_FLASH_INSTANCE *Instance,
IN EFI_LBA Lba, IN EFI_LBA Lba,
IN UINT32 *pDataBuffer, IN UINT32 *DataBuffer,
IN UINT32 BlockSizeInWords IN UINT32 BlockSizeInWords
); );

8
ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
View File

@ -1,8 +1,9 @@
#/** @file #/** @file
# #
# Component discription file for NorFlashDxe module # Component description file for NorFlashDxe module
#
# Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
# #
# Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
# This program and the accompanying materials # This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License # are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at # which accompanies this distribution. The full text of the license may be found at
@ -35,6 +36,7 @@
IoLib IoLib
BaseLib BaseLib
DebugLib DebugLib
HobLib
NorFlashPlatformLib NorFlashPlatformLib
UefiLib UefiLib
UefiDriverEntryPoint UefiDriverEntryPoint
@ -57,6 +59,8 @@
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
gArmPlatformTokenSpaceGuid.PcdNorFlashCheckBlockLocked
[Depex] [Depex]
# #
# NorFlashDxe must be loaded before VariableRuntimeDxe in case empty flash needs populating with default values # NorFlashDxe must be loaded before VariableRuntimeDxe in case empty flash needs populating with default values

34
ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashFvbDxe.c
View File

@ -1,6 +1,7 @@
/*++ @file NorFlashFvbDxe.c /*++ @file NorFlashFvbDxe.c
Copyright (c) 2011, ARM Ltd. All rights reserved.<BR> Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
This program and the accompanying materials This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at which accompanies this distribution. The full text of the license may be found at
@ -15,6 +16,7 @@
#include <Library/PcdLib.h> #include <Library/PcdLib.h>
#include <Library/BaseLib.h> #include <Library/BaseLib.h>
#include <Library/HobLib.h>
#include <Library/UefiLib.h> #include <Library/UefiLib.h>
#include <Library/BaseMemoryLib.h> #include <Library/BaseMemoryLib.h>
#include <Library/MemoryAllocationLib.h> #include <Library/MemoryAllocationLib.h>
@ -54,7 +56,7 @@ InitializeFvAndVariableStoreHeaders (
EFI_FIRMWARE_VOLUME_HEADER *FirmwareVolumeHeader; EFI_FIRMWARE_VOLUME_HEADER *FirmwareVolumeHeader;
VARIABLE_STORE_HEADER *VariableStoreHeader; VARIABLE_STORE_HEADER *VariableStoreHeader;
if (!Instance->Initialized) { if (!Instance->Initialized && Instance->Initialize) {
Instance->Initialize (Instance); Instance->Initialize (Instance);
} }
@ -138,7 +140,7 @@ ValidateFvHeader (
UINTN VariableStoreLength; UINTN VariableStoreLength;
UINTN FvLength; UINTN FvLength;
FwVolHeader = (EFI_FIRMWARE_VOLUME_HEADER*)Instance->BaseAddress; FwVolHeader = (EFI_FIRMWARE_VOLUME_HEADER*)Instance->RegionBaseAddress;
FvLength = PcdGet32(PcdFlashNvStorageVariableSize) + PcdGet32(PcdFlashNvStorageFtwWorkingSize) + FvLength = PcdGet32(PcdFlashNvStorageVariableSize) + PcdGet32(PcdFlashNvStorageFtwWorkingSize) +
PcdGet32(PcdFlashNvStorageFtwSpareSize); PcdGet32(PcdFlashNvStorageFtwSpareSize);
@ -295,7 +297,7 @@ FvbGetPhysicalAddress(
Instance = INSTANCE_FROM_FVB_THIS(This); Instance = INSTANCE_FROM_FVB_THIS(This);
DEBUG ((DEBUG_BLKIO, "FvbGetPhysicalAddress(BaseAddress=0x%08x)\n", Instance->BaseAddress)); DEBUG ((DEBUG_BLKIO, "FvbGetPhysicalAddress(BaseAddress=0x%08x)\n", Instance->RegionBaseAddress));
ASSERT(Address != NULL); ASSERT(Address != NULL);
@ -422,7 +424,7 @@ FvbRead (
DEBUG ((DEBUG_BLKIO, "FvbRead(Parameters: Lba=%ld, Offset=0x%x, *NumBytes=0x%x, Buffer @ 0x%08x)\n", Instance->StartLba + Lba, Offset, *NumBytes, Buffer)); DEBUG ((DEBUG_BLKIO, "FvbRead(Parameters: Lba=%ld, Offset=0x%x, *NumBytes=0x%x, Buffer @ 0x%08x)\n", Instance->StartLba + Lba, Offset, *NumBytes, Buffer));
if (!Instance->Initialized) { if (!Instance->Initialized && Instance->Initialize) {
Instance->Initialize(Instance); Instance->Initialize(Instance);
} }
@ -549,7 +551,7 @@ FvbWrite (
Instance = INSTANCE_FROM_FVB_THIS(This); Instance = INSTANCE_FROM_FVB_THIS(This);
if (!Instance->Initialized) { if (!Instance->Initialized && Instance->Initialize) {
Instance->Initialize(Instance); Instance->Initialize(Instance);
} }
@ -715,7 +717,6 @@ FvbEraseBlocks (
} while (TRUE); } while (TRUE);
VA_END (Args); VA_END (Args);
// //
// To get here, all must be ok, so start erasing // To get here, all must be ok, so start erasing
// //
@ -738,14 +739,14 @@ FvbEraseBlocks (
// Get the physical address of Lba to erase // Get the physical address of Lba to erase
BlockAddress = GET_NOR_BLOCK_ADDRESS ( BlockAddress = GET_NOR_BLOCK_ADDRESS (
Instance->BaseAddress, Instance->RegionBaseAddress,
Instance->StartLba + StartingLba, Instance->StartLba + StartingLba,
Instance->Media.BlockSize Instance->Media.BlockSize
); );
// Erase it // Erase it
DEBUG ((DEBUG_BLKIO, "FvbEraseBlocks: Erasing Lba=%ld @ 0x%08x.\n", Instance->StartLba + StartingLba, BlockAddress)); DEBUG ((DEBUG_BLKIO, "FvbEraseBlocks: Erasing Lba=%ld @ 0x%08x.\n", Instance->StartLba + StartingLba, BlockAddress));
Status = NorFlashUnlockAndEraseSingleBlock (BlockAddress); Status = NorFlashUnlockAndEraseSingleBlock (Instance, BlockAddress);
if (EFI_ERROR(Status)) { if (EFI_ERROR(Status)) {
VA_END (Args); VA_END (Args);
Status = EFI_DEVICE_ERROR; Status = EFI_DEVICE_ERROR;
@ -771,21 +772,24 @@ NorFlashFvbInitialize (
{ {
EFI_STATUS Status; EFI_STATUS Status;
UINT32 FvbNumLba; UINT32 FvbNumLba;
EFI_BOOT_MODE BootMode;
DEBUG((DEBUG_BLKIO,"NorFlashFvbInitialize\n")); DEBUG((DEBUG_BLKIO,"NorFlashFvbInitialize\n"));
Status = NorFlashBlkIoInitialize (Instance);
if (EFI_ERROR(Status)) {
DEBUG((EFI_D_ERROR,"NorFlashFvbInitialize: ERROR - Failed to initialize FVB\n"));
return Status;
}
Instance->Initialized = TRUE; Instance->Initialized = TRUE;
// Set the index of the first LBA for the FVB // Set the index of the first LBA for the FVB
Instance->StartLba = (PcdGet32 (PcdFlashNvStorageVariableBase) - Instance->BaseAddress) / Instance->Media.BlockSize; Instance->StartLba = (PcdGet32 (PcdFlashNvStorageVariableBase) - Instance->RegionBaseAddress) / Instance->Media.BlockSize;
BootMode = GetBootModeHob ();
if (BootMode == BOOT_WITH_DEFAULT_SETTINGS) {
Status = EFI_INVALID_PARAMETER;
} else {
// Determine if there is a valid header at the beginning of the NorFlash // Determine if there is a valid header at the beginning of the NorFlash
Status = ValidateFvHeader (Instance); Status = ValidateFvHeader (Instance);
}
// Install the Default FVB header if required
if (EFI_ERROR(Status)) { if (EFI_ERROR(Status)) {
// There is no valid header, so time to install one. // There is no valid header, so time to install one.
DEBUG((EFI_D_ERROR,"NorFlashFvbInitialize: ERROR - The FVB Header is not valid. Installing a correct one for this volume.\n")); DEBUG((EFI_D_ERROR,"NorFlashFvbInitialize: ERROR - The FVB Header is not valid. Installing a correct one for this volume.\n"));

6
ArmPlatformPkg/Include/Library/NorFlashPlatformLib.h
View File

@ -1,6 +1,7 @@
/** @file /** @file
Copyright (c) 2011, ARM Ltd. All rights reserved.<BR> Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
This program and the accompanying materials This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at which accompanies this distribution. The full text of the license may be found at
@ -15,7 +16,8 @@
#define _NORFLASHPLATFORMLIB_H_ #define _NORFLASHPLATFORMLIB_H_
typedef struct { typedef struct {
UINTN BaseAddress; UINTN DeviceBaseAddress; // Start address of the Device Base Address (DBA)
UINTN RegionBaseAddress; // Start address of one single region
UINTN Size; UINTN Size;
UINTN BlockSize; UINTN BlockSize;
EFI_GUID Guid; EFI_GUID Guid;