UefiCpuPkg/MpInitLib: Relocate uCode to memory to save time.

Read uCode from memory has better performance than from flash.
But it needs extra effort to let BSP copy uCode from flash to
memory. Also BSP already enable cache in SEC phase, so it use
less time to relocate uCode from flash to memory. After
verification, if system has more than one processor, it will
reduce some time if load uCode from memory.

This change enable this optimization.

Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
This commit is contained in:
Eric Dong 2018-07-13 08:40:27 +08:00
parent d900d7c985
commit 6936ee0342
1 changed files with 32 additions and 1 deletions

View File

@ -1520,6 +1520,7 @@ MpInitLibInitialize (
UINTN ApResetVectorSize;
UINTN BackupBufferAddr;
UINTN ApIdtBase;
VOID *MicrocodePatchInRam;
OldCpuMpData = GetCpuMpDataFromGuidedHob ();
if (OldCpuMpData == NULL) {
@ -1587,8 +1588,38 @@ MpInitLibInitialize (
CpuMpData->SwitchBspFlag = FALSE;
CpuMpData->CpuData = (CPU_AP_DATA *) (CpuMpData + 1);
CpuMpData->CpuInfoInHob = (UINT64) (UINTN) (CpuMpData->CpuData + MaxLogicalProcessorNumber);
CpuMpData->MicrocodePatchAddress = PcdGet64 (PcdCpuMicrocodePatchAddress);
CpuMpData->MicrocodePatchRegionSize = PcdGet64 (PcdCpuMicrocodePatchRegionSize);
//
// If platform has more than one CPU, relocate microcode to memory to reduce
// loading microcode time.
//
MicrocodePatchInRam = NULL;
if (MaxLogicalProcessorNumber > 1) {
MicrocodePatchInRam = AllocatePages (
EFI_SIZE_TO_PAGES (
(UINTN)CpuMpData->MicrocodePatchRegionSize
)
);
}
if (MicrocodePatchInRam == NULL) {
//
// there is only one processor, or no microcode patch is available, or
// memory allocation failed
//
CpuMpData->MicrocodePatchAddress = PcdGet64 (PcdCpuMicrocodePatchAddress);
} else {
//
// there are multiple processors, and a microcode patch is available, and
// memory allocation succeeded
//
CopyMem (
MicrocodePatchInRam,
(VOID *)(UINTN)PcdGet64 (PcdCpuMicrocodePatchAddress),
(UINTN)CpuMpData->MicrocodePatchRegionSize
);
CpuMpData->MicrocodePatchAddress = (UINTN)MicrocodePatchInRam;
}
InitializeSpinLock(&CpuMpData->MpLock);
//