ArmPlatformPkg: Introduction of gArmPlatformTokenSpaceGuid.PcdCoreCount

On ARM PLatforms, there is no standard way to know how many cores are
available on the platform.
This PCD is expected to contain this number.

Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13769 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
oliviermartin 2012-09-28 10:43:28 +00:00
parent 0a6653bc2a
commit 695df8ba90
10 changed files with 28 additions and 7 deletions

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@ -55,6 +55,7 @@
gArmPlatformTokenSpaceGuid.PcdNorFlashCheckBlockLocked|FALSE|BOOLEAN|0x0000003C
[PcdsFixedAtBuild.common]
gArmPlatformTokenSpaceGuid.PcdCoreCount|1|UINT32|0x00000039
gArmPlatformTokenSpaceGuid.PcdClusterCount|1|UINT32|0x00000038
# Stack for CPU Cores in Secure Mode

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@ -66,6 +66,8 @@
[PcdsFixedAtBuild.common]
gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"ARM RealView Emulation Board"
gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"ArmRealViewEb-A9x2"
gArmPlatformTokenSpaceGuid.PcdCoreCount|2
#
# NV Storage PCDs. Use base of 0x43F00000 for NOR0

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@ -95,6 +95,8 @@
gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"ARM Versatile Express"
gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"ArmVExpress"
gArmPlatformTokenSpaceGuid.PcdCoreCount|4
#
# NV Storage PCDs. Use base of 0x43FC0000 for NOR0 or 0x47FC0000 for NOR1 on Versatile Express
#

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@ -72,7 +72,6 @@
[PcdsFixedAtBuild.common]
gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"ARM Versatile Express"
gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"ArmVExpress-RTSM"
#

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@ -72,9 +72,10 @@
[PcdsFixedAtBuild.common]
gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"ARM Versatile Express"
gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"ArmVExpress-RTSM"
gArmPlatformTokenSpaceGuid.PcdCoreCount|2
#
# NV Storage PCDs. Use base of 0x0C000000 for NOR1
#

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@ -76,6 +76,8 @@
gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"ARM Versatile Express"
gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"ArmVExpress-RTSM"
gArmPlatformTokenSpaceGuid.PcdCoreCount|4
#
# NV Storage PCDs. Use base of 0x0C000000 for NOR1
#

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@ -20,7 +20,8 @@
IMPORT CEntryPoint
IMPORT ArmReadMpidr
IMPORT ArmIsMpCore
IMPORT ArmPlatformStackSet
EXPORT _ModuleEntryPoint
PRESERVE8
@ -107,11 +108,20 @@ _GetStackBaseMpCore
// r1 = The top of the Mpcore Stacks
// Stack for the primary core = PrimaryCoreStack
LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
sub r7, r1, r2
sub r8, r1, r2
// Stack for the secondary core = Number of Clusters * (4 Cores per cluster) * SecondaryStackSize
LoadConstantToReg (FixedPcdGet32(PcdClusterCount), r2)
lsl r2, r2, #2
// Stack for the secondary core = Number of Cores - 1
LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)
sub r0, r0, #1
LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)
mul r1, r1, r0
sub r8, r8, r1
// r8 = The base of the MpCore Stacks (primary stack & secondary stacks)
mov r0, r8
mov r1, r6
//ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)
LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)
mul r2, r2, r3
sub r7, r7, r2

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@ -91,6 +91,7 @@
gArmTokenSpaceGuid.PcdSystemMemorySize
gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize
gArmPlatformTokenSpaceGuid.PcdCoreCount
gArmPlatformTokenSpaceGuid.PcdClusterCount
gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
gArmTokenSpaceGuid.PcdArmPrimaryCore

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@ -85,6 +85,7 @@
gArmTokenSpaceGuid.PcdSystemMemorySize
gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize
gArmPlatformTokenSpaceGuid.PcdCoreCount
gArmPlatformTokenSpaceGuid.PcdClusterCount
gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
gArmTokenSpaceGuid.PcdArmPrimaryCore

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@ -212,6 +212,8 @@ CEntryPoint (
{
UINT64 StartTimeStamp;
ASSERT(!ArmIsMpCore() || (PcdGet32 (PcdCoreCount) > 1));
// Initialize the platform specific controllers
ArmPlatformInitialize (MpId);