mirror of https://github.com/acidanthera/audk.git
UefiCpuPkg/PiSmmCpuDxeSmm: Allocate buffer for MSRs semaphores
Allocate MSRs semaphores in allocated aligned semaphores buffer. And add it into semaphores structure. Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
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@ -1,7 +1,7 @@
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/** @file
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Code for Processor S3 restoration
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Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -48,7 +48,6 @@ AsmGetAddressMap (
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#define LEGACY_REGION_SIZE (2 * 0x1000)
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#define LEGACY_REGION_BASE (0xA0000 - LEGACY_REGION_SIZE)
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#define MSR_SPIN_LOCK_INIT_NUM 15
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ACPI_CPU_DATA mAcpiCpuData;
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UINT32 mNumberToFinish;
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@ -1210,6 +1210,7 @@ InitializeSmmCpuSemaphores (
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UINTN TotalSize;
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UINTN GlobalSemaphoresSize;
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UINTN CpuSemaphoresSize;
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UINTN MsrSemahporeSize;
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UINTN SemaphoreSize;
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UINTN Pages;
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UINTN *SemaphoreBlock;
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@ -1219,7 +1220,8 @@ InitializeSmmCpuSemaphores (
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ProcessorCount = gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus;
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GlobalSemaphoresSize = (sizeof (SMM_CPU_SEMAPHORE_GLOBAL) / sizeof (VOID *)) * SemaphoreSize;
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CpuSemaphoresSize = (sizeof (SMM_CPU_SEMAPHORE_CPU) / sizeof (VOID *)) * ProcessorCount * SemaphoreSize;
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TotalSize = GlobalSemaphoresSize + CpuSemaphoresSize;
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MsrSemahporeSize = MSR_SPIN_LOCK_INIT_NUM * SemaphoreSize;
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TotalSize = GlobalSemaphoresSize + CpuSemaphoresSize + MsrSemahporeSize;
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DEBUG((EFI_D_INFO, "One Semaphore Size = 0x%x\n", SemaphoreSize));
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DEBUG((EFI_D_INFO, "Total Semaphores Size = 0x%x\n", TotalSize));
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Pages = EFI_SIZE_TO_PAGES (TotalSize);
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@ -1246,6 +1248,12 @@ InitializeSmmCpuSemaphores (
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SemaphoreAddr += ProcessorCount * SemaphoreSize;
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mSmmCpuSemaphores.SemaphoreCpu.Present = (BOOLEAN *)SemaphoreAddr;
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SemaphoreAddr = (UINTN)SemaphoreBlock + GlobalSemaphoresSize + CpuSemaphoresSize;
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mSmmCpuSemaphores.SemaphoreMsr.Msr = (SPIN_LOCK *)SemaphoreAddr;
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mSmmCpuSemaphores.SemaphoreMsr.AvailableCounter =
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((UINTN)SemaphoreBlock + Pages * SIZE_4KB - SemaphoreAddr) / SemaphoreSize;
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ASSERT (mSmmCpuSemaphores.SemaphoreMsr.AvailableCounter >= MSR_SPIN_LOCK_INIT_NUM);
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mSmmMpSyncData->Counter = mSmmCpuSemaphores.SemaphoreGlobal.Counter;
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mSmmMpSyncData->InsideSmm = mSmmCpuSemaphores.SemaphoreGlobal.InsideSmm;
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mSmmMpSyncData->AllCpusInSync = mSmmCpuSemaphores.SemaphoreGlobal.AllCpusInSync;
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@ -323,6 +323,8 @@ typedef struct {
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volatile BOOLEAN *CandidateBsp;
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} SMM_DISPATCHER_MP_SYNC_DATA;
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#define MSR_SPIN_LOCK_INIT_NUM 15
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typedef struct {
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SPIN_LOCK SpinLock;
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UINT32 MsrIndex;
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@ -375,6 +377,13 @@ typedef struct {
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volatile BOOLEAN *Present;
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} SMM_CPU_SEMAPHORE_CPU;
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///
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/// All MSRs semaphores' pointer and counter
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///
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typedef struct {
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SPIN_LOCK *Msr;
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UINTN AvailableCounter;
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} SMM_CPU_SEMAPHORE_MSR;
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///
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/// All semaphores' information
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@ -382,6 +391,7 @@ typedef struct {
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typedef struct {
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SMM_CPU_SEMAPHORE_GLOBAL SemaphoreGlobal;
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SMM_CPU_SEMAPHORE_CPU SemaphoreCpu;
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SMM_CPU_SEMAPHORE_MSR SemaphoreMsr;
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} SMM_CPU_SEMAPHORES;
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extern IA32_DESCRIPTOR gcSmiGdtr;
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