From 69e59545b14739e004d3f0452411e195d2a3c197 Mon Sep 17 00:00:00 2001 From: Abner Chang Date: Fri, 3 Mar 2023 09:34:46 +0800 Subject: [PATCH] MdePkg/Include: Add IPMI KCS definitions BZ #4354 This change adds definitions for IPMI KCS. Spec ref: https://www.intel.com/content/www/us/en/products/docs/servers/ipmi/ipmi-second-gen-interface-spec-v2-rev1-1.html Signed-off-by: Abner Chang Cc: Michael D Kinney Cc: Liming Gao Cc: Zhiguang Liu Cc: Nickle Wang Cc: Igor Kulchytskyy Cc: Isaac Oram Cc: Abdul Lateef Attar Acked-by: Isaac Oram Reviewed-by: Michael D Kinney Reviewed-by: Tinh Nguyen --- MdePkg/Include/IndustryStandard/IpmiKcs.h | 76 +++++++++++++++++++++++ MdePkg/MdePkg.dec | 6 ++ 2 files changed, 82 insertions(+) create mode 100644 MdePkg/Include/IndustryStandard/IpmiKcs.h diff --git a/MdePkg/Include/IndustryStandard/IpmiKcs.h b/MdePkg/Include/IndustryStandard/IpmiKcs.h new file mode 100644 index 0000000000..b4f9b51f5c --- /dev/null +++ b/MdePkg/Include/IndustryStandard/IpmiKcs.h @@ -0,0 +1,76 @@ +/** @file + IPMI KCS Register Definitions + + Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + + @par Revision Reference: + IPMI Specification + Version 2.0, Rev. 1.1 + https://www.intel.com/content/www/us/en/products/docs/servers/ipmi/ipmi-second-gen-interface-spec-v2-rev1-1.html +**/ + +#ifndef IPMI_KCS_H_ +#define IPMI_KCS_H_ + +#define IPMI_KCS_STATUS_REGISTER_OFFSET 1 +#define IPMI_KCS_COMMAND_REGISTER_OFFSET 1 +#define IPMI_KCS_DATA_OUT_REGISTER_OFFSET 0 +#define IPMI_KCS_DATA_IN_REGISTER_OFFSET 0 + +/// +/// IPMI KCS Interface Status Bits +/// +#define IPMI_KCS_OBF BIT0 +#define IPMI_KCS_IBF BIT1 +#define IPMI_KCS_SMS_ATN BIT2 +#define IPMI_KCS_COMMAND_DATA BIT3 +#define IPMI_KCS_OEM1 BIT4 +#define IPMI_KCS_OEM2 BIT5 +#define IPMI_KCS_S0 BIT6 +#define IPMI_KCS_S1 BIT7 + +/// +/// IPMI KCS Interface Control Codes +/// +#define IPMI_KCS_CONTROL_CODE_GET_STATUS_ABORT 0x60 +#define IPMI_KCS_CONTROL_CODE_WRITE_START 0x61 +#define IPMI_KCS_CONTROL_CODE_WRITE_END 0x62 +#define IPMI_KCS_CONTROL_CODE_READ 0x68 + +/// +/// Status Codes +/// +#define IPMI_KCS_STATUS_NO_ERROR 0x00 +#define IPMI_KCS_STATUS_ABORT 0x01 +#define IPMI_KCS_STATUS_ILLEGAL 0x02 +#define IPMI_KCS_STATUS_LENGTH_ERROR 0x06 +#define IPMI_KCS_STATUS_UNSPECIFIED 0xFF + +/// +/// KCS Interface State Bit +/// +typedef enum { + IpmiKcsIdleState = 0, + IpmiKcsReadState, + IpmiKcsWriteState, + IpmiKcsErrorState +} IPMI_KCS_STATE; + +/// +/// IPMI KCS Interface Request Format +/// +typedef struct { + UINT8 NetFunc; + UINT8 Command; + UINT8 Data[]; +} IPMI_KCS_REQUEST_HEADER; + +/// +/// IPMI KCS Interface Response Format +/// +typedef struct { + UINT8 NetFunc; + UINT8 Command; +} IPMI_KCS_RESPONSE_HEADER; +#endif diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec index 2d643bede1..5cf04bc0cb 100644 --- a/MdePkg/MdePkg.dec +++ b/MdePkg/MdePkg.dec @@ -9,6 +9,7 @@ # (C) Copyright 2016 - 2021 Hewlett Packard Enterprise Development LP
# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.
# Copyright (c) 2021 - 2022, Arm Limited. All rights reserved.
+# Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -2342,6 +2343,11 @@ # @Prompt Memory Address of GuidedExtractHandler Table. gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress|0x1000000|UINT64|0x30001015 + ## This value is the IPMI KCS Interface I/O base address used to transmit IPMI commands. + # The value of 0xca2 is the default I/O base address defined in IPMI specification. + # @Prompt IPMI KCS Interface I/O Base Address + gEfiMdePkgTokenSpaceGuid.PcdIpmiKcsIoBaseAddress|0xca2|UINT16|0x00000031 + [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx] ## This value is used to set the base address of PCI express hierarchy. # @Prompt PCI Express Base Address.