mirror of https://github.com/acidanthera/audk.git
Gcc cleanup
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@5589 6f19259b-4bc3-4df7-8a09-765794883524
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eric_tian
parent
12b2b6c416
commit
6a28ac4441
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@ -21,32 +21,32 @@
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#include <Library/BaseLib.h>
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.globl ASM_PFX(m16Start)
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.globl ASM_PFX(m16Size)
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.globl ASM_PFX(mThunk16Attr)
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.globl ASM_PFX(m16Gdt)
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.globl ASM_PFX(m16GdtrBase)
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.globl ASM_PFX(mTransition)
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.globl ASM_PFX(InternalAsmThunk16)
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.globl ASM_PFX(m16Start)
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.globl ASM_PFX(m16Size)
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.globl ASM_PFX(mThunk16Attr)
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.globl ASM_PFX(m16Gdt)
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.globl ASM_PFX(m16GdtrBase)
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.globl ASM_PFX(mTransition)
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.globl ASM_PFX(InternalAsmThunk16)
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# define the structure of IA32_REGS
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.equ _EDI, 0 #size 4
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.equ _ESI, 4 #size 4
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.equ _EBP, 8 #size 4
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.equ _ESP, 12 #size 4
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.equ _EBX, 16 #size 4
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.equ _EDX, 20 #size 4
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.equ _ECX, 24 #size 4
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.equ _EAX, 28 #size 4
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.equ _DS, 32 #size 2
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.equ _ES, 34 #size 2
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.equ _FS, 36 #size 2
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.equ _GS, 38 #size 2
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.equ _EFLAGS, 40 #size 8
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.equ _EIP, 48 #size 4
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.equ _CS, 52 #size 2
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.equ _SS, 54 #size 2
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.equ IA32_REGS_SIZE, 56
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# define the structure of IA32_REGS
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.equ _EDI, 0 #size 4
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.equ _ESI, 4 #size 4
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.equ _EBP, 8 #size 4
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.equ _ESP, 12 #size 4
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.equ _EBX, 16 #size 4
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.equ _EDX, 20 #size 4
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.equ _ECX, 24 #size 4
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.equ _EAX, 28 #size 4
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.equ _DS, 32 #size 2
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.equ _ES, 34 #size 2
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.equ _FS, 36 #size 2
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.equ _GS, 38 #size 2
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.equ _EFLAGS, 40 #size 8
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.equ _EIP, 48 #size 4
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.equ _CS, 52 #size 2
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.equ _SS, 54 #size 2
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.equ IA32_REGS_SIZE, 56
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.data
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@ -79,8 +79,8 @@ ASM_PFX(BackFromUserCode):
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.byte 0x16 # push ss
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.byte 0xe # push cs
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.byte 0x66
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call @Base # push eip
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@Base:
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call L_Base # push eip
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L_Base:
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.byte 0x66
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pushq $0 # reserved high order 32 bits of EFlags
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.byte 0x66, 0x9c # pushfd actually
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@ -93,17 +93,17 @@ ASM_PFX(BackFromUserCode):
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.byte 0x66,0xba # mov edx, imm32
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_ThunkAttr: .space 4
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testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15, %dl
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jz @1
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jz L_1
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movl $0x15cd2401,%eax # mov ax, 2401h & int 15h
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cli # disable interrupts
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jnc @2
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@1:
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jnc L_2
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L_1:
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testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL, %dl
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jz @2
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jz L_2
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inb $0x92,%al
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orb $2,%al
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outb %al, $0x92 # deactivate A20M#
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@2:
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L_2:
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movl %ss,%eax
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lea IA32_REGS_SIZE(%esp), %bp
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#
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@ -116,9 +116,9 @@ _ThunkAttr: .space 4
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addw %ax,%bp # add ebp, eax
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movw %cs,%ax
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shlw $4,%ax
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lea (@64BitCode - @Base)(%ebx, %eax), %ax
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.byte 0x66,0x2e,0x89,0x87 # mov cs:[bx + (@64Eip - @Base)], eax
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.word @64Eip - @Base
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lea (L_64BitCode - L_Base)(%ebx, %eax), %ax
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.byte 0x66,0x2e,0x89,0x87 # mov cs:[bx + (L_64Eip - L_Base)], eax
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.word L_64Eip - L_Base
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.byte 0x66,0xb8 # mov eax, imm32
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SavedCr4: .space 4
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movq %rax, %cr4
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@ -126,7 +126,7 @@ SavedCr4: .space 4
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# rdi in the instruction below is indeed bx in 16-bit code
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#
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.byte 0x66,0x2e # 2eh is "cs:" segment override
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lgdt (SavedGdt - @Base)(%rdi)
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lgdt (SavedGdt - L_Base)(%rdi)
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.byte 0x66
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movl $0xc0000080,%ecx
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rdmsr
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@ -135,10 +135,10 @@ SavedCr4: .space 4
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.byte 0x66,0xb8 # mov eax, imm32
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SavedCr0: .space 4
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movq %rax, %cr0
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.byte 0x66,0xea # jmp far cs:@64Bit
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@64Eip: .space 4
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.byte 0x66,0xea # jmp far cs:L_64Bit
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L_64Eip: .space 4
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SavedCs: .space 2
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@64BitCode:
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L_64BitCode:
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movq %r8, %rsp
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ret
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@ -170,16 +170,16 @@ ASM_PFX(ToUserCode):
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movl %esi,%ss # set up 16-bit stack segment
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movw %bx,%sp # set up 16-bit stack pointer
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.byte 0x66 # make the following call 32-bit
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call @Base1 # push eip
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@Base1:
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popw %bp # ebp <- address of @Base1
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call L_Base1 # push eip
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L_Base1:
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popw %bp # ebp <- address of L_Base1
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pushq (IA32_REGS_SIZE + 2)(%esp)
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lea 0x0c(%rsi), %eax
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pushq %rax
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lret # execution begins at next instruction
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@RealMode:
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L_RealMode:
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.byte 0x66,0x2e # CS and operand size override
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lidt (_16Idtr - @Base1)(%rsi)
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lidt (_16Idtr - L_Base1)(%rsi)
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.byte 0x66,0x61 # popad
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.byte 0x1f # pop ds
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.byte 0x7 # pop es
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@ -273,14 +273,14 @@ ASM_PFX(InternalAsmThunk16):
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movl %edx,%ss
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pushfq
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lea -8(%rdx), %edx
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lea @RetFromRealMode, %r8
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lea L_RetFromRealMode, %r8
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pushq %r8
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movl %cs, %r8d
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movw %r8w, (SavedCs - SavedCr4)(%rcx)
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movq %rsp, %r8
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.byte 0xff, 0x69 # jmp (_EntryPoint - SavedCr4)(%rcx)
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.byte _EntryPoint - SavedCr4
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@RetFromRealMode:
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L_RetFromRealMode:
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popfq
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lidt 0x38(%rsp)
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lea -IA32_REGS_SIZE(%rbp), %eax
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