mirror of https://github.com/acidanthera/audk.git
UefiCpuPkg/PiSmmCpuDxeSmm: patch "gSmmCr3" with PatchInstructionX86()
Rename the variable to "gPatchSmmCr3" so that its association with PatchInstructionX86() is clear from the declaration, change its type to X86_ASSEMBLY_PATCH_LABEL, and patch it with PatchInstructionX86(). This lets us remove the binary (DB) encoding of some instructions in "SmmInit.nasm". Cc: Eric Dong <eric.dong@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=866 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
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@ -22,7 +22,7 @@ extern ASM_PFX(SmmInitHandler)
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extern ASM_PFX(mRebasedFlag)
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extern ASM_PFX(mRebasedFlag)
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extern ASM_PFX(mSmmRelocationOriginalAddress)
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extern ASM_PFX(mSmmRelocationOriginalAddress)
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global ASM_PFX(gSmmCr3)
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global ASM_PFX(gPatchSmmCr3)
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global ASM_PFX(gSmmCr4)
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global ASM_PFX(gSmmCr4)
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global ASM_PFX(gSmmCr0)
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global ASM_PFX(gSmmCr0)
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global ASM_PFX(gSmmJmpAddr)
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global ASM_PFX(gSmmJmpAddr)
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@ -49,8 +49,8 @@ ASM_PFX(SmmStartup):
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mov ebx, edx ; rdmsr will change edx. keep it in ebx.
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mov ebx, edx ; rdmsr will change edx. keep it in ebx.
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and ebx, BIT20 ; extract NX capability bit
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and ebx, BIT20 ; extract NX capability bit
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shr ebx, 9 ; shift bit to IA32_EFER.NXE[BIT11] position
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shr ebx, 9 ; shift bit to IA32_EFER.NXE[BIT11] position
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DB 0x66, 0xb8 ; mov eax, imm32
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mov eax, strict dword 0 ; source operand will be patched
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ASM_PFX(gSmmCr3): DD 0
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ASM_PFX(gPatchSmmCr3):
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mov cr3, eax
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mov cr3, eax
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o32 lgdt [cs:ebp + (ASM_PFX(gcSmiInitGdtr) - ASM_PFX(SmmStartup))]
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o32 lgdt [cs:ebp + (ASM_PFX(gcSmiInitGdtr) - ASM_PFX(SmmStartup))]
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DB 0x66, 0xb8 ; mov eax, imm32
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DB 0x66, 0xb8 ; mov eax, imm32
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@ -406,7 +406,7 @@ SmmRelocateBases (
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// Patch ASM code template with current CR0, CR3, and CR4 values
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// Patch ASM code template with current CR0, CR3, and CR4 values
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//
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//
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gSmmCr0 = (UINT32)AsmReadCr0 ();
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gSmmCr0 = (UINT32)AsmReadCr0 ();
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gSmmCr3 = (UINT32)AsmReadCr3 ();
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PatchInstructionX86 (gPatchSmmCr3, AsmReadCr3 (), 4);
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gSmmCr4 = (UINT32)AsmReadCr4 ();
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gSmmCr4 = (UINT32)AsmReadCr4 ();
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//
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//
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@ -309,7 +309,7 @@ extern IA32_FAR_ADDRESS gSmmJmpAddr;
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extern CONST UINT8 gcSmmInitTemplate[];
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extern CONST UINT8 gcSmmInitTemplate[];
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extern CONST UINT16 gcSmmInitSize;
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extern CONST UINT16 gcSmmInitSize;
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extern UINT32 gSmmCr0;
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extern UINT32 gSmmCr0;
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extern UINT32 gSmmCr3;
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X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr3;
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extern UINT32 gSmmCr4;
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extern UINT32 gSmmCr4;
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extern UINTN gSmmInitStack;
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extern UINTN gSmmInitStack;
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@ -22,7 +22,7 @@ extern ASM_PFX(SmmInitHandler)
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extern ASM_PFX(mRebasedFlag)
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extern ASM_PFX(mRebasedFlag)
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extern ASM_PFX(mSmmRelocationOriginalAddress)
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extern ASM_PFX(mSmmRelocationOriginalAddress)
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global ASM_PFX(gSmmCr3)
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global ASM_PFX(gPatchSmmCr3)
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global ASM_PFX(gSmmCr4)
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global ASM_PFX(gSmmCr4)
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global ASM_PFX(gSmmCr0)
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global ASM_PFX(gSmmCr0)
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global ASM_PFX(gSmmJmpAddr)
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global ASM_PFX(gSmmJmpAddr)
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@ -47,8 +47,8 @@ ASM_PFX(SmmStartup):
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mov eax, 0x80000001 ; read capability
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mov eax, 0x80000001 ; read capability
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cpuid
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cpuid
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mov ebx, edx ; rdmsr will change edx. keep it in ebx.
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mov ebx, edx ; rdmsr will change edx. keep it in ebx.
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DB 0x66, 0xb8 ; mov eax, imm32
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mov eax, strict dword 0 ; source operand will be patched
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ASM_PFX(gSmmCr3): DD 0
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ASM_PFX(gPatchSmmCr3):
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mov cr3, eax
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mov cr3, eax
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o32 lgdt [cs:ebp + (ASM_PFX(gcSmiInitGdtr) - ASM_PFX(SmmStartup))]
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o32 lgdt [cs:ebp + (ASM_PFX(gcSmiInitGdtr) - ASM_PFX(SmmStartup))]
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DB 0x66, 0xb8 ; mov eax, imm32
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DB 0x66, 0xb8 ; mov eax, imm32
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