mirror of https://github.com/acidanthera/audk.git
IntelFsp2Pkg: SecFspSecPlatformLibNull support for X64
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3893 1.Added SecFspSecPlatformLibNull support for X64. 2.Added X64 support to IntelFsp2Pkg.dsc. Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Ashraf Ali S <ashraf.ali.s@intel.com> Signed-off-by: Ted Kuo <ted.kuo@intel.com> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com> Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
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## @file
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# Provides driver and definitions to build fsp.
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#
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# Copyright (c) 2014 - 2021, Intel Corporation. All rights reserved.<BR>
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# Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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##
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PLATFORM_VERSION = 0.1
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DSC_SPECIFICATION = 0x00010005
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OUTPUT_DIRECTORY = Build/IntelFsp2Pkg
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SUPPORTED_ARCHITECTURES = IA32
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SUPPORTED_ARCHITECTURES = IA32|X64
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BUILD_TARGETS = DEBUG|RELEASE|NOOPT
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SKUID_IDENTIFIER = DEFAULT
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## @file
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# NULL instance of Platform Sec Lib.
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#
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# Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
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# Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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#
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# The following information is for reference only and not required by the build tools.
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#
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# VALID_ARCHITECTURES = IA32
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# VALID_ARCHITECTURES = IA32 X64
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#
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################################################################################
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Ia32/Flat32.nasm
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Ia32/SecCarInit.nasm
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[Sources.X64]
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X64/Long64.nasm
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X64/SecCarInit.nasm
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################################################################################
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#
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# Package Dependency Section - list of Package files that are required for
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;; @file
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; This is the code that performs early platform initialization.
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; It consumes the reset vector, configures the stack.
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;
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; Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;;
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;
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; Define assembler characteristics
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;
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extern ASM_PFX(TempRamInitApi)
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SECTION .text
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%macro RET_RSI 0
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movd rsi, mm7 ; restore RSI from MM7
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jmp rsi
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%endmacro
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;
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; Perform early platform initialization
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;
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global ASM_PFX(SecPlatformInit)
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ASM_PFX(SecPlatformInit):
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RET_RSI
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;; @file
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; SEC CAR function
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;
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; Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;;
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;
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; Define assembler characteristics
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;
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%macro RET_RSI 0
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movd rsi, mm7 ; move ReturnAddress from MM7 to RSI
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jmp rsi
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%endmacro
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SECTION .text
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;-----------------------------------------------------------------------------
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;
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; Section: SecCarInit
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;
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; Description: This function initializes the Cache for Data, Stack, and Code
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;
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;-----------------------------------------------------------------------------
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global ASM_PFX(SecCarInit)
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ASM_PFX(SecCarInit):
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;
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; Set up CAR
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;
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xor rax, rax
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SecCarInitExit:
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RET_RSI
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