mirror of https://github.com/acidanthera/audk.git
ArmVirtPkg/VirtFdtDxe: remove GIC discovery
Now that we moved the GIC discovery to our ArmGicArchLib implementation, we can remove it from VirtFdtDxe, since it is no longer used. Remove the PcdArmGicRevision declaration and definitions as well: VirtFdtDxe no longer sets it, and no other drivers consume its value. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
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@ -72,11 +72,6 @@
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gArmVirtTokenSpaceGuid.PcdFwCfgDataAddress|0x0|UINT64|0x00000005
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gArmVirtTokenSpaceGuid.PcdFwCfgDataAddress|0x0|UINT64|0x00000005
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gArmVirtTokenSpaceGuid.PcdFwCfgDmaAddress|0x0|UINT64|0x00000009
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gArmVirtTokenSpaceGuid.PcdFwCfgDmaAddress|0x0|UINT64|0x00000009
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#
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# Supported GIC revision (2, 3, ...)
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#
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gArmVirtTokenSpaceGuid.PcdArmGicRevision|0x0|UINT32|0x00000008
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[PcdsFeatureFlag]
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[PcdsFeatureFlag]
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#
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#
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# "Map PCI MMIO as Cached"
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# "Map PCI MMIO as Cached"
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@ -208,7 +208,6 @@
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gArmTokenSpaceGuid.PcdGicDistributorBase|0x0
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gArmTokenSpaceGuid.PcdGicDistributorBase|0x0
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gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x0
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gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x0
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gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x0
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gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x0
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gArmVirtTokenSpaceGuid.PcdArmGicRevision|0x0
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## PL031 RealTimeClock
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## PL031 RealTimeClock
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gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x0
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gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x0
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@ -193,7 +193,6 @@
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gArmTokenSpaceGuid.PcdGicDistributorBase|0x0
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gArmTokenSpaceGuid.PcdGicDistributorBase|0x0
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gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x0
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gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x0
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gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x0
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gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x0
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gArmVirtTokenSpaceGuid.PcdArmGicRevision|0x0
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## PL031 RealTimeClock
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## PL031 RealTimeClock
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gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x0
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gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x0
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@ -129,7 +129,6 @@
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gArmTokenSpaceGuid.PcdGicDistributorBase|0x0
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gArmTokenSpaceGuid.PcdGicDistributorBase|0x0
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gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x0
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gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x0
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gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x0
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gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x0
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gArmVirtTokenSpaceGuid.PcdArmGicRevision|0x0
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## PL031 RealTimeClock
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## PL031 RealTimeClock
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gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x0
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gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x0
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@ -42,7 +42,6 @@ typedef struct {
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typedef enum {
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typedef enum {
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PropertyTypeUnknown,
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PropertyTypeUnknown,
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PropertyTypeGic,
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PropertyTypeRtc,
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PropertyTypeRtc,
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PropertyTypeVirtio,
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PropertyTypeVirtio,
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PropertyTypeUart,
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PropertyTypeUart,
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@ -50,7 +49,6 @@ typedef enum {
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PropertyTypePsci,
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PropertyTypePsci,
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PropertyTypeFwCfg,
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PropertyTypeFwCfg,
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PropertyTypePciHost,
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PropertyTypePciHost,
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PropertyTypeGicV3,
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PropertyTypeXen,
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PropertyTypeXen,
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} PROPERTY_TYPE;
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} PROPERTY_TYPE;
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@ -60,7 +58,6 @@ typedef struct {
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} PROPERTY;
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} PROPERTY;
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STATIC CONST PROPERTY CompatibleProperties[] = {
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STATIC CONST PROPERTY CompatibleProperties[] = {
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{ PropertyTypeGic, "arm,cortex-a15-gic" },
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{ PropertyTypeRtc, "arm,pl031" },
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{ PropertyTypeRtc, "arm,pl031" },
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{ PropertyTypeVirtio, "virtio,mmio" },
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{ PropertyTypeVirtio, "virtio,mmio" },
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{ PropertyTypeUart, "arm,pl011" },
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{ PropertyTypeUart, "arm,pl011" },
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@ -69,7 +66,6 @@ STATIC CONST PROPERTY CompatibleProperties[] = {
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{ PropertyTypePsci, "arm,psci-0.2" },
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{ PropertyTypePsci, "arm,psci-0.2" },
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{ PropertyTypeFwCfg, "qemu,fw-cfg-mmio" },
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{ PropertyTypeFwCfg, "qemu,fw-cfg-mmio" },
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{ PropertyTypePciHost, "pci-host-ecam-generic" },
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{ PropertyTypePciHost, "pci-host-ecam-generic" },
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{ PropertyTypeGicV3, "arm,gic-v3" },
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{ PropertyTypeXen, "xen,xen" },
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{ PropertyTypeXen, "xen,xen" },
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{ PropertyTypeUnknown, "" }
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{ PropertyTypeUnknown, "" }
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};
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};
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@ -294,7 +290,6 @@ InitializeVirtFdtDxe (
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VIRTIO_TRANSPORT_DEVICE_PATH *DevicePath;
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VIRTIO_TRANSPORT_DEVICE_PATH *DevicePath;
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EFI_HANDLE Handle;
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EFI_HANDLE Handle;
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UINT64 RegBase;
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UINT64 RegBase;
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UINT64 DistBase, CpuBase, RedistBase;
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CONST INTERRUPT_PROPERTY *InterruptProp;
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CONST INTERRUPT_PROPERTY *InterruptProp;
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INT32 SecIntrNum, IntrNum, VirtIntrNum, HypIntrNum;
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INT32 SecIntrNum, IntrNum, VirtIntrNum, HypIntrNum;
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CONST CHAR8 *PsciMethod;
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CONST CHAR8 *PsciMethod;
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@ -446,52 +441,6 @@ InitializeVirtFdtDxe (
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}
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}
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break;
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break;
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case PropertyTypeGic:
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ASSERT (Len == 32);
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DistBase = fdt64_to_cpu (((UINT64 *)RegProp)[0]);
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CpuBase = fdt64_to_cpu (((UINT64 *)RegProp)[2]);
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ASSERT (DistBase < MAX_UINT32);
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ASSERT (CpuBase < MAX_UINT32);
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PcdSet32 (PcdGicDistributorBase, (UINT32)DistBase);
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PcdSet32 (PcdGicInterruptInterfaceBase, (UINT32)CpuBase);
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PcdSet32 (PcdArmGicRevision, 2);
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DEBUG ((EFI_D_INFO, "Found GIC @ 0x%Lx/0x%Lx\n", DistBase, CpuBase));
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break;
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case PropertyTypeGicV3:
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//
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// The GIC v3 DT binding describes a series of at least 3 physical (base
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// addresses, size) pairs: the distributor interface (GICD), at least one
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// redistributor region (GICR) containing dedicated redistributor
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// interfaces for all individual CPUs, and the CPU interface (GICC).
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// Under virtualization, we assume that the first redistributor region
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// listed covers the boot CPU. Also, our GICv3 driver only supports the
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// system register CPU interface, so we can safely ignore the MMIO version
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// which is listed after the sequence of redistributor interfaces.
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// This means we are only interested in the first two memory regions
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// supplied, and ignore everything else.
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//
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ASSERT (Len >= 32);
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// RegProp[0..1] == { GICD base, GICD size }
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DistBase = fdt64_to_cpu (((UINT64 *)RegProp)[0]);
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ASSERT (DistBase < MAX_UINT32);
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// RegProp[2..3] == { GICR base, GICR size }
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RedistBase = fdt64_to_cpu (((UINT64 *)RegProp)[2]);
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ASSERT (RedistBase < MAX_UINT32);
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PcdSet32 (PcdGicDistributorBase, (UINT32)DistBase);
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PcdSet32 (PcdGicRedistributorsBase, (UINT32)RedistBase);
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PcdSet32 (PcdArmGicRevision, 3);
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DEBUG ((EFI_D_INFO, "Found GIC v3 (re)distributor @ 0x%Lx (0x%Lx)\n",
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DistBase, RedistBase));
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break;
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case PropertyTypeRtc:
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case PropertyTypeRtc:
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ASSERT (Len == 16);
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ASSERT (Len == 16);
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@ -54,10 +54,6 @@
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gArmVirtTokenSpaceGuid.PcdFwCfgSelectorAddress
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gArmVirtTokenSpaceGuid.PcdFwCfgSelectorAddress
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gArmVirtTokenSpaceGuid.PcdFwCfgDataAddress
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gArmVirtTokenSpaceGuid.PcdFwCfgDataAddress
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gArmVirtTokenSpaceGuid.PcdFwCfgDmaAddress
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gArmVirtTokenSpaceGuid.PcdFwCfgDmaAddress
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gArmVirtTokenSpaceGuid.PcdArmGicRevision
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gArmTokenSpaceGuid.PcdGicDistributorBase
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gArmTokenSpaceGuid.PcdGicRedistributorsBase
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gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
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gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
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gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
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gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
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gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
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gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
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gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
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