mirror of https://github.com/acidanthera/audk.git
DynamicTablesPkg: AcpiSsdtPcieLibArm: Correct translation value
The translation value in ACPI should be the difference between the CPU and PCIe address. Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
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@ -540,6 +540,7 @@ GeneratePciCrs (
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UINT32 RefCount;
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CM_ARM_PCI_ADDRESS_MAP_INFO *AddrMapInfo;
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AML_OBJECT_NODE_HANDLE CrsNode;
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BOOLEAN IsPosDecode;
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ASSERT (Generator != NULL);
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ASSERT (CfgMgrProtocol != NULL);
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@ -609,6 +610,11 @@ GeneratePciCrs (
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}
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Translation = (AddrMapInfo->CpuAddress != AddrMapInfo->PciAddress);
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if (AddrMapInfo->CpuAddress >= AddrMapInfo->PciAddress) {
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IsPosDecode = TRUE;
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} else {
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IsPosDecode = FALSE;
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}
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switch (AddrMapInfo->SpaceCode) {
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case PCI_SS_IO:
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@ -616,12 +622,12 @@ GeneratePciCrs (
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FALSE,
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TRUE,
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TRUE,
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TRUE,
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IsPosDecode,
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3,
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0,
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AddrMapInfo->PciAddress,
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AddrMapInfo->PciAddress + AddrMapInfo->AddressSize - 1,
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Translation ? AddrMapInfo->CpuAddress : 0,
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Translation ? AddrMapInfo->CpuAddress - AddrMapInfo->PciAddress : 0,
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AddrMapInfo->AddressSize,
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0,
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NULL,
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@ -635,7 +641,7 @@ GeneratePciCrs (
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case PCI_SS_M32:
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Status = AmlCodeGenRdDWordMemory (
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FALSE,
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TRUE,
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IsPosDecode,
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TRUE,
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TRUE,
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TRUE,
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@ -643,7 +649,7 @@ GeneratePciCrs (
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0,
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AddrMapInfo->PciAddress,
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AddrMapInfo->PciAddress + AddrMapInfo->AddressSize - 1,
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Translation ? AddrMapInfo->CpuAddress : 0,
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Translation ? AddrMapInfo->CpuAddress - AddrMapInfo->PciAddress : 0,
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AddrMapInfo->AddressSize,
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0,
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NULL,
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@ -657,7 +663,7 @@ GeneratePciCrs (
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case PCI_SS_M64:
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Status = AmlCodeGenRdQWordMemory (
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FALSE,
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TRUE,
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IsPosDecode,
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TRUE,
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TRUE,
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TRUE,
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@ -665,7 +671,7 @@ GeneratePciCrs (
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0,
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AddrMapInfo->PciAddress,
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AddrMapInfo->PciAddress + AddrMapInfo->AddressSize - 1,
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Translation ? AddrMapInfo->CpuAddress : 0,
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Translation ? AddrMapInfo->CpuAddress - AddrMapInfo->PciAddress : 0,
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AddrMapInfo->AddressSize,
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0,
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NULL,
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