tyler.durden
/
audk
mirror of https://github.com/acidanthera/audk.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

If IDE controller is not in IDE mode, we should not clear IO bar. 

Signed-off-by: Li Elvin <elvin.li@intel.com>
Reviewed-by: Yao Jiewen <jiewen.yao@intel.com>

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13953 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
li-elvin 2012-11-20 00:59:17 +00:00
parent 091249f497
commit 6d55565d68
2 changed files with 36 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosInterface.h
View File

@ -18,6 +18,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#include <FrameworkDxe.h> #include <FrameworkDxe.h>
#include <IndustryStandard\Pci.h>
#include <Guid/SmBios.h> #include <Guid/SmBios.h>
#include <Guid/Acpi.h> #include <Guid/Acpi.h>
@ -134,6 +135,9 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#define BDA_VIDEO_MODE 0x49 #define BDA_VIDEO_MODE 0x49
#define IDE_PI_REGISTER_PNE BIT0
#define IDE_PI_REGISTER_SNE BIT2
typedef struct { typedef struct {
UINTN PciSegment; UINTN PciSegment;
UINTN PciBus; UINTN PciBus;

31
IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyIde.c
View File

@ -268,9 +268,9 @@ InitLegacyIdeController (
) )
{ {
EFI_PCI_IO_PROTOCOL *PciIo; EFI_PCI_IO_PROTOCOL *PciIo;
UINT8 Pi;
UINT32 IOBarClear; UINT32 IOBarClear;
EFI_STATUS Status; EFI_STATUS Status;
PCI_TYPE00 PciData;
// //
// If the IDE channel is in compatibility (legacy) mode, remove all // If the IDE channel is in compatibility (legacy) mode, remove all
@ -281,20 +281,37 @@ InitLegacyIdeController (
Status = gBS->HandleProtocol ( Status = gBS->HandleProtocol (
IdeController, IdeController,
&gEfiPciIoProtocolGuid, &gEfiPciIoProtocolGuid,
(VOID **) &PciIo &PciIo
); );
if (!EFI_ERROR (Status)) { if (EFI_ERROR (Status)) {
return ;
}
Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint8, 0, sizeof (PciData), &PciData);
if (EFI_ERROR (Status)) {
return ;
}
//
// Check whether this is IDE
//
if ((PciData.Hdr.ClassCode[2] != PCI_CLASS_MASS_STORAGE) ||
(PciData.Hdr.ClassCode[1] != PCI_CLASS_MASS_STORAGE_IDE)) {
return ;
}
//
// Clear bar for legacy IDE
//
IOBarClear = 0x00; IOBarClear = 0x00;
PciIo->Pci.Read (PciIo, EfiPciIoWidthUint8, 0x09, 1, &Pi); if ((PciData.Hdr.ClassCode[0] & IDE_PI_REGISTER_PNE) == 0) {
if ((Pi & 0x01) == 0) {
PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, 0x10, 1, &IOBarClear); PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, 0x10, 1, &IOBarClear);
PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, 0x14, 1, &IOBarClear); PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, 0x14, 1, &IOBarClear);
} }
if ((Pi & 0x04) == 0) { if ((PciData.Hdr.ClassCode[0] & IDE_PI_REGISTER_SNE) == 0) {
PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, 0x18, 1, &IOBarClear); PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, 0x18, 1, &IOBarClear);
PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, 0x1C, 1, &IOBarClear); PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, 0x1C, 1, &IOBarClear);
} }
}
return ; return ;
} }