mirror of https://github.com/acidanthera/audk.git
ArmPlatformPkg: PrePei Cache disable and invalidate.
- Disable data cache on all cores. - Do not clean caches as there might be junk in them, invalidate only. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14527 6f19259b-4bc3-4df7-8a09-765794883524
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@ -1,15 +1,15 @@
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/** @file
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* Main file supporting the transition to PEI Core in Normal World for Versatile Express
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*
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* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
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*
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* This program and the accompanying materials
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* are licensed and made available under the terms and conditions of the BSD License
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* which accompanies this distribution. The full text of the license may be found at
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* http://opensource.org/licenses/bsd-license.php
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* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
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*
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* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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* This program and the accompanying materials
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* are licensed and made available under the terms and conditions of the BSD License
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* which accompanies this distribution. The full text of the license may be found at
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* http://opensource.org/licenses/bsd-license.php
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*
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* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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*
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**/
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@ -71,14 +71,13 @@ CEntryPoint (
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IN EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint
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)
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{
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//Clean Data cache
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ArmCleanInvalidateDataCache ();
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//Invalidate instruction cache
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// Data Cache enabled on Primary core when MMU is enabled.
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ArmDisableDataCache ();
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// Invalidate Data cache
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ArmInvalidateDataCache ();
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// Invalidate instruction cache
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ArmInvalidateInstructionCache ();
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// Enable Instruction & Data caches
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ArmEnableDataCache ();
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// Enable Instruction Caches on all cores.
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ArmEnableInstructionCache ();
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//
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@ -1,6 +1,6 @@
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/** @file
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*
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* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
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* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
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*
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* This program and the accompanying materials
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* are licensed and made available under the terms and conditions of the BSD License
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@ -222,16 +222,13 @@ CEntryPoint (
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StartTimeStamp = 0;
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}
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// Clean Data cache
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ArmCleanInvalidateDataCache ();
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// Data Cache enabled on Primary core when MMU is enabled.
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ArmDisableDataCache ();
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// Invalidate Data cache
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ArmInvalidateDataCache ();
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// Invalidate instruction cache
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ArmInvalidateInstructionCache ();
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//TODO:Drain Write Buffer
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// Enable Instruction & Data caches
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ArmEnableDataCache ();
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// Enable Instruction Caches on all cores.
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ArmEnableInstructionCache ();
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// Define the Global Variable region when we are not running in XIP
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