mirror of https://github.com/acidanthera/audk.git
1. Read 32bit CPU Init APIC ID from CPUID leaf B in XAPIC mode.
2. Read CPU APIC ID from CPUID leaf B in case CPU Init APIC ID is larger 255 in XAPIC mode. Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14674 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
parent
e6cc2ab38e
commit
6e3e4d70d4
|
@ -4,7 +4,7 @@
|
|||
Local APIC library assumes local APIC is enabled. It does not
|
||||
handles cases where local APIC is disabled.
|
||||
|
||||
Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2010 - 2013, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
|
@ -78,7 +78,7 @@ SetApicMode (
|
|||
/**
|
||||
Get the initial local APIC ID of the executing processor assigned by hardware upon power on or reset.
|
||||
|
||||
In xAPIC mode, the initial local APIC ID is 8-bit, and may be different from current APIC ID.
|
||||
In xAPIC mode, the initial local APIC ID may be different from current APIC ID.
|
||||
In x2APIC mode, the local APIC ID can't be changed and there is no concept of initial APIC ID. In this case,
|
||||
the 32-bit local APIC ID is returned as initial APIC ID.
|
||||
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
/** @file
|
||||
IA32 Local APIC Definitions.
|
||||
|
||||
Copyright (c) 2010 - 2011, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2010 - 2013, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
|
@ -23,7 +23,9 @@
|
|||
//
|
||||
// Definitions for CPUID instruction
|
||||
//
|
||||
#define CPUID_SIGNATURE 0x0
|
||||
#define CPUID_VERSION_INFO 0x1
|
||||
#define CPUID_EXTENDED_TOPOLOGY 0xB
|
||||
#define CPUID_EXTENDED_FUNCTION 0x80000000
|
||||
#define CPUID_VIR_PHY_ADDRESS_SIZE 0x80000008
|
||||
|
||||
|
|
|
@ -3,7 +3,7 @@
|
|||
|
||||
This local APIC library instance supports xAPIC mode only.
|
||||
|
||||
Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2010 - 2013, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
|
@ -207,7 +207,7 @@ SetApicMode (
|
|||
/**
|
||||
Get the initial local APIC ID of the executing processor assigned by hardware upon power on or reset.
|
||||
|
||||
In xAPIC mode, the initial local APIC ID is 8-bit, and may be different from current APIC ID.
|
||||
In xAPIC mode, the initial local APIC ID may be different from current APIC ID.
|
||||
In x2APIC mode, the local APIC ID can't be changed and there is no concept of initial APIC ID. In this case,
|
||||
the 32-bit local APIC ID is returned as initial APIC ID.
|
||||
|
||||
|
@ -219,10 +219,27 @@ GetInitialApicId (
|
|||
VOID
|
||||
)
|
||||
{
|
||||
UINT32 ApicId;
|
||||
UINT32 MaxCpuIdIndex;
|
||||
UINT32 RegEbx;
|
||||
|
||||
ASSERT (GetApicMode () == LOCAL_APIC_MODE_XAPIC);
|
||||
|
||||
//
|
||||
// Get the max index of basic CPUID
|
||||
//
|
||||
AsmCpuid (CPUID_SIGNATURE, &MaxCpuIdIndex, NULL, NULL, NULL);
|
||||
|
||||
//
|
||||
// If CPUID Leaf B is supported,
|
||||
// Then the initial 32-bit APIC ID = CPUID.0BH:EDX
|
||||
// Else the initial 8-bit APIC ID = CPUID.1:EBX[31:24]
|
||||
//
|
||||
if (MaxCpuIdIndex >= CPUID_EXTENDED_TOPOLOGY) {
|
||||
AsmCpuidEx (CPUID_EXTENDED_TOPOLOGY, 0, NULL, NULL, NULL, &ApicId);
|
||||
return ApicId;
|
||||
}
|
||||
|
||||
AsmCpuid (CPUID_VERSION_INFO, NULL, &RegEbx, NULL, NULL);
|
||||
return RegEbx >> 24;
|
||||
}
|
||||
|
@ -241,9 +258,15 @@ GetApicId (
|
|||
UINT32 ApicId;
|
||||
|
||||
ASSERT (GetApicMode () == LOCAL_APIC_MODE_XAPIC);
|
||||
|
||||
ApicId = ReadLocalApicReg (XAPIC_ID_OFFSET);
|
||||
ApicId >>= 24;
|
||||
|
||||
if ((ApicId = GetInitialApicId ()) < 0x100) {
|
||||
//
|
||||
// If the initial local APIC ID is less 0x100, read APIC ID from
|
||||
// XAPIC_ID_OFFSET, otherwise return the initial local APIC ID.
|
||||
//
|
||||
ApicId = ReadLocalApicReg (XAPIC_ID_OFFSET);
|
||||
ApicId >>= 24;
|
||||
}
|
||||
return ApicId;
|
||||
}
|
||||
|
||||
|
|
|
@ -4,7 +4,7 @@
|
|||
This local APIC library instance supports x2APIC capable processors
|
||||
which have xAPIC and x2APIC modes.
|
||||
|
||||
Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2010 - 2013, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
|
@ -290,7 +290,7 @@ SetApicMode (
|
|||
/**
|
||||
Get the initial local APIC ID of the executing processor assigned by hardware upon power on or reset.
|
||||
|
||||
In xAPIC mode, the initial local APIC ID is 8-bit, and may be different from current APIC ID.
|
||||
In xAPIC mode, the initial local APIC ID may be different from current APIC ID.
|
||||
In x2APIC mode, the local APIC ID can't be changed and there is no concept of initial APIC ID. In this case,
|
||||
the 32-bit local APIC ID is returned as initial APIC ID.
|
||||
|
||||
|
@ -302,9 +302,24 @@ GetInitialApicId (
|
|||
VOID
|
||||
)
|
||||
{
|
||||
UINT32 ApicId;
|
||||
UINT32 MaxCpuIdIndex;
|
||||
UINT32 RegEbx;
|
||||
|
||||
if (GetApicMode () == LOCAL_APIC_MODE_XAPIC) {
|
||||
//
|
||||
// Get the max index of basic CPUID
|
||||
//
|
||||
AsmCpuid (CPUID_SIGNATURE, &MaxCpuIdIndex, NULL, NULL, NULL);
|
||||
//
|
||||
// If CPUID Leaf B is supported,
|
||||
// Then the initial 32-bit APIC ID = CPUID.0BH:EDX
|
||||
// Else the initial 8-bit APIC ID = CPUID.1:EBX[31:24]
|
||||
//
|
||||
if (MaxCpuIdIndex >= CPUID_EXTENDED_TOPOLOGY) {
|
||||
AsmCpuidEx (CPUID_EXTENDED_TOPOLOGY, 0, NULL, NULL, NULL, &ApicId);
|
||||
return ApicId;
|
||||
}
|
||||
AsmCpuid (CPUID_VERSION_INFO, NULL, &RegEbx, NULL, NULL);
|
||||
return RegEbx >> 24;
|
||||
} else {
|
||||
|
@ -324,11 +339,13 @@ GetApicId (
|
|||
)
|
||||
{
|
||||
UINT32 ApicId;
|
||||
UINT32 InitApicId;
|
||||
|
||||
ApicId = ReadLocalApicReg (XAPIC_ID_OFFSET);
|
||||
if (GetApicMode () == LOCAL_APIC_MODE_XAPIC) {
|
||||
ApicId >>= 24;
|
||||
ApicId = ((InitApicId = GetInitialApicId ()) < 0x100) ? (ApicId >> 24) : InitApicId;
|
||||
}
|
||||
|
||||
return ApicId;
|
||||
}
|
||||
|
||||
|
|
Loading…
Reference in New Issue