ArmPkg: Made ArmConfigureMmu() returns a status code

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14445 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Olivier Martin 2013-06-27 18:16:06 +00:00 committed by oliviermartin
parent ca79c79821
commit 6f050ad6bf
6 changed files with 53 additions and 36 deletions

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@ -2,7 +2,7 @@
Copyright (c) 2006, Intel Corporation. All rights reserved.<BR> Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2011 Hewlett Packard Corporation. All rights reserved.<BR> Copyright (c) 2011 Hewlett Packard Corporation. All rights reserved.<BR>
Copyright (c) 2011, ARM Limited. All rights reserved.<BR> Copyright (c) 2011-2013, ARM Limited. All rights reserved.<BR>
This program and the accompanying materials This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
@ -137,7 +137,10 @@ ConfigureMmu (
SystemMemoryBase, SystemMemoryLength/1024/1024, SystemMemoryBase, SystemMemoryLength/1024/1024,
(CacheAttributes == DDR_ATTRIBUTES_CACHED) ? "cacheable" : "uncacheable")); (CacheAttributes == DDR_ATTRIBUTES_CACHED) ? "cacheable" : "uncacheable"));
ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize); Status = ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);
if (EFI_ERROR (Status)) {
DEBUG ((EFI_D_ERROR, "Error: Failed to enable MMU (error code: %r)\n", Status));
}
BuildMemoryAllocationHob((EFI_PHYSICAL_ADDRESS)(UINTN)TranslationTableBase, TranslationTableSize, EfiBootServicesData); BuildMemoryAllocationHob((EFI_PHYSICAL_ADDRESS)(UINTN)TranslationTableBase, TranslationTableSize, EfiBootServicesData);
} }

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@ -382,11 +382,11 @@ ArmGetTTBR0BaseAddress (
VOID VOID
); );
VOID RETURN_STATUS
EFIAPI EFIAPI
ArmConfigureMmu ( ArmConfigureMmu (
IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable, IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable,
OUT VOID **TranslationTableBase OPTIONAL, OUT VOID **TranslationTableBase OPTIONAL,
OUT UINTN *TranslationTableSize OPTIONAL OUT UINTN *TranslationTableSize OPTIONAL
); );

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@ -1,6 +1,7 @@
/** @file /** @file
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR> Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
Copyright (c) 2011 - 2013, ARM Limited. All rights reserved.
This program and the accompanying materials This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
@ -63,18 +64,21 @@ FillTranslationTable (
} }
} }
VOID RETURN_STATUS
EFIAPI EFIAPI
ArmConfigureMmu ( ArmConfigureMmu (
IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable, IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable,
OUT VOID **TranslationTableBase OPTIONAL, OUT VOID **TranslationTableBase OPTIONAL,
OUT UINTN *TranslationTableSize OPTIONAL OUT UINTN *TranslationTableSize OPTIONAL
) )
{ {
VOID *TranslationTable; VOID *TranslationTable;
// Allocate pages for translation table. // Allocate pages for translation table.
TranslationTable = AllocatePages(EFI_SIZE_TO_PAGES(TRANSLATION_TABLE_SIZE + TRANSLATION_TABLE_ALIGNMENT)); TranslationTable = AllocatePages (EFI_SIZE_TO_PAGES (TRANSLATION_TABLE_SIZE + TRANSLATION_TABLE_ALIGNMENT));
if (TranslationTable == NULL) {
return RETURN_OUT_OF_RESOURCES;
}
TranslationTable = (VOID *)(((UINTN)TranslationTable + TRANSLATION_TABLE_ALIGNMENT_MASK) & ~TRANSLATION_TABLE_ALIGNMENT_MASK); TranslationTable = (VOID *)(((UINTN)TranslationTable + TRANSLATION_TABLE_ALIGNMENT_MASK) & ~TRANSLATION_TABLE_ALIGNMENT_MASK);
if (TranslationTableBase != NULL) { if (TranslationTableBase != NULL) {
@ -126,8 +130,6 @@ ArmConfigureMmu (
ArmEnableInstructionCache(); ArmEnableInstructionCache();
ArmEnableDataCache(); ArmEnableDataCache();
ArmEnableMmu(); ArmEnableMmu();
return RETURN_SUCCESS;
} }

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@ -1,6 +1,7 @@
/** @file /** @file
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR> Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
Copyright (c) 2011 - 2013, ARM Limited. All rights reserved.
This program and the accompanying materials This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
@ -62,18 +63,21 @@ FillTranslationTable (
} }
} }
VOID RETURN_STATUS
EFIAPI EFIAPI
ArmConfigureMmu ( ArmConfigureMmu (
IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable, IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable,
OUT VOID **TranslationTableBase OPTIONAL, OUT VOID **TranslationTableBase OPTIONAL,
OUT UINTN *TranslationTableSize OPTIONAL OUT UINTN *TranslationTableSize OPTIONAL
) )
{ {
VOID *TranslationTable; VOID *TranslationTable;
// Allocate pages for translation table. // Allocate pages for translation table.
TranslationTable = AllocatePages(EFI_SIZE_TO_PAGES(TRANSLATION_TABLE_SIZE + TRANSLATION_TABLE_ALIGNMENT)); TranslationTable = AllocatePages (EFI_SIZE_TO_PAGES (TRANSLATION_TABLE_SIZE + TRANSLATION_TABLE_ALIGNMENT));
if (TranslationTable == NULL) {
return RETURN_OUT_OF_RESOURCES;
}
TranslationTable = (VOID *)(((UINTN)TranslationTable + TRANSLATION_TABLE_ALIGNMENT_MASK) & ~TRANSLATION_TABLE_ALIGNMENT_MASK); TranslationTable = (VOID *)(((UINTN)TranslationTable + TRANSLATION_TABLE_ALIGNMENT_MASK) & ~TRANSLATION_TABLE_ALIGNMENT_MASK);
if (TranslationTableBase != NULL) { if (TranslationTableBase != NULL) {
@ -125,7 +129,6 @@ ArmConfigureMmu (
ArmEnableInstructionCache(); ArmEnableInstructionCache();
ArmEnableDataCache(); ArmEnableDataCache();
ArmEnableMmu(); ArmEnableMmu();
return RETURN_SUCCESS;
} }

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@ -1,7 +1,7 @@
/** @file /** @file
* File managing the MMU for ARMv7 architecture * File managing the MMU for ARMv7 architecture
* *
* Copyright (c) 2011-2012, ARM Limited. All rights reserved. * Copyright (c) 2011-2013, ARM Limited. All rights reserved.
* *
* This program and the accompanying materials * This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License * are licensed and made available under the terms and conditions of the BSD License
@ -194,31 +194,34 @@ FillTranslationTable (
} }
} }
VOID RETURN_STATUS
EFIAPI EFIAPI
ArmConfigureMmu ( ArmConfigureMmu (
IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable, IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable,
OUT VOID **TranslationTableBase OPTIONAL, OUT VOID **TranslationTableBase OPTIONAL,
OUT UINTN *TranslationTableSize OPTIONAL OUT UINTN *TranslationTableSize OPTIONAL
) )
{ {
UINTN TranslationTable; VOID* TranslationTable;
ARM_MEMORY_REGION_ATTRIBUTES TranslationTableAttribute; ARM_MEMORY_REGION_ATTRIBUTES TranslationTableAttribute;
UINT32 TTBRAttributes; UINT32 TTBRAttributes;
// Allocate pages for translation table. // Allocate pages for translation table.
TranslationTable = (UINTN)AllocatePages (EFI_SIZE_TO_PAGES(TRANSLATION_TABLE_SECTION_SIZE + TRANSLATION_TABLE_SECTION_ALIGNMENT)); TranslationTable = AllocatePages (EFI_SIZE_TO_PAGES (TRANSLATION_TABLE_SECTION_SIZE + TRANSLATION_TABLE_SECTION_ALIGNMENT));
TranslationTable = ((UINTN)TranslationTable + TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK) & ~TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK; if (TranslationTable == NULL) {
return RETURN_OUT_OF_RESOURCES;
}
TranslationTable = (VOID*)(((UINTN)TranslationTable + TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK) & ~TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK);
if (TranslationTableBase != NULL) { if (TranslationTableBase != NULL) {
*TranslationTableBase = (VOID *)TranslationTable; *TranslationTableBase = TranslationTable;
} }
if (TranslationTableSize != NULL) { if (TranslationTableSize != NULL) {
*TranslationTableSize = TRANSLATION_TABLE_SECTION_SIZE; *TranslationTableSize = TRANSLATION_TABLE_SECTION_SIZE;
} }
ZeroMem ((VOID *)TranslationTable, TRANSLATION_TABLE_SECTION_SIZE); ZeroMem (TranslationTable, TRANSLATION_TABLE_SECTION_SIZE);
ArmCleanInvalidateDataCache (); ArmCleanInvalidateDataCache ();
ArmInvalidateInstructionCache (); ArmInvalidateInstructionCache ();
@ -232,14 +235,15 @@ ArmConfigureMmu (
ArmCleanInvalidateDataCache (); ArmCleanInvalidateDataCache ();
ArmInvalidateInstructionCache (); ArmInvalidateInstructionCache ();
TranslationTableAttribute = (ARM_MEMORY_REGION_ATTRIBUTES)0; // By default, mark the translation table as belonging to a uncached region
TranslationTableAttribute = ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED;
while (MemoryTable->Length != 0) { while (MemoryTable->Length != 0) {
// Find the memory attribute for the Translation Table // Find the memory attribute for the Translation Table
if ((TranslationTable >= MemoryTable->PhysicalBase) && (TranslationTable <= MemoryTable->PhysicalBase - 1 + MemoryTable->Length)) { if (((UINTN)TranslationTable >= MemoryTable->PhysicalBase) && ((UINTN)TranslationTable <= MemoryTable->PhysicalBase - 1 + MemoryTable->Length)) {
TranslationTableAttribute = MemoryTable->Attributes; TranslationTableAttribute = MemoryTable->Attributes;
} }
FillTranslationTable ((VOID *)TranslationTable, MemoryTable); FillTranslationTable (TranslationTable, MemoryTable);
MemoryTable++; MemoryTable++;
} }
@ -254,11 +258,11 @@ ArmConfigureMmu (
(TranslationTableAttribute == ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH)) { (TranslationTableAttribute == ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH)) {
TTBRAttributes = TTBR_WRITE_THROUGH_NO_ALLOC; TTBRAttributes = TTBR_WRITE_THROUGH_NO_ALLOC;
} else { } else {
//TODO: We should raise an error here ASSERT (0); // No support has been found for the attributes of the memory region that the translation table belongs to.
TTBRAttributes = TTBR_NON_CACHEABLE; return RETURN_UNSUPPORTED;
} }
ArmSetTTBR0 ((VOID *)(UINTN)((TranslationTable & ~TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK) | (TTBRAttributes & 0x7F))); ArmSetTTBR0 ((VOID *)(UINTN)(((UINTN)TranslationTable & ~TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK) | (TTBRAttributes & 0x7F)));
ArmSetDomainAccessControl (DOMAIN_ACCESS_CONTROL_NONE(15) | ArmSetDomainAccessControl (DOMAIN_ACCESS_CONTROL_NONE(15) |
DOMAIN_ACCESS_CONTROL_NONE(14) | DOMAIN_ACCESS_CONTROL_NONE(14) |
@ -280,4 +284,5 @@ ArmConfigureMmu (
ArmEnableInstructionCache(); ArmEnableInstructionCache();
ArmEnableDataCache(); ArmEnableDataCache();
ArmEnableMmu(); ArmEnableMmu();
return RETURN_SUCCESS;
} }

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@ -33,13 +33,17 @@ InitMmu (
ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable; ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable;
VOID *TranslationTableBase; VOID *TranslationTableBase;
UINTN TranslationTableSize; UINTN TranslationTableSize;
RETURN_STATUS Status;
// Get Virtual Memory Map from the Platform Library // Get Virtual Memory Map from the Platform Library
ArmPlatformGetVirtualMemoryMap (&MemoryTable); ArmPlatformGetVirtualMemoryMap (&MemoryTable);
//Note: Because we called PeiServicesInstallPeiMemory() before to call InitMmu() the MMU Page Table resides in //Note: Because we called PeiServicesInstallPeiMemory() before to call InitMmu() the MMU Page Table resides in
// DRAM (even at the top of DRAM as it is the first permanent memory allocation) // DRAM (even at the top of DRAM as it is the first permanent memory allocation)
ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize); Status = ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);
if (EFI_ERROR (Status)) {
DEBUG ((EFI_D_ERROR, "Error: Failed to enable MMU\n"));
}
} }
/*++ /*++