mirror of https://github.com/acidanthera/audk.git
ArmPkg: Made ArmConfigureMmu() returns a status code
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14445 6f19259b-4bc3-4df7-8a09-765794883524
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@ -2,7 +2,7 @@
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Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2011 Hewlett Packard Corporation. All rights reserved.<BR>
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Copyright (c) 2011 Hewlett Packard Corporation. All rights reserved.<BR>
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Copyright (c) 2011, ARM Limited. All rights reserved.<BR>
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Copyright (c) 2011-2013, ARM Limited. All rights reserved.<BR>
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This program and the accompanying materials
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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are licensed and made available under the terms and conditions of the BSD License
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@ -137,7 +137,10 @@ ConfigureMmu (
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SystemMemoryBase, SystemMemoryLength/1024/1024,
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SystemMemoryBase, SystemMemoryLength/1024/1024,
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(CacheAttributes == DDR_ATTRIBUTES_CACHED) ? "cacheable" : "uncacheable"));
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(CacheAttributes == DDR_ATTRIBUTES_CACHED) ? "cacheable" : "uncacheable"));
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ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);
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Status = ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);
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if (EFI_ERROR (Status)) {
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DEBUG ((EFI_D_ERROR, "Error: Failed to enable MMU (error code: %r)\n", Status));
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}
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BuildMemoryAllocationHob((EFI_PHYSICAL_ADDRESS)(UINTN)TranslationTableBase, TranslationTableSize, EfiBootServicesData);
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BuildMemoryAllocationHob((EFI_PHYSICAL_ADDRESS)(UINTN)TranslationTableBase, TranslationTableSize, EfiBootServicesData);
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}
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}
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@ -382,11 +382,11 @@ ArmGetTTBR0BaseAddress (
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VOID
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VOID
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);
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);
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VOID
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RETURN_STATUS
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EFIAPI
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EFIAPI
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ArmConfigureMmu (
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ArmConfigureMmu (
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IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable,
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IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable,
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OUT VOID **TranslationTableBase OPTIONAL,
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OUT VOID **TranslationTableBase OPTIONAL,
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OUT UINTN *TranslationTableSize OPTIONAL
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OUT UINTN *TranslationTableSize OPTIONAL
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);
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);
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@ -1,6 +1,7 @@
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/** @file
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/** @file
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Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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Copyright (c) 2011 - 2013, ARM Limited. All rights reserved.
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This program and the accompanying materials
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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are licensed and made available under the terms and conditions of the BSD License
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@ -63,18 +64,21 @@ FillTranslationTable (
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}
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}
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}
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}
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VOID
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RETURN_STATUS
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EFIAPI
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EFIAPI
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ArmConfigureMmu (
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ArmConfigureMmu (
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IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable,
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IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable,
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OUT VOID **TranslationTableBase OPTIONAL,
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OUT VOID **TranslationTableBase OPTIONAL,
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OUT UINTN *TranslationTableSize OPTIONAL
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OUT UINTN *TranslationTableSize OPTIONAL
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)
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)
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{
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{
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VOID *TranslationTable;
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VOID *TranslationTable;
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// Allocate pages for translation table.
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// Allocate pages for translation table.
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TranslationTable = AllocatePages(EFI_SIZE_TO_PAGES(TRANSLATION_TABLE_SIZE + TRANSLATION_TABLE_ALIGNMENT));
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TranslationTable = AllocatePages (EFI_SIZE_TO_PAGES (TRANSLATION_TABLE_SIZE + TRANSLATION_TABLE_ALIGNMENT));
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if (TranslationTable == NULL) {
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return RETURN_OUT_OF_RESOURCES;
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}
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TranslationTable = (VOID *)(((UINTN)TranslationTable + TRANSLATION_TABLE_ALIGNMENT_MASK) & ~TRANSLATION_TABLE_ALIGNMENT_MASK);
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TranslationTable = (VOID *)(((UINTN)TranslationTable + TRANSLATION_TABLE_ALIGNMENT_MASK) & ~TRANSLATION_TABLE_ALIGNMENT_MASK);
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if (TranslationTableBase != NULL) {
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if (TranslationTableBase != NULL) {
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@ -125,9 +129,7 @@ ArmConfigureMmu (
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ArmEnableInstructionCache();
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ArmEnableInstructionCache();
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ArmEnableDataCache();
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ArmEnableDataCache();
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ArmEnableMmu();
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ArmEnableMmu();
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return RETURN_SUCCESS;
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}
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}
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@ -1,6 +1,7 @@
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/** @file
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/** @file
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Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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Copyright (c) 2011 - 2013, ARM Limited. All rights reserved.
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This program and the accompanying materials
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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are licensed and made available under the terms and conditions of the BSD License
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@ -62,18 +63,21 @@ FillTranslationTable (
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}
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}
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}
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}
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VOID
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RETURN_STATUS
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EFIAPI
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EFIAPI
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ArmConfigureMmu (
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ArmConfigureMmu (
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IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable,
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IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable,
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OUT VOID **TranslationTableBase OPTIONAL,
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OUT VOID **TranslationTableBase OPTIONAL,
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OUT UINTN *TranslationTableSize OPTIONAL
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OUT UINTN *TranslationTableSize OPTIONAL
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)
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)
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{
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{
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VOID *TranslationTable;
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VOID *TranslationTable;
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// Allocate pages for translation table.
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// Allocate pages for translation table.
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TranslationTable = AllocatePages(EFI_SIZE_TO_PAGES(TRANSLATION_TABLE_SIZE + TRANSLATION_TABLE_ALIGNMENT));
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TranslationTable = AllocatePages (EFI_SIZE_TO_PAGES (TRANSLATION_TABLE_SIZE + TRANSLATION_TABLE_ALIGNMENT));
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if (TranslationTable == NULL) {
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return RETURN_OUT_OF_RESOURCES;
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}
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TranslationTable = (VOID *)(((UINTN)TranslationTable + TRANSLATION_TABLE_ALIGNMENT_MASK) & ~TRANSLATION_TABLE_ALIGNMENT_MASK);
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TranslationTable = (VOID *)(((UINTN)TranslationTable + TRANSLATION_TABLE_ALIGNMENT_MASK) & ~TRANSLATION_TABLE_ALIGNMENT_MASK);
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if (TranslationTableBase != NULL) {
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if (TranslationTableBase != NULL) {
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@ -125,7 +129,6 @@ ArmConfigureMmu (
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ArmEnableInstructionCache();
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ArmEnableInstructionCache();
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ArmEnableDataCache();
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ArmEnableDataCache();
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ArmEnableMmu();
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ArmEnableMmu();
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return RETURN_SUCCESS;
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}
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}
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@ -1,7 +1,7 @@
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/** @file
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/** @file
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* File managing the MMU for ARMv7 architecture
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* File managing the MMU for ARMv7 architecture
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*
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*
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* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
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* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
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*
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*
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* This program and the accompanying materials
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* This program and the accompanying materials
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* are licensed and made available under the terms and conditions of the BSD License
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* are licensed and made available under the terms and conditions of the BSD License
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@ -194,31 +194,34 @@ FillTranslationTable (
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}
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}
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}
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}
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VOID
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RETURN_STATUS
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EFIAPI
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EFIAPI
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ArmConfigureMmu (
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ArmConfigureMmu (
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IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable,
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IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable,
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OUT VOID **TranslationTableBase OPTIONAL,
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OUT VOID **TranslationTableBase OPTIONAL,
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OUT UINTN *TranslationTableSize OPTIONAL
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OUT UINTN *TranslationTableSize OPTIONAL
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)
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)
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{
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{
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UINTN TranslationTable;
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VOID* TranslationTable;
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ARM_MEMORY_REGION_ATTRIBUTES TranslationTableAttribute;
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ARM_MEMORY_REGION_ATTRIBUTES TranslationTableAttribute;
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UINT32 TTBRAttributes;
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UINT32 TTBRAttributes;
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// Allocate pages for translation table.
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// Allocate pages for translation table.
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TranslationTable = (UINTN)AllocatePages (EFI_SIZE_TO_PAGES(TRANSLATION_TABLE_SECTION_SIZE + TRANSLATION_TABLE_SECTION_ALIGNMENT));
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TranslationTable = AllocatePages (EFI_SIZE_TO_PAGES (TRANSLATION_TABLE_SECTION_SIZE + TRANSLATION_TABLE_SECTION_ALIGNMENT));
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TranslationTable = ((UINTN)TranslationTable + TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK) & ~TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK;
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if (TranslationTable == NULL) {
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return RETURN_OUT_OF_RESOURCES;
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}
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TranslationTable = (VOID*)(((UINTN)TranslationTable + TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK) & ~TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK);
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if (TranslationTableBase != NULL) {
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if (TranslationTableBase != NULL) {
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*TranslationTableBase = (VOID *)TranslationTable;
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*TranslationTableBase = TranslationTable;
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}
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}
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if (TranslationTableSize != NULL) {
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if (TranslationTableSize != NULL) {
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*TranslationTableSize = TRANSLATION_TABLE_SECTION_SIZE;
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*TranslationTableSize = TRANSLATION_TABLE_SECTION_SIZE;
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}
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}
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ZeroMem ((VOID *)TranslationTable, TRANSLATION_TABLE_SECTION_SIZE);
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ZeroMem (TranslationTable, TRANSLATION_TABLE_SECTION_SIZE);
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ArmCleanInvalidateDataCache ();
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ArmCleanInvalidateDataCache ();
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ArmInvalidateInstructionCache ();
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ArmInvalidateInstructionCache ();
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ArmCleanInvalidateDataCache ();
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ArmCleanInvalidateDataCache ();
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ArmInvalidateInstructionCache ();
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ArmInvalidateInstructionCache ();
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TranslationTableAttribute = (ARM_MEMORY_REGION_ATTRIBUTES)0;
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// By default, mark the translation table as belonging to a uncached region
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TranslationTableAttribute = ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED;
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while (MemoryTable->Length != 0) {
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while (MemoryTable->Length != 0) {
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// Find the memory attribute for the Translation Table
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// Find the memory attribute for the Translation Table
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if ((TranslationTable >= MemoryTable->PhysicalBase) && (TranslationTable <= MemoryTable->PhysicalBase - 1 + MemoryTable->Length)) {
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if (((UINTN)TranslationTable >= MemoryTable->PhysicalBase) && ((UINTN)TranslationTable <= MemoryTable->PhysicalBase - 1 + MemoryTable->Length)) {
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TranslationTableAttribute = MemoryTable->Attributes;
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TranslationTableAttribute = MemoryTable->Attributes;
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}
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}
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FillTranslationTable ((VOID *)TranslationTable, MemoryTable);
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FillTranslationTable (TranslationTable, MemoryTable);
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MemoryTable++;
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MemoryTable++;
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}
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}
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@ -254,11 +258,11 @@ ArmConfigureMmu (
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(TranslationTableAttribute == ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH)) {
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(TranslationTableAttribute == ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH)) {
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TTBRAttributes = TTBR_WRITE_THROUGH_NO_ALLOC;
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TTBRAttributes = TTBR_WRITE_THROUGH_NO_ALLOC;
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} else {
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} else {
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//TODO: We should raise an error here
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ASSERT (0); // No support has been found for the attributes of the memory region that the translation table belongs to.
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TTBRAttributes = TTBR_NON_CACHEABLE;
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return RETURN_UNSUPPORTED;
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}
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}
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ArmSetTTBR0 ((VOID *)(UINTN)((TranslationTable & ~TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK) | (TTBRAttributes & 0x7F)));
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ArmSetTTBR0 ((VOID *)(UINTN)(((UINTN)TranslationTable & ~TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK) | (TTBRAttributes & 0x7F)));
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ArmSetDomainAccessControl (DOMAIN_ACCESS_CONTROL_NONE(15) |
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ArmSetDomainAccessControl (DOMAIN_ACCESS_CONTROL_NONE(15) |
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DOMAIN_ACCESS_CONTROL_NONE(14) |
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DOMAIN_ACCESS_CONTROL_NONE(14) |
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@ -280,4 +284,5 @@ ArmConfigureMmu (
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ArmEnableInstructionCache();
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ArmEnableInstructionCache();
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ArmEnableDataCache();
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ArmEnableDataCache();
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ArmEnableMmu();
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ArmEnableMmu();
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return RETURN_SUCCESS;
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}
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}
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@ -33,13 +33,17 @@ InitMmu (
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ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable;
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ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable;
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VOID *TranslationTableBase;
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VOID *TranslationTableBase;
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UINTN TranslationTableSize;
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UINTN TranslationTableSize;
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RETURN_STATUS Status;
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// Get Virtual Memory Map from the Platform Library
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// Get Virtual Memory Map from the Platform Library
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ArmPlatformGetVirtualMemoryMap (&MemoryTable);
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ArmPlatformGetVirtualMemoryMap (&MemoryTable);
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//Note: Because we called PeiServicesInstallPeiMemory() before to call InitMmu() the MMU Page Table resides in
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//Note: Because we called PeiServicesInstallPeiMemory() before to call InitMmu() the MMU Page Table resides in
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// DRAM (even at the top of DRAM as it is the first permanent memory allocation)
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// DRAM (even at the top of DRAM as it is the first permanent memory allocation)
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ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);
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Status = ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);
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if (EFI_ERROR (Status)) {
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DEBUG ((EFI_D_ERROR, "Error: Failed to enable MMU\n"));
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}
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}
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}
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/*++
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/*++
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