UefiCpuPkg/RegisterCpuFeaturesLib: Delete CPU_FEATURE_[BEFORE|AFTER]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1366

Commit b3c71b472d supported MSR setting
in different scopes. It added below macro:
 CPU_FEATURE_THREAD_BEFORE
 CPU_FEATURE_THREAD_AFTER
 CPU_FEATURE_CORE_BEFORE
 CPU_FEATURE_CORE_AFTER
 CPU_FEATURE_PACKAGE_BEFORE
 CPU_FEATURE_PACKAGE_AFTER

And it re-interpreted CPU_FEATURE_BEFORE as CPU_FEATURE_THREAD_BEFORE
and CPU_FEATURE_AFTER as CPU_FEATURE_THREAD_AFTER.

This patch retires CPU_FEATURE_BEFORE and CPU_FEATURE_AFTER
completely.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
This commit is contained in:
Ray Ni 2019-07-02 15:15:45 +08:00 committed by mergify[bot]
parent 3e63a91b17
commit 707e6be745
3 changed files with 13 additions and 22 deletions

View File

@ -1,7 +1,7 @@
/** @file
Register CPU Features Library to register and manage CPU features.
Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2017 - 2020, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@ -69,17 +69,8 @@
#define CPU_FEATURE_BEFORE_ALL BIT23
#define CPU_FEATURE_AFTER_ALL BIT24
//
// CPU_FEATURE_BEFORE and CPU_FEATURE_AFTER only mean Thread scope
// before and Thread scope after.
// It will be replace with CPU_FEATURE_THREAD_BEFORE and
// CPU_FEATURE_THREAD_AFTER, and should not be used anymore.
//
#define CPU_FEATURE_BEFORE BIT25
#define CPU_FEATURE_AFTER BIT26
#define CPU_FEATURE_THREAD_BEFORE CPU_FEATURE_BEFORE
#define CPU_FEATURE_THREAD_AFTER CPU_FEATURE_AFTER
#define CPU_FEATURE_THREAD_BEFORE BIT25
#define CPU_FEATURE_THREAD_AFTER BIT26
#define CPU_FEATURE_CORE_BEFORE BIT27
#define CPU_FEATURE_CORE_AFTER BIT28
#define CPU_FEATURE_PACKAGE_BEFORE BIT29

View File

@ -2,7 +2,7 @@
This library registers CPU features defined in Intel(R) 64 and IA-32
Architectures Software Developer's Manual.
Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2017 - 2020, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@ -95,7 +95,7 @@ CpuCommonFeaturesLibConstructor (
SmxSupport,
SmxInitialize,
CPU_FEATURE_SMX,
CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER | CPU_FEATURE_BEFORE,
CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER | CPU_FEATURE_THREAD_BEFORE,
CPU_FEATURE_END
);
ASSERT_EFI_ERROR (Status);
@ -107,7 +107,7 @@ CpuCommonFeaturesLibConstructor (
VmxSupport,
VmxInitialize,
CPU_FEATURE_VMX,
CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER | CPU_FEATURE_BEFORE,
CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER | CPU_FEATURE_THREAD_BEFORE,
CPU_FEATURE_END
);
ASSERT_EFI_ERROR (Status);
@ -207,7 +207,7 @@ CpuCommonFeaturesLibConstructor (
LmceSupport,
LmceInitialize,
CPU_FEATURE_LMCE,
CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER | CPU_FEATURE_BEFORE,
CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER | CPU_FEATURE_THREAD_BEFORE,
CPU_FEATURE_END
);
ASSERT_EFI_ERROR (Status);

View File

@ -1,7 +1,7 @@
/** @file
CPU Register Table Library functions.
Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2017 - 2020, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@ -858,16 +858,16 @@ RegisterCpuFeature (
!= (CPU_FEATURE_CORE_BEFORE | CPU_FEATURE_CORE_AFTER));
ASSERT ((Feature & (CPU_FEATURE_PACKAGE_BEFORE | CPU_FEATURE_PACKAGE_AFTER))
!= (CPU_FEATURE_PACKAGE_BEFORE | CPU_FEATURE_PACKAGE_AFTER));
if (Feature < CPU_FEATURE_BEFORE) {
if (Feature < CPU_FEATURE_THREAD_BEFORE) {
BeforeAll = ((Feature & CPU_FEATURE_BEFORE_ALL) != 0) ? TRUE : FALSE;
AfterAll = ((Feature & CPU_FEATURE_AFTER_ALL) != 0) ? TRUE : FALSE;
Feature &= ~(CPU_FEATURE_BEFORE_ALL | CPU_FEATURE_AFTER_ALL);
ASSERT (FeatureMask == NULL);
SetCpuFeaturesBitMask (&FeatureMask, Feature, CpuFeaturesData->BitMaskSize);
} else if ((Feature & CPU_FEATURE_BEFORE) != 0) {
SetCpuFeaturesBitMask (&BeforeFeatureBitMask, Feature & ~CPU_FEATURE_BEFORE, CpuFeaturesData->BitMaskSize);
} else if ((Feature & CPU_FEATURE_AFTER) != 0) {
SetCpuFeaturesBitMask (&AfterFeatureBitMask, Feature & ~CPU_FEATURE_AFTER, CpuFeaturesData->BitMaskSize);
} else if ((Feature & CPU_FEATURE_THREAD_BEFORE) != 0) {
SetCpuFeaturesBitMask (&BeforeFeatureBitMask, Feature & ~CPU_FEATURE_THREAD_BEFORE, CpuFeaturesData->BitMaskSize);
} else if ((Feature & CPU_FEATURE_THREAD_AFTER) != 0) {
SetCpuFeaturesBitMask (&AfterFeatureBitMask, Feature & ~CPU_FEATURE_THREAD_AFTER, CpuFeaturesData->BitMaskSize);
} else if ((Feature & CPU_FEATURE_CORE_BEFORE) != 0) {
SetCpuFeaturesBitMask (&CoreBeforeFeatureBitMask, Feature & ~CPU_FEATURE_CORE_BEFORE, CpuFeaturesData->BitMaskSize);
} else if ((Feature & CPU_FEATURE_CORE_AFTER) != 0) {