ArmPlatformPkg: Fix PL011 FIFO size test

This change updates PL011UartInitializePort to compare ReceiveFifoDepth
with the correct hardware FIFO size instead of the constant 32 used
previously.
This corrects a minor bug where a request for a fifo size > 15 and < 32
would not have been honoured on a system with a 16 byte FIFO.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
This commit is contained in:
Evan Lloyd 2016-09-21 21:33:13 +01:00 committed by Leif Lindholm
parent b3b58d4da7
commit 719a347c5d
1 changed files with 6 additions and 5 deletions

View File

@ -79,17 +79,18 @@ PL011UartInitializePort (
UINT32 Divisor; UINT32 Divisor;
UINT32 Integer; UINT32 Integer;
UINT32 Fractional; UINT32 Fractional;
UINT32 HardwareFifoDepth;
HardwareFifoDepth = (PL011_UARTPID2_VER (MmioRead32 (UartBase + UARTPID2)) \
> PL011_VER_R1P4) \
? 32 : 16 ;
// The PL011 supports a buffer of 1, 16 or 32 chars. Therefore we can accept // The PL011 supports a buffer of 1, 16 or 32 chars. Therefore we can accept
// 1 char buffer as the minimum FIFO size. Because everything can be rounded // 1 char buffer as the minimum FIFO size. Because everything can be rounded
// down, there is no maximum FIFO size. // down, there is no maximum FIFO size.
if ((*ReceiveFifoDepth == 0) || (*ReceiveFifoDepth >= 32)) { if ((*ReceiveFifoDepth == 0) || (*ReceiveFifoDepth >= HardwareFifoDepth)) {
// Enable FIFO // Enable FIFO
LineControl = PL011_UARTLCR_H_FEN; LineControl = PL011_UARTLCR_H_FEN;
if (PL011_UARTPID2_VER (MmioRead32 (UartBase + UARTPID2)) > PL011_VER_R1P4) *ReceiveFifoDepth = HardwareFifoDepth;
*ReceiveFifoDepth = 32;
else
*ReceiveFifoDepth = 16;
} else { } else {
// Disable FIFO // Disable FIFO
LineControl = 0; LineControl = 0;