tyler.durden
/
audk
mirror of https://github.com/acidanthera/audk.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

MdeModulePkg/BaseSerialPortLib16550: Fix Serial Port Ready 

Before writing data to FIFO, wait for the serial port to be ready,
to make sure both the transmit FIFO and shift register empty. Code
comment was saying the right thing but code was missing a check.

Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
Signed-off-by: Ashish Singhal <ashishsingha@nvidia.com>
This commit is contained in:
Ashish Singhal 2020-01-28 01:52:45 +08:00 committed by mergify[bot]
parent 1549651da6
commit 7285f275ff
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c
View File

@ -646,7 +646,7 @@ SerialPortWrite (
// Wait for the serial port to be ready, to make sure both the transmit FIFO
// and shift register empty.
//
while ((SerialPortReadRegister (SerialRegisterBase, R_UART_LSR) & B_UART_LSR_TEMT) == 0);
while ((SerialPortReadRegister (SerialRegisterBase, R_UART_LSR) & (B_UART_LSR_TEMT | B_UART_LSR_TXRDY)) != (B_UART_LSR_TEMT | B_UART_LSR_TXRDY));
//
// Fill then entire Tx FIFO