mirror of
https://github.com/acidanthera/audk.git
synced 2025-07-28 08:04:07 +02:00
update code to eliminate the wrong assumption that pci address is equal to host address in all archs.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9339 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
parent
62b658dd7f
commit
739802e49c
@ -561,7 +561,7 @@ EhcInitHC (
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// Allocate the periodic frame and associated memeory
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// Allocate the periodic frame and associated memeory
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// management facilities if not already done.
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// management facilities if not already done.
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//
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//
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if (Ehc->PeriodFrame != NULL) {
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if (Ehc->PeriodFrameHost != NULL) {
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EhcFreeSched (Ehc);
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EhcFreeSched (Ehc);
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}
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}
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@ -34,11 +34,12 @@ EhcCreateHelpQ (
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EHC_QH *Qh;
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EHC_QH *Qh;
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QH_HW *QhHw;
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QH_HW *QhHw;
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EHC_QTD *Qtd;
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EHC_QTD *Qtd;
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EFI_PHYSICAL_ADDRESS PciAddr;
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//
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//
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// Create an inactive Qtd to terminate the short packet read.
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// Create an inactive Qtd to terminate the short packet read.
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//
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//
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Qtd = EhcCreateQtd (Ehc, NULL, 0, QTD_PID_INPUT, 0, 64);
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Qtd = EhcCreateQtd (Ehc, NULL, NULL, 0, QTD_PID_INPUT, 0, 64);
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if (Qtd == NULL) {
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if (Qtd == NULL) {
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return EFI_OUT_OF_RESOURCES;
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return EFI_OUT_OF_RESOURCES;
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@ -68,8 +69,9 @@ EhcCreateHelpQ (
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return EFI_OUT_OF_RESOURCES;
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return EFI_OUT_OF_RESOURCES;
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}
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}
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PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Qh, sizeof (EHC_QH));
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QhHw = &Qh->QhHw;
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QhHw = &Qh->QhHw;
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QhHw->HorizonLink = QH_LINK (QhHw, EHC_TYPE_QH, FALSE);
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QhHw->HorizonLink = QH_LINK (PciAddr + OFFSET_OF(EHC_QH, QhHw), EHC_TYPE_QH, FALSE);
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QhHw->Status = QTD_STAT_HALTED;
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QhHw->Status = QTD_STAT_HALTED;
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QhHw->ReclaimHead = 1;
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QhHw->ReclaimHead = 1;
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Ehc->ReclaimHead = Qh;
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Ehc->ReclaimHead = Qh;
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@ -116,6 +118,7 @@ EhcInitSched (
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UINTN Index;
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UINTN Index;
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UINT32 *Desc;
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UINT32 *Desc;
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EFI_STATUS Status;
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EFI_STATUS Status;
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EFI_PHYSICAL_ADDRESS PciAddr;
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//
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//
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// First initialize the periodical schedule data:
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// First initialize the periodical schedule data:
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@ -185,10 +188,11 @@ EhcInitSched (
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//
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//
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// Initialize the frame list entries then set the registers
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// Initialize the frame list entries then set the registers
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//
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//
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Desc = (UINT32 *) Ehc->PeriodFrame;
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Desc = (UINT32 *) Ehc->PeriodFrameHost;
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for (Index = 0; Index < EHC_FRAME_LEN; Index++) {
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for (Index = 0; Index < EHC_FRAME_LEN; Index++) {
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Desc[Index] = QH_LINK (Ehc->PeriodOne, EHC_TYPE_QH, FALSE);
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PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Ehc->PeriodOne, sizeof (EHC_QH));
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Desc[Index] = QH_LINK (PciAddr, EHC_TYPE_QH, FALSE);
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}
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}
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EhcWriteOpReg (Ehc, EHC_FRAME_BASE_OFFSET, EHC_LOW_32BIT (Ehc->PeriodFrame));
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EhcWriteOpReg (Ehc, EHC_FRAME_BASE_OFFSET, EHC_LOW_32BIT (Ehc->PeriodFrame));
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@ -198,7 +202,8 @@ EhcInitSched (
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// Only need to set the AsynListAddr register to
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// Only need to set the AsynListAddr register to
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// the reclamation header
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// the reclamation header
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//
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//
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EhcWriteOpReg (Ehc, EHC_ASYNC_HEAD_OFFSET, EHC_LOW_32BIT (Ehc->ReclaimHead));
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PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Ehc->ReclaimHead, sizeof (EHC_QH));
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EhcWriteOpReg (Ehc, EHC_ASYNC_HEAD_OFFSET, EHC_LOW_32BIT (PciAddr));
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return EFI_SUCCESS;
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return EFI_SUCCESS;
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}
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}
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@ -239,7 +244,7 @@ EhcFreeSched (
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Ehc->MemPool = NULL;
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Ehc->MemPool = NULL;
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}
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}
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if (Ehc->PeriodFrame != NULL) {
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if (Ehc->PeriodFrameHost != NULL) {
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PciIo = Ehc->PciIo;
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PciIo = Ehc->PciIo;
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ASSERT (PciIo != NULL);
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ASSERT (PciIo != NULL);
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@ -251,7 +256,8 @@ EhcFreeSched (
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Ehc->PeriodFrameHost
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Ehc->PeriodFrameHost
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);
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);
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Ehc->PeriodFrame = NULL;
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Ehc->PeriodFrameHost = NULL;
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Ehc->PeriodFrame = NULL;
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}
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}
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}
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}
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@ -274,6 +280,7 @@ EhcLinkQhToAsync (
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)
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)
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{
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{
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EHC_QH *Head;
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EHC_QH *Head;
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EFI_PHYSICAL_ADDRESS PciAddr;
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//
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//
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// Append the queue head after the reclaim header, then
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// Append the queue head after the reclaim header, then
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@ -285,8 +292,10 @@ EhcLinkQhToAsync (
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Qh->NextQh = Head->NextQh;
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Qh->NextQh = Head->NextQh;
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Head->NextQh = Qh;
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Head->NextQh = Qh;
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Qh->QhHw.HorizonLink = QH_LINK (Head, EHC_TYPE_QH, FALSE);;
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PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Head, sizeof (EHC_QH));
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Head->QhHw.HorizonLink = QH_LINK (Qh, EHC_TYPE_QH, FALSE);
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Qh->QhHw.HorizonLink = QH_LINK (PciAddr, EHC_TYPE_QH, FALSE);;
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PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Qh, sizeof (EHC_QH));
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Head->QhHw.HorizonLink = QH_LINK (PciAddr, EHC_TYPE_QH, FALSE);
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}
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}
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@ -306,6 +315,7 @@ EhcUnlinkQhFromAsync (
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{
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{
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EHC_QH *Head;
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EHC_QH *Head;
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EFI_STATUS Status;
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EFI_STATUS Status;
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EFI_PHYSICAL_ADDRESS PciAddr;
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ASSERT (Ehc->ReclaimHead->NextQh == Qh);
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ASSERT (Ehc->ReclaimHead->NextQh == Qh);
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@ -319,7 +329,8 @@ EhcUnlinkQhFromAsync (
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Head->NextQh = Qh->NextQh;
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Head->NextQh = Qh->NextQh;
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Qh->NextQh = NULL;
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Qh->NextQh = NULL;
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Head->QhHw.HorizonLink = QH_LINK (Head, EHC_TYPE_QH, FALSE);
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PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Head, sizeof (EHC_QH));
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Head->QhHw.HorizonLink = QH_LINK (PciAddr, EHC_TYPE_QH, FALSE);
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//
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//
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// Set and wait the door bell to synchronize with the hardware
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// Set and wait the door bell to synchronize with the hardware
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@ -351,8 +362,9 @@ EhcLinkQhToPeriod (
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UINTN Index;
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UINTN Index;
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EHC_QH *Prev;
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EHC_QH *Prev;
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EHC_QH *Next;
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EHC_QH *Next;
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EFI_PHYSICAL_ADDRESS PciAddr;
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Frames = Ehc->PeriodFrame;
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Frames = Ehc->PeriodFrameHost;
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for (Index = 0; Index < EHC_FRAME_LEN; Index += Qh->Interval) {
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for (Index = 0; Index < EHC_FRAME_LEN; Index += Qh->Interval) {
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//
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//
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@ -408,7 +420,8 @@ EhcLinkQhToPeriod (
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Prev->NextQh = Qh;
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Prev->NextQh = Qh;
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Qh->QhHw.HorizonLink = Prev->QhHw.HorizonLink;
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Qh->QhHw.HorizonLink = Prev->QhHw.HorizonLink;
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Prev->QhHw.HorizonLink = QH_LINK (Qh, EHC_TYPE_QH, FALSE);
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PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Qh, sizeof (EHC_QH));
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Prev->QhHw.HorizonLink = QH_LINK (PciAddr, EHC_TYPE_QH, FALSE);
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break;
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break;
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}
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}
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@ -419,14 +432,17 @@ EhcLinkQhToPeriod (
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//
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//
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if (Qh->NextQh == NULL) {
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if (Qh->NextQh == NULL) {
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Qh->NextQh = Next;
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Qh->NextQh = Next;
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Qh->QhHw.HorizonLink = QH_LINK (Next, EHC_TYPE_QH, FALSE);
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PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Next, sizeof (EHC_QH));
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Qh->QhHw.HorizonLink = QH_LINK (PciAddr, EHC_TYPE_QH, FALSE);
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}
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}
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PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Qh, sizeof (EHC_QH));
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if (Prev == NULL) {
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if (Prev == NULL) {
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Frames[Index] = QH_LINK (Qh, EHC_TYPE_QH, FALSE);
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Frames[Index] = QH_LINK (PciAddr, EHC_TYPE_QH, FALSE);
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} else {
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} else {
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Prev->NextQh = Qh;
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Prev->NextQh = Qh;
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Prev->QhHw.HorizonLink = QH_LINK (Qh, EHC_TYPE_QH, FALSE);
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Prev->QhHw.HorizonLink = QH_LINK (PciAddr, EHC_TYPE_QH, FALSE);
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}
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}
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}
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}
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}
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}
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@ -451,7 +467,7 @@ EhcUnlinkQhFromPeriod (
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EHC_QH *Prev;
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EHC_QH *Prev;
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EHC_QH *This;
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EHC_QH *This;
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Frames = Ehc->PeriodFrame;
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Frames = Ehc->PeriodFrameHost;
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for (Index = 0; Index < EHC_FRAME_LEN; Index += Qh->Interval) {
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for (Index = 0; Index < EHC_FRAME_LEN; Index += Qh->Interval) {
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//
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//
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@ -513,6 +529,7 @@ EhcCheckUrbResult (
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QTD_HW *QtdHw;
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QTD_HW *QtdHw;
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UINT8 State;
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UINT8 State;
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BOOLEAN Finished;
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BOOLEAN Finished;
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EFI_PHYSICAL_ADDRESS PciAddr;
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ASSERT ((Ehc != NULL) && (Urb != NULL) && (Urb->Qh != NULL));
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ASSERT ((Ehc != NULL) && (Urb != NULL) && (Urb->Qh != NULL));
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@ -582,7 +599,8 @@ EhcCheckUrbResult (
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// ShortReadStop. If it is a setup transfer, need to check the
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// ShortReadStop. If it is a setup transfer, need to check the
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// Status Stage of the setup transfer to get the finial result
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// Status Stage of the setup transfer to get the finial result
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//
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//
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if (QtdHw->AltNext == QTD_LINK (Ehc->ShortReadStop, FALSE)) {
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PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Ehc->ShortReadStop, sizeof (EHC_QTD));
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if (QtdHw->AltNext == QTD_LINK (PciAddr, FALSE)) {
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DEBUG ((EFI_D_INFO, "EhcCheckUrbResult: Short packet read, break\n"));
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DEBUG ((EFI_D_INFO, "EhcCheckUrbResult: Short packet read, break\n"));
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Finished = TRUE;
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Finished = TRUE;
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@ -803,11 +821,13 @@ ON_ERROR:
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/**
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/**
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Update the queue head for next round of asynchronous transfer.
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Update the queue head for next round of asynchronous transfer.
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@param Ehc The EHCI device.
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@param Urb The URB to update.
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@param Urb The URB to update.
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**/
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**/
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VOID
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VOID
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EhcUpdateAsyncRequest (
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EhcUpdateAsyncRequest (
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IN USB2_HC_DEV *Ehc,
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IN URB *Urb
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IN URB *Urb
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)
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)
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{
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{
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@ -817,6 +837,7 @@ EhcUpdateAsyncRequest (
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EHC_QTD *Qtd;
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EHC_QTD *Qtd;
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QTD_HW *QtdHw;
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QTD_HW *QtdHw;
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UINTN Index;
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UINTN Index;
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EFI_PHYSICAL_ADDRESS PciAddr;
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Qtd = NULL;
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Qtd = NULL;
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@ -868,7 +889,8 @@ EhcUpdateAsyncRequest (
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QhHw->PageHigh[Index] = 0;
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QhHw->PageHigh[Index] = 0;
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}
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}
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QhHw->NextQtd = QTD_LINK (FirstQtd, FALSE);
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PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, FirstQtd, sizeof (EHC_QTD));
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QhHw->NextQtd = QTD_LINK (PciAddr, FALSE);
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}
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}
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return ;
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return ;
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@ -936,14 +958,14 @@ EhcMonitorAsyncRequests (
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ProcBuf = AllocatePool (Urb->Completed);
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ProcBuf = AllocatePool (Urb->Completed);
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if (ProcBuf == NULL) {
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if (ProcBuf == NULL) {
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EhcUpdateAsyncRequest (Urb);
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EhcUpdateAsyncRequest (Ehc, Urb);
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continue;
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continue;
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}
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}
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CopyMem (ProcBuf, Urb->Data, Urb->Completed);
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CopyMem (ProcBuf, Urb->Data, Urb->Completed);
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}
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}
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EhcUpdateAsyncRequest (Urb);
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EhcUpdateAsyncRequest (Ehc, Urb);
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//
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//
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// Leave error recovery to its related device driver. A
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// Leave error recovery to its related device driver. A
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@ -21,7 +21,8 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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Create a single QTD to hold the data.
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Create a single QTD to hold the data.
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@param Ehc The EHCI device.
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@param Ehc The EHCI device.
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@param Data Current data not associated with a QTD.
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@param Data The cpu memory address of current data not associated with a QTD.
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@param DataPhy The pci bus address of current data not associated with a QTD.
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@param DataLen The length of the data.
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@param DataLen The length of the data.
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@param PktId Packet ID to use in the QTD.
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@param PktId Packet ID to use in the QTD.
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@param Toggle Data toggle to use in the QTD.
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@param Toggle Data toggle to use in the QTD.
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@ -34,6 +35,7 @@ EHC_QTD *
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EhcCreateQtd (
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EhcCreateQtd (
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IN USB2_HC_DEV *Ehc,
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IN USB2_HC_DEV *Ehc,
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IN UINT8 *Data,
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IN UINT8 *Data,
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IN UINT8 *DataPhy,
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IN UINTN DataLen,
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IN UINTN DataLen,
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IN UINT8 PktId,
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IN UINT8 PktId,
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IN UINT8 Toggle,
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IN UINT8 Toggle,
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@ -82,10 +84,10 @@ EhcCreateQtd (
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// compute the offset and clear Reserved fields. This is already
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// compute the offset and clear Reserved fields. This is already
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// done in the data point.
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// done in the data point.
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//
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//
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QtdHw->Page[Index] = EHC_LOW_32BIT (Data);
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QtdHw->Page[Index] = EHC_LOW_32BIT (DataPhy);
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QtdHw->PageHigh[Index] = EHC_HIGH_32BIT (Data);
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QtdHw->PageHigh[Index] = EHC_HIGH_32BIT (DataPhy);
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ThisBufLen = QTD_BUF_LEN - (EHC_LOW_32BIT (Data) & QTD_BUF_MASK);
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ThisBufLen = QTD_BUF_LEN - (EHC_LOW_32BIT (DataPhy) & QTD_BUF_MASK);
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if (Len + ThisBufLen >= DataLen) {
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if (Len + ThisBufLen >= DataLen) {
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Len = DataLen;
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Len = DataLen;
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@ -94,6 +96,7 @@ EhcCreateQtd (
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Len += ThisBufLen;
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Len += ThisBufLen;
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Data += ThisBufLen;
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Data += ThisBufLen;
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DataPhy += ThisBufLen;
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}
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}
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//
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//
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@ -375,6 +378,7 @@ EhcCreateQtds (
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UINT8 Toggle;
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UINT8 Toggle;
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UINTN Len;
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UINTN Len;
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UINT8 Pid;
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UINT8 Pid;
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EFI_PHYSICAL_ADDRESS PhyAddr;
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ASSERT ((Urb != NULL) && (Urb->Qh != NULL));
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ASSERT ((Urb != NULL) && (Urb->Qh != NULL));
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@ -390,8 +394,9 @@ EhcCreateQtds (
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StatusQtd = NULL;
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StatusQtd = NULL;
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AlterNext = QTD_LINK (NULL, TRUE);
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AlterNext = QTD_LINK (NULL, TRUE);
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PhyAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Ehc->ShortReadStop, sizeof (EHC_QTD));
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if (Ep->Direction == EfiUsbDataIn) {
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if (Ep->Direction == EfiUsbDataIn) {
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AlterNext = QTD_LINK (Ehc->ShortReadStop, FALSE);
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AlterNext = QTD_LINK (PhyAddr, FALSE);
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}
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}
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//
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//
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@ -399,7 +404,7 @@ EhcCreateQtds (
|
|||||||
//
|
//
|
||||||
if (Urb->Ep.Type == EHC_CTRL_TRANSFER) {
|
if (Urb->Ep.Type == EHC_CTRL_TRANSFER) {
|
||||||
Len = sizeof (EFI_USB_DEVICE_REQUEST);
|
Len = sizeof (EFI_USB_DEVICE_REQUEST);
|
||||||
Qtd = EhcCreateQtd (Ehc, Urb->RequestPhy, Len, QTD_PID_SETUP, 0, Ep->MaxPacket);
|
Qtd = EhcCreateQtd (Ehc, (UINT8 *)Urb->Request, (UINT8 *)Urb->RequestPhy, Len, QTD_PID_SETUP, 0, Ep->MaxPacket);
|
||||||
|
|
||||||
if (Qtd == NULL) {
|
if (Qtd == NULL) {
|
||||||
return EFI_OUT_OF_RESOURCES;
|
return EFI_OUT_OF_RESOURCES;
|
||||||
@ -419,14 +424,15 @@ EhcCreateQtds (
|
|||||||
Pid = QTD_PID_INPUT;
|
Pid = QTD_PID_INPUT;
|
||||||
}
|
}
|
||||||
|
|
||||||
StatusQtd = EhcCreateQtd (Ehc, NULL, 0, Pid, 1, Ep->MaxPacket);
|
StatusQtd = EhcCreateQtd (Ehc, NULL, NULL, 0, Pid, 1, Ep->MaxPacket);
|
||||||
|
|
||||||
if (StatusQtd == NULL) {
|
if (StatusQtd == NULL) {
|
||||||
goto ON_ERROR;
|
goto ON_ERROR;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (Ep->Direction == EfiUsbDataIn) {
|
if (Ep->Direction == EfiUsbDataIn) {
|
||||||
AlterNext = QTD_LINK (StatusQtd, FALSE);
|
PhyAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, StatusQtd, sizeof (EHC_QTD));
|
||||||
|
AlterNext = QTD_LINK (PhyAddr, FALSE);
|
||||||
}
|
}
|
||||||
|
|
||||||
Toggle = 1;
|
Toggle = 1;
|
||||||
@ -447,6 +453,7 @@ EhcCreateQtds (
|
|||||||
while (Len < Urb->DataLen) {
|
while (Len < Urb->DataLen) {
|
||||||
Qtd = EhcCreateQtd (
|
Qtd = EhcCreateQtd (
|
||||||
Ehc,
|
Ehc,
|
||||||
|
(UINT8 *) Urb->Data + Len,
|
||||||
(UINT8 *) Urb->DataPhy + Len,
|
(UINT8 *) Urb->DataPhy + Len,
|
||||||
Urb->DataLen - Len,
|
Urb->DataLen - Len,
|
||||||
Pid,
|
Pid,
|
||||||
@ -492,14 +499,16 @@ EhcCreateQtds (
|
|||||||
}
|
}
|
||||||
|
|
||||||
NextQtd = EFI_LIST_CONTAINER (Entry->ForwardLink, EHC_QTD, QtdList);
|
NextQtd = EFI_LIST_CONTAINER (Entry->ForwardLink, EHC_QTD, QtdList);
|
||||||
Qtd->QtdHw.NextQtd = QTD_LINK (NextQtd, FALSE);
|
PhyAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, NextQtd, sizeof (EHC_QTD));
|
||||||
|
Qtd->QtdHw.NextQtd = QTD_LINK (PhyAddr, FALSE);
|
||||||
}
|
}
|
||||||
|
|
||||||
//
|
//
|
||||||
// Link the QTDs to the queue head
|
// Link the QTDs to the queue head
|
||||||
//
|
//
|
||||||
NextQtd = EFI_LIST_CONTAINER (Qh->Qtds.ForwardLink, EHC_QTD, QtdList);
|
NextQtd = EFI_LIST_CONTAINER (Qh->Qtds.ForwardLink, EHC_QTD, QtdList);
|
||||||
Qh->QhHw.NextQtd = QTD_LINK (NextQtd, FALSE);
|
PhyAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, NextQtd, sizeof (EHC_QTD));
|
||||||
|
Qh->QhHw.NextQtd = QTD_LINK (PhyAddr, FALSE);
|
||||||
return EFI_SUCCESS;
|
return EFI_SUCCESS;
|
||||||
|
|
||||||
ON_ERROR:
|
ON_ERROR:
|
||||||
|
@ -244,7 +244,8 @@ struct _URB {
|
|||||||
Create a single QTD to hold the data.
|
Create a single QTD to hold the data.
|
||||||
|
|
||||||
@param Ehc The EHCI device.
|
@param Ehc The EHCI device.
|
||||||
@param Data Current data not associated with a QTD.
|
@param Data The cpu memory address of current data not associated with a QTD.
|
||||||
|
@param DataPhy The pci bus address of current data not associated with a QTD.
|
||||||
@param DataLen The length of the data.
|
@param DataLen The length of the data.
|
||||||
@param PktId Packet ID to use in the QTD.
|
@param PktId Packet ID to use in the QTD.
|
||||||
@param Toggle Data toggle to use in the QTD.
|
@param Toggle Data toggle to use in the QTD.
|
||||||
@ -257,6 +258,7 @@ EHC_QTD *
|
|||||||
EhcCreateQtd (
|
EhcCreateQtd (
|
||||||
IN USB2_HC_DEV *Ehc,
|
IN USB2_HC_DEV *Ehc,
|
||||||
IN UINT8 *Data,
|
IN UINT8 *Data,
|
||||||
|
IN UINT8 *DataPhy,
|
||||||
IN UINTN DataLen,
|
IN UINTN DataLen,
|
||||||
IN UINT8 PktId,
|
IN UINT8 PktId,
|
||||||
IN UINT8 Toggle,
|
IN UINT8 Toggle,
|
||||||
|
@ -221,6 +221,50 @@ UsbHcAllocMemFromBlock (
|
|||||||
return Block->Buf + (StartByte * 8 + StartBit) * USBHC_MEM_UNIT;
|
return Block->Buf + (StartByte * 8 + StartBit) * USBHC_MEM_UNIT;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
Get the pci memory address according to the allocated host memory address.
|
||||||
|
|
||||||
|
@param Pool The memory pool of the host controller.
|
||||||
|
@param Mem The memory to free.
|
||||||
|
@param Size The size of the memory to free.
|
||||||
|
|
||||||
|
@return the pci memory address
|
||||||
|
**/
|
||||||
|
EFI_PHYSICAL_ADDRESS
|
||||||
|
UsbHcGetPciAddressForHostMem (
|
||||||
|
IN USBHC_MEM_POOL *Pool,
|
||||||
|
IN VOID *Mem,
|
||||||
|
IN UINTN Size
|
||||||
|
)
|
||||||
|
{
|
||||||
|
USBHC_MEM_BLOCK *Head;
|
||||||
|
USBHC_MEM_BLOCK *Block;
|
||||||
|
UINTN AllocSize;
|
||||||
|
EFI_PHYSICAL_ADDRESS PhyAddr;
|
||||||
|
UINTN Offset;
|
||||||
|
|
||||||
|
Head = Pool->Head;
|
||||||
|
AllocSize = USBHC_MEM_ROUND (Size);
|
||||||
|
|
||||||
|
for (Block = Head; Block != NULL; Block = Block->Next) {
|
||||||
|
//
|
||||||
|
// scan the memory block list for the memory block that
|
||||||
|
// completely contains the allocated memory.
|
||||||
|
//
|
||||||
|
if ((Block->Buf <= (UINT8 *) Mem) && (((UINT8 *) Mem + AllocSize) <= (Block->Buf + Block->BufLen))) {
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
ASSERT ((Block != NULL));
|
||||||
|
//
|
||||||
|
// calculate the pci memory address for host memory address.
|
||||||
|
//
|
||||||
|
Offset = (UINT8 *)Mem - Block->BufHost;
|
||||||
|
PhyAddr = (EFI_PHYSICAL_ADDRESS)(Block->Buf + Offset);
|
||||||
|
return PhyAddr;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
Insert the memory block to the pool's list of the blocks.
|
Insert the memory block to the pool's list of the blocks.
|
||||||
|
@ -135,4 +135,21 @@ UsbHcFreeMem (
|
|||||||
IN VOID *Mem,
|
IN VOID *Mem,
|
||||||
IN UINTN Size
|
IN UINTN Size
|
||||||
);
|
);
|
||||||
|
|
||||||
|
/**
|
||||||
|
Get the pci memory address according to the allocated host memory address.
|
||||||
|
|
||||||
|
@param Pool The memory pool of the host controller.
|
||||||
|
@param Mem The memory to free.
|
||||||
|
@param Size The size of the memory to free.
|
||||||
|
|
||||||
|
@return the pci memory address
|
||||||
|
**/
|
||||||
|
EFI_PHYSICAL_ADDRESS
|
||||||
|
UsbHcGetPciAddressForHostMem (
|
||||||
|
IN USBHC_MEM_POOL *Pool,
|
||||||
|
IN VOID *Mem,
|
||||||
|
IN UINTN Size
|
||||||
|
);
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
Loading…
x
Reference in New Issue
Block a user