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https://github.com/acidanthera/audk.git
synced 2025-04-08 17:05:09 +02:00
ArmPkg,ArmPkg/ArmExceptionLib: drop vector relocation variant/support
There were several bugs in the vector table relocation code which means it can't really have been used by anyone on AArch64 in the last decade or so. So delete the support code from the library, as well as the ArmRelocateExceptionLib.inf file. This gets rid of PcdDebuggerExceptionSupport (including a duff reference in CpuDxe), PcdCpuVectorBaseAddress and PcdRelocateVectorTable. Signed-off-by: Leif Lindholm <leif.lindholm@oss.qualcomm.com>
This commit is contained in:
Leif Lindholm
mergify[bot]
parent
43233ff9f8
commit
74376f0b72
@ -134,15 +134,6 @@
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[PcdsFeatureFlag.common]
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gArmTokenSpaceGuid.PcdCpuDxeProduceDebugSupport|FALSE|BOOLEAN|0x00000001
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# On ARM Architecture with the Security Extension, the address for the
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# Vector Table can be mapped anywhere in the memory map. It means we can
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# point the Exception Vector Table to its location in CpuDxe.
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# By default we copy the Vector Table at PcdGet64(PcdCpuVectorBaseAddress)
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gArmTokenSpaceGuid.PcdRelocateVectorTable|TRUE|BOOLEAN|0x00000022
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# Set this PCD to TRUE if the Exception Vector is changed to add debugger support before
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# it has been configured by the CPU DXE
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gArmTokenSpaceGuid.PcdDebuggerExceptionSupport|FALSE|BOOLEAN|0x00000032
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# Whether to remap all unused memory NX before installing the CPU arch
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# protocol driver. This is needed on platforms that map all DRAM with RWX
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# attributes initially, and can be disabled otherwise.
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@ -161,7 +152,6 @@
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# Using a FeaturePcd make a '(BOOLEAN) casting for its value which is not understood by the preprocessor.
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gArmTokenSpaceGuid.PcdVFPEnabled|0|UINT32|0x00000024
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gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0xffff0000|UINT64|0x00000004
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gArmTokenSpaceGuid.PcdCpuResetAddress|0x00000000|UINT32|0x00000005
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#
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@ -120,7 +120,6 @@
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ArmPkg/Library/SemiHostingSerialPortLib/SemiHostingSerialPortLib.inf
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ArmPkg/Library/SemihostLib/SemihostLib.inf
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ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.inf
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ArmPkg/Library/ArmExceptionLib/ArmRelocateExceptionLib.inf
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ArmPkg/Drivers/CpuDxe/CpuDxe.inf
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ArmPkg/Drivers/CpuPei/CpuPei.inf
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@ -69,7 +69,6 @@
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gEfiMdeModulePkgTokenSpaceGuid.PcdDxeNxMemoryProtectionPolicy
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[FeaturePcd.common]
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gArmTokenSpaceGuid.PcdDebuggerExceptionSupport
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gArmTokenSpaceGuid.PcdRemapUnusedMemoryNx
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[Depex]
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@ -14,11 +14,9 @@
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#include <Library/MemoryAllocationLib.h>
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#include <Protocol/DebugSupport.h> // for MAX_AARCH64_EXCEPTION
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UINTN gMaxExceptionNumber = MAX_AARCH64_EXCEPTION;
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EFI_EXCEPTION_CALLBACK gExceptionHandlers[MAX_AARCH64_EXCEPTION + 1] = { 0 };
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EFI_EXCEPTION_CALLBACK gDebuggerExceptionHandlers[MAX_AARCH64_EXCEPTION + 1] = { 0 };
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PHYSICAL_ADDRESS gExceptionVectorAlignmentMask = ARM_VECTOR_TABLE_ALIGNMENT;
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UINTN gDebuggerNoHandlerValue = 0; // todo: define for AArch64
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UINTN gMaxExceptionNumber = MAX_AARCH64_EXCEPTION;
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EFI_EXCEPTION_CALLBACK gExceptionHandlers[MAX_AARCH64_EXCEPTION + 1] = { 0 };
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PHYSICAL_ADDRESS gExceptionVectorAlignmentMask = ARM_VECTOR_TABLE_ALIGNMENT;
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#define EL0_STACK_SIZE EFI_PAGES_TO_SIZE(2)
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STATIC UINTN mNewStackBase[EL0_STACK_SIZE / sizeof (UINTN)];
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@ -109,12 +109,7 @@ GCC_ASM_EXPORT(CommonCExceptionHandler)
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// exception vector initialization method is used.
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//
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#if defined(ARM_RELOCATE_VECTORS)
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GCC_ASM_EXPORT(ExceptionHandlersStart)
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ASM_PFX(ExceptionHandlersStart):
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#else
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VECTOR_BASE(ExceptionHandlersStart)
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#endif
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.macro ExceptionEntry, val, sp=SPx
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//
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@ -168,13 +163,7 @@ VECTOR_BASE(ExceptionHandlersStart)
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mov x0, #\val
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// Jump to our general handler to deal with all the common parts and process the exception.
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#if defined(ARM_RELOCATE_VECTORS)
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ldr x1, =ASM_PFX(CommonExceptionEntry)
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br x1
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.ltorg
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#else
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b ASM_PFX(CommonExceptionEntry)
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#endif
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.endm
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//
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@ -17,14 +17,9 @@
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#include <Protocol/DebugSupport.h> // for MAX_ARM_EXCEPTION
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UINTN gMaxExceptionNumber = MAX_ARM_EXCEPTION;
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EFI_EXCEPTION_CALLBACK gExceptionHandlers[MAX_ARM_EXCEPTION + 1] = { 0 };
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EFI_EXCEPTION_CALLBACK gDebuggerExceptionHandlers[MAX_ARM_EXCEPTION + 1] = { 0 };
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PHYSICAL_ADDRESS gExceptionVectorAlignmentMask = ARM_VECTOR_TABLE_ALIGNMENT;
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// Exception handler contains branch to vector location (jmp $) so no handler
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// NOTE: This code assumes vectors are ARM and not Thumb code
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UINTN gDebuggerNoHandlerValue = 0xEAFFFFFE;
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UINTN gMaxExceptionNumber = MAX_ARM_EXCEPTION;
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EFI_EXCEPTION_CALLBACK gExceptionHandlers[MAX_ARM_EXCEPTION + 1] = { 0 };
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PHYSICAL_ADDRESS gExceptionVectorAlignmentMask = ARM_VECTOR_TABLE_ALIGNMENT;
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RETURN_STATUS
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ArchVectorConfig (
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@ -21,19 +21,6 @@
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#include <Library/DebugLib.h>
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#include <Library/DefaultExceptionHandlerLib.h>
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STATIC
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RETURN_STATUS
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CopyExceptionHandlers (
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IN PHYSICAL_ADDRESS BaseAddress
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);
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EFI_STATUS
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EFIAPI
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RegisterExceptionHandler (
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IN EFI_EXCEPTION_TYPE ExceptionType,
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IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
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);
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VOID
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ExceptionHandlersStart (
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VOID
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@ -52,21 +39,7 @@ ArchVectorConfig (
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// these globals are provided by the architecture specific source (Arm or AArch64)
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extern UINTN gMaxExceptionNumber;
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extern EFI_EXCEPTION_CALLBACK gExceptionHandlers[];
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extern EFI_EXCEPTION_CALLBACK gDebuggerExceptionHandlers[];
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extern PHYSICAL_ADDRESS gExceptionVectorAlignmentMask;
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extern UINTN gDebuggerNoHandlerValue;
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// A compiler flag adjusts the compilation of this library to a variant where
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// the vectors are relocated (copied) to another location versus using the
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// vectors in-place. Since this effects an assembly .align directive we must
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// address this at library build time. Since this affects the build of the
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// library we cannot represent this in a PCD since PCDs are evaluated on
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// a per-module basis.
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#if defined (ARM_RELOCATE_VECTORS)
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STATIC CONST BOOLEAN gArmRelocateVectorTable = TRUE;
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#else
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STATIC CONST BOOLEAN gArmRelocateVectorTable = FALSE;
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#endif
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/**
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Initializes all CPU exceptions entries and provides the default exception handlers.
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@ -90,107 +63,26 @@ InitializeCpuExceptionHandlers (
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IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL
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)
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{
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RETURN_STATUS Status;
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UINT64 VectorBase;
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UINT64 VectorBase;
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Status = EFI_SUCCESS;
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// use VBAR to point to where our exception handlers are
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// if we are requested to copy exception handlers to another location
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if (gArmRelocateVectorTable) {
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VectorBase = PcdGet64 (PcdCpuVectorBaseAddress);
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Status = CopyExceptionHandlers (VectorBase);
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} else {
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// use VBAR to point to where our exception handlers are
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// The vector table must be aligned for the architecture. If this
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// assertion fails ensure the appropriate FFS alignment is in effect,
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// which can be accomplished by ensuring the proper Align=X statement
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// in the platform packaging rules. For ARM Align=32 is required and
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// for AArch64 Align=4K is required. Align=Auto can be used but this
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// is known to cause an issue with populating the reset vector area
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// for encapsulated FVs.
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ASSERT (((UINTN)ExceptionHandlersStart & gExceptionVectorAlignmentMask) == 0);
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// The vector table must be aligned for the architecture. If this
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// assertion fails ensure the appropriate FFS alignment is in effect,
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// which can be accomplished by ensuring the proper Align=X statement
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// in the platform packaging rules. For ARM Align=32 is required and
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// for AArch64 Align=4K is required. Align=Auto can be used but this
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// is known to cause an issue with populating the reset vector area
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// for encapsulated FVs.
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ASSERT (((UINTN)ExceptionHandlersStart & gExceptionVectorAlignmentMask) == 0);
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VectorBase = (UINT64)(UINTN)ExceptionHandlersStart;
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// We do not copy the Exception Table at PcdGet64(PcdCpuVectorBaseAddress). We just set Vector
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// Base Address to point into CpuDxe code.
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VectorBase = (UINT64)(UINTN)ExceptionHandlersStart;
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// call the architecture-specific routine to prepare for the new vector
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// configuration to take effect
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ArchVectorConfig ((UINTN)VectorBase);
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Status = RETURN_SUCCESS;
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}
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if (!RETURN_ERROR (Status)) {
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// call the architecture-specific routine to prepare for the new vector
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// configuration to take effect
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ArchVectorConfig ((UINTN)VectorBase);
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ArmWriteVBar ((UINTN)VectorBase);
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}
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return RETURN_SUCCESS;
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}
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/**
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Copies exception handlers to the specified address.
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Caller should try to get an array of interrupt and/or exception vectors that are in use and need to
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persist by EFI_VECTOR_HANDOFF_INFO defined in PI 1.3 specification.
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If caller cannot get reserved vector list or it does not exists, set VectorInfo to NULL.
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If VectorInfo is not NULL, the exception vectors will be initialized per vector attribute accordingly.
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@param[in] VectorInfo Pointer to reserved vector list.
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@retval EFI_SUCCESS CPU Exception Entries have been successfully initialized
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with default exception handlers.
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@retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if VectorInfo is not NULL.
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@retval EFI_UNSUPPORTED This function is not supported.
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**/
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STATIC
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RETURN_STATUS
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CopyExceptionHandlers (
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IN PHYSICAL_ADDRESS BaseAddress
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)
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{
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RETURN_STATUS Status;
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UINTN Length;
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UINTN Index;
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UINT32 *VectorBase;
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// ensure that the destination value specifies an address meeting the vector alignment requirements
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ASSERT ((BaseAddress & gExceptionVectorAlignmentMask) == 0);
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//
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// Copy an implementation of the exception vectors to PcdCpuVectorBaseAddress.
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//
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Length = (UINTN)ExceptionHandlersEnd - (UINTN)ExceptionHandlersStart;
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VectorBase = (UINT32 *)(UINTN)BaseAddress;
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if (FeaturePcdGet (PcdDebuggerExceptionSupport) == TRUE) {
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// Save existing vector table, in case debugger is already hooked in
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CopyMem ((VOID *)gDebuggerExceptionHandlers, (VOID *)VectorBase, sizeof (EFI_EXCEPTION_CALLBACK)* (gMaxExceptionNumber+1));
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}
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// Copy our assembly code into the page that contains the exception vectors.
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CopyMem ((VOID *)VectorBase, (VOID *)(UINTN)ExceptionHandlersStart, Length);
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//
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// Initialize the C entry points for interrupts
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//
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for (Index = 0; Index <= gMaxExceptionNumber; Index++) {
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if (!FeaturePcdGet (PcdDebuggerExceptionSupport) ||
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(gDebuggerExceptionHandlers[Index] == 0) || (gDebuggerExceptionHandlers[Index] == (VOID *)gDebuggerNoHandlerValue))
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{
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Status = RegisterExceptionHandler (Index, NULL);
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ASSERT_EFI_ERROR (Status);
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} else {
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// If the debugger has already hooked put its vector back
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VectorBase[Index] = (UINT32)(UINTN)gDebuggerExceptionHandlers[Index];
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}
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}
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// Flush Caches since we updated executable stuff
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InvalidateInstructionCacheRange ((VOID *)(UINTN)BaseAddress, Length);
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ArmWriteVBar ((UINTN)VectorBase);
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return RETURN_SUCCESS;
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}
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@ -239,33 +131,6 @@ RegisterCpuInterruptHandler (
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return RETURN_SUCCESS;
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}
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/**
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Register exception handler.
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@param This A pointer to the SMM_CPU_SERVICE_PROTOCOL instance.
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@param ExceptionType Defines which interrupt or exception to hook. Type EFI_EXCEPTION_TYPE and
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the valid values for this parameter are defined in EFI_DEBUG_SUPPORT_PROTOCOL
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of the UEFI 2.0 specification.
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@param InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER
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that is called when a processor interrupt occurs.
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If this parameter is NULL, then the handler will be uninstalled.
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@retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled.
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@retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler for InterruptType was previously installed.
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@retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not previously installed.
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@retval EFI_UNSUPPORTED The interrupt specified by InterruptType is not supported.
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**/
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EFI_STATUS
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EFIAPI
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RegisterExceptionHandler (
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IN EFI_EXCEPTION_TYPE ExceptionType,
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IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
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)
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{
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return RegisterCpuInterruptHandler (ExceptionType, InterruptHandler);
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}
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VOID
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EFIAPI
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CommonCExceptionHandler (
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@ -7,12 +7,6 @@
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# alignment must be propagated into the parent FFS/FV through FDF build rules
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# for the relevant module types (i.e. Align=Auto).
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#
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# Note that using this library instance can cause growth to the size of the FV
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# due to the padding added by the build tools to meet the vector alignment
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# requirements and may not be desirable for space-sensitive FVs (uncompressed /
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# XIP components). The alternative library instance, ArmRelocateExceptionLib
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# should be considered for these applications.
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#
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# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
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# Copyright (c) 2016 HP Development Company, L.P.
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#
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@ -53,5 +47,3 @@
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MemoryAllocationLib
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[Pcd]
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gArmTokenSpaceGuid.PcdDebuggerExceptionSupport
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gArmTokenSpaceGuid.PcdCpuVectorBaseAddress
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@ -1,58 +0,0 @@
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## @file
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# Instance of CpuExceptionHandlerLib Library for ARM/AArch64 architectures
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#
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# This library instance is used when exception vectors must be relocated to
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# a specific address. The address is specified by PcdCpuVectorBaseAddress.
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# Since the alignment requirement for in-place exception handlers causes
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# image size to increase, this instance is useful for modules that need to
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# minimize space used in their FV (like XIP modules). See ArmExceptionLib.inf
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# for the in-place exception handler alternative.
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#
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# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
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# Copyright (c) 2016 HP Development Company, L.P.
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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#
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[Defines]
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INF_VERSION = 0x00010005
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BASE_NAME = ArmRelocateExceptionLib
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FILE_GUID = 62AA447A-1FBA-429E-9E0D-CE0D2D8DCF58
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MODULE_TYPE = BASE
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VERSION_STRING = 1.0
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LIBRARY_CLASS = CpuExceptionHandlerLib
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[Sources.common]
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ArmExceptionLib.c
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[Sources.Arm]
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Arm/ArmException.c
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Arm/ExceptionSupport.S | GCC
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[Sources.AARCH64]
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AArch64/AArch64Exception.c
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AArch64/ExceptionSupport.S
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[Packages]
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MdePkg/MdePkg.dec
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MdeModulePkg/MdeModulePkg.dec
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ArmPkg/ArmPkg.dec
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[LibraryClasses]
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ArmLib
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DebugLib
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DefaultExceptionHandlerLib
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BaseMemoryLib
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CacheMaintenanceLib
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[Pcd]
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gArmTokenSpaceGuid.PcdDebuggerExceptionSupport
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gArmTokenSpaceGuid.PcdCpuVectorBaseAddress
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[BuildOptions]
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# We must pass a define to specify that we are relocating vectors so the
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# vector alignment is relaxed (space savings); note that this must be done
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# as a define and not a PCD since it affects assembly directives.
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*_*_*_PP_FLAGS = -DARM_RELOCATE_VECTORS
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*_*_*_CC_FLAGS = -DARM_RELOCATE_VECTORS
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