mirror of https://github.com/acidanthera/audk.git
Add the missing parameter comments for BaseSerialPortLib16550 lib. MdePkg: Fix Clang build failure
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Gao, Liming <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15796 6f19259b-4bc3-4df7-8a09-765794883524
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@ -13,8 +13,8 @@
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**/
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#ifndef _PEI_SERIAL_PORT_PPI_H
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#define _PEI_SERIAL_PORT_PPI_H
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#ifndef __PEI_SERIAL_PORT_PPI_H__
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#define __PEI_SERIAL_PORT_PPI_H__
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#define PEI_SERIAL_PORT_PPI \
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{ \
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@ -63,6 +63,7 @@ typedef struct {
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parameter Offset is added to the base address of the 16550 registers that is specified
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by PcdSerialRegisterBase.
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@param Base The base address register of UART device.
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@param Offset The offset of the 16550 register to read.
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@return The value read from the 16550 register.
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@ -87,6 +88,7 @@ SerialPortReadRegister (
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parameter Offset is added to the base address of the 16550 registers that is specified
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by PcdSerialRegisterBase.
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@param Base The base address register of UART device.
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@param Offset The offset of the 16550 register to write.
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@param Value The value to write to the 16550 register specified by Offset.
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@ -173,7 +175,7 @@ SerialPortLibUpdatePciRegister32 (
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This function assumes Root Bus Numer is Zero, and enables I/O and MMIO in PCI UART
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Device if they are not already enabled.
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@return The base address register of the PCI UART device.
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@return The base address register of the UART device.
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**/
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UINTN
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@ -411,6 +413,8 @@ GetSerialRegisterBase (
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/**
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Return whether the hardware flow control signal allows writing.
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@param SerialRegisterBase The base address register of UART device.
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@retval TRUE The serial port is writable.
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@retval FALSE The serial port is not writable.
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**/
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