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Add the missing parameter comments for BaseSerialPortLib16550 lib. MdePkg: Fix Clang build failure

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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Gao, Liming <liming.gao@intel.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15796 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Gao, Liming 2014-08-13 08:39:54 +00:00 committed by lgao4
parent ea5396f31a
commit 74a6d86079
2 changed files with 7 additions and 3 deletions
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4
MdeModulePkg/Include/Ppi/SerialPortPei.h
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@ -13,8 +13,8 @@
**/ **/
#ifndef _PEI_SERIAL_PORT_PPI_H #ifndef __PEI_SERIAL_PORT_PPI_H__
#define _PEI_SERIAL_PORT_PPI_H #define __PEI_SERIAL_PORT_PPI_H__
#define PEI_SERIAL_PORT_PPI \ #define PEI_SERIAL_PORT_PPI \
{ \ { \

6
MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c
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@ -63,6 +63,7 @@ typedef struct {
parameter Offset is added to the base address of the 16550 registers that is specified parameter Offset is added to the base address of the 16550 registers that is specified
by PcdSerialRegisterBase. by PcdSerialRegisterBase.
@param Base The base address register of UART device.
@param Offset The offset of the 16550 register to read. @param Offset The offset of the 16550 register to read.
@return The value read from the 16550 register. @return The value read from the 16550 register.
@ -87,6 +88,7 @@ SerialPortReadRegister (
parameter Offset is added to the base address of the 16550 registers that is specified parameter Offset is added to the base address of the 16550 registers that is specified
by PcdSerialRegisterBase. by PcdSerialRegisterBase.
@param Base The base address register of UART device.
@param Offset The offset of the 16550 register to write. @param Offset The offset of the 16550 register to write.
@param Value The value to write to the 16550 register specified by Offset. @param Value The value to write to the 16550 register specified by Offset.
@ -173,7 +175,7 @@ SerialPortLibUpdatePciRegister32 (
This function assumes Root Bus Numer is Zero, and enables I/O and MMIO in PCI UART This function assumes Root Bus Numer is Zero, and enables I/O and MMIO in PCI UART
Device if they are not already enabled. Device if they are not already enabled.
@return The base address register of the PCI UART device. @return The base address register of the UART device.
**/ **/
UINTN UINTN
@ -411,6 +413,8 @@ GetSerialRegisterBase (
/** /**
Return whether the hardware flow control signal allows writing. Return whether the hardware flow control signal allows writing.
@param SerialRegisterBase The base address register of UART device.
@retval TRUE The serial port is writable. @retval TRUE The serial port is writable.
@retval FALSE The serial port is not writable. @retval FALSE The serial port is not writable.
**/ **/