EHCI driver need enable routine and disable Legacy USB

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@2233 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
klu2 2007-01-12 05:17:27 +00:00
parent f92b6f195c
commit 74c56167df
5 changed files with 263 additions and 0 deletions

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@ -0,0 +1,52 @@
/*++
Copyright (c) 2006, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Module Name:
Debug.c
Abstract:
Revision History
--*/
#include "Ehci.h"
void
DumpEHCIPortsStatus (
IN USB2_HC_DEV *HcDev
)
{
UINT8 PortNumber;
UINT8 Index;
UINT32 Value;
ReadEhcCapabiltiyReg (
HcDev,
HCSPARAMS,
&Value
);
PortNumber = (UINT8) (Value & HCSP_NPORTS);
for (Index = 0; Index < PortNumber; Index++) {
ReadEhcOperationalReg (
HcDev,
PORTSC + 4 * Index,
&Value
);
DEBUG((gEHCDebugLevel, "Port[%d] = 0x%x\n", Index, Value));
}
}

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@ -441,6 +441,13 @@ EhciDriverBindingStart (
Status = EFI_DEVICE_ERROR;
goto uninstall_usb2hc_protocol;
}
ClearLegacySupport (HcDev);
HostReset (HcDev);
DEBUG_CODE (
DumpEHCIPortsStatus (HcDev);
);
//
// Create and Init Perodic Frame List

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@ -2681,4 +2681,18 @@ Returns:
--*/
;
VOID
ClearLegacySupport (
IN USB2_HC_DEV *HcDev
);
VOID
HostReset (
IN USB2_HC_DEV *HcDev
);
VOID
DumpEHCIPortsStatus (
IN USB2_HC_DEV *HcDev
);
#endif

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@ -49,6 +49,7 @@
</LibraryClassDefinitions>
<SourceFiles>
<Filename>Ehci.c</Filename>
<Filename>Debug.c</Filename>
<Filename>EhciMem.c</Filename>
<Filename>EhciReg.c</Filename>
<Filename>EhciSched.c</Filename>

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@ -22,6 +22,75 @@ Revision History
#include "Ehci.h"
VOID
HostReset (
IN USB2_HC_DEV *HcDev
)
{
UINT32 Value;
UINT32 TimeOut;
ReadEhcOperationalReg (
HcDev,
USBCMD,
&Value
);
Value = Value & (~USBCMD_RS);
WriteEhcOperationalReg (
HcDev,
USBCMD,
Value
);
TimeOut = 40;
while (TimeOut --) {
gBS->Stall (500);
ReadEhcOperationalReg (
HcDev,
USBSTS,
&Value
);
if ((Value & USBSTS_HCH) != 0) {
break;
}
}
if (TimeOut == 0) {
DEBUG((gEHCErrorLevel, "TimeOut for clearing Run/Stop bit\n"));
}
ReadEhcOperationalReg (
HcDev,
USBCMD,
&Value
);
Value = Value | USBCMD_HCRESET;
WriteEhcOperationalReg (
HcDev,
USBCMD,
Value
);
TimeOut = 40;
while (TimeOut --) {
gBS->Stall (500);
ReadEhcOperationalReg (
HcDev,
USBCMD,
&Value
);
if ((Value & USBCMD_HCRESET) == 0) {
break;
}
}
if (TimeOut == 0) {
DEBUG((gEHCErrorLevel, "TimeOut for Host Reset\n"));
}
}
EFI_STATUS
ReadEhcCapabiltiyReg (
IN USB2_HC_DEV *HcDev,
@ -129,6 +198,126 @@ Returns:
);
}
VOID
ClearLegacySupport (
IN USB2_HC_DEV *HcDev
)
/*++
Routine Description:
Stop the legacy USB SMI
Arguments:
HcDev - USB2_HC_DEV
Returns:
EFI_SUCCESS Success
EFI_DEVICE_ERROR Fail
--*/
{
UINT32 EECP;
UINT32 Value;
UINT32 TimeOut;
ReadEhcCapabiltiyReg (
HcDev,
HCCPARAMS,
&EECP
);
EECP = (EECP >> 8) & 0xFF;
DEBUG ((gEHCDebugLevel, "EHCI: EECPBase = 0x%x\n", EECP));
HcDev->PciIo->Pci.Read (
HcDev->PciIo,
EfiPciIoWidthUint32,
EECP,
1,
&Value
);
DEBUG((gEHCDebugLevel, "EECP[0] = 0x%x\n", Value));
HcDev->PciIo->Pci.Read (
HcDev->PciIo,
EfiPciIoWidthUint32,
EECP + 0x4,
1,
&Value
);
DEBUG((gEHCDebugLevel, "EECP[4] = 0x%x\n", Value));
HcDev->PciIo->Pci.Read (
HcDev->PciIo,
EfiPciIoWidthUint32,
EECP,
1,
&Value
);
Value = Value | (0x1 << 24);
DEBUG((gEHCErrorLevel, "Value Written = 0x%x\n", Value));
HcDev->PciIo->Pci.Write (
HcDev->PciIo,
EfiPciIoWidthUint32,
EECP,
1,
&Value
);
TimeOut = 40;
while (TimeOut --) {
gBS->Stall (500);
HcDev->PciIo->Pci.Read (
HcDev->PciIo,
EfiPciIoWidthUint32,
EECP,
1,
&Value
);
if ((Value & 0x01010000) == 0x01000000) {
break;
}
}
if (TimeOut == 0) {
DEBUG((gEHCErrorLevel, "Timeout for getting HC OS Owned Semaphore\n" ));
}
DEBUG((gEHCErrorLevel, "After Release Value\n" ));
HcDev->PciIo->Pci.Read (
HcDev->PciIo,
EfiPciIoWidthUint32,
EECP,
1,
&Value
);
DEBUG((gEHCDebugLevel, "EECP[0] = 0x%x\n", Value));
HcDev->PciIo->Pci.Read (
HcDev->PciIo,
EfiPciIoWidthUint32,
EECP + 0x4,
1,
&Value
);
DEBUG((gEHCDebugLevel, "EECP[4] = 0x%x\n", Value));
}
EFI_STATUS
GetCapabilityLen (
IN USB2_HC_DEV *HcDev