1) Clean up MdePkg/Include/Common/BootScript.h and remove boot script definition which is not defined in Framework Boot Scirpt Specification V0.91.

2) Add MdePkg/Include/IndustryStandard/SmBus.h which hosts the standard definition defined in System Management Bus Spefication V2.0.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@2266 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
qwang12 2007-01-18 09:15:52 +00:00
parent d57d21b5ba
commit 76dbeb3b91
4 changed files with 105 additions and 168 deletions

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@ -1,7 +1,7 @@
/** @file
This file declares the related BootScript definitions and some SMBus definitions.
This file declares the related BootScript definitions.
Copyright (c) 2006, Intel Corporation
Copyright (c) 2006 - 2007, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -13,12 +13,12 @@
Module Name: BootScript.h
@par Revision Reference:
These definitions are defined in BootScript Spec 0.91 and SmBus PPI spec 0.9.
These definitions are defined in BootScript Spec 0.91.
**/
#ifndef _EFI_SCRIPT_H_
#define _EFI_SCRIPT_H_
#ifndef _EFI_BOOT_SCRIPT_H_
#define _EFI_BOOT_SCRIPT_H_
#define EFI_ACPI_S3_RESUME_SCRIPT_TABLE 0x00
@ -41,10 +41,6 @@
#define EFI_BOOT_SCRIPT_TABLE_OPCODE 0xAA
#define EFI_BOOT_SCRIPT_TERMINATE_OPCODE 0xFF
#ifndef __GNUC__
#pragma pack(1)
#endif
//
// EFI Boot Script Width
//
@ -64,161 +60,4 @@ typedef enum {
EfiBootScriptWidthMaximum
} EFI_BOOT_SCRIPT_WIDTH;
//
// EFI Smbus Device Address, Smbus Device Command, Smbus Operation
//
typedef struct {
UINTN SmbusDeviceAddress : 7;
} EFI_SMBUS_DEVICE_ADDRESS;
typedef UINTN EFI_SMBUS_DEVICE_COMMAND;
typedef enum _EFI_SMBUS_OPERATION
{
EfiSmbusQuickRead,
EfiSmbusQuickWrite,
EfiSmbusReceiveByte,
EfiSmbusSendByte,
EfiSmbusReadByte,
EfiSmbusWriteByte,
EfiSmbusReadWord,
EfiSmbusWriteWord,
EfiSmbusReadBlock,
EfiSmbusWriteBlock,
EfiSmbusProcessCall,
EfiSmbusBWBRProcessCall
} EFI_SMBUS_OPERATION;
//
// Boot Script Opcode Header Structure Definitions
//
typedef struct {
UINT16 OpCode;
UINT8 Length;
} EFI_BOOT_SCRIPT_GENERIC_HEADER;
typedef struct {
UINT16 OpCode;
UINT8 Length;
UINT16 Version;
UINT32 TableLength;
UINT16 Reserved[2];
} EFI_BOOT_SCRIPT_TABLE_HEADER;
typedef struct {
UINT16 OpCode;
UINT8 Length;
UINT32 Width;
} EFI_BOOT_SCRIPT_COMMON_HEADER;
typedef struct {
UINT16 OpCode;
UINT8 Length;
UINT32 Width;
UINT32 Count;
UINT64 Address;
} EFI_BOOT_SCRIPT_IO_WRITE;
typedef struct {
UINT16 OpCode;
UINT8 Length;
UINT32 Width;
UINT64 Address;
} EFI_BOOT_SCRIPT_IO_READ_WRITE;
typedef struct {
UINT16 OpCode;
UINT8 Length;
UINT32 Width;
UINT32 Count;
UINT64 Address;
} EFI_BOOT_SCRIPT_MEM_WRITE;
typedef struct {
UINT16 OpCode;
UINT8 Length;
UINT32 Width;
UINT64 Address;
} EFI_BOOT_SCRIPT_MEM_READ_WRITE;
typedef struct {
UINT16 OpCode;
UINT8 Length;
UINT32 Width;
UINT32 Count;
UINT64 Address;
} EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE;
typedef struct {
UINT16 OpCode;
UINT8 Length;
UINT32 Width;
UINT64 Address;
} EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE;
typedef struct {
UINT16 OpCode;
UINT8 Length;
UINT64 SlaveAddress;
UINT64 Command;
UINT32 Operation;
BOOLEAN PecCheck;
UINT32 DataSize;
} EFI_BOOT_SCRIPT_SMBUS_EXECUTE;
typedef struct {
UINT16 OpCode;
UINT8 Length;
UINT64 Duration;
} EFI_BOOT_SCRIPT_STALL;
typedef struct {
UINT16 OpCode;
UINT8 Length;
EFI_PHYSICAL_ADDRESS EntryPoint;
} EFI_BOOT_SCRIPT_DISPATCH;
typedef struct {
UINT16 OpCode;
UINT8 Length;
EFI_PHYSICAL_ADDRESS EntryPoint;
EFI_PHYSICAL_ADDRESS Context;
} EFI_BOOT_SCRIPT_DISPATCH_2;
typedef struct {
UINT16 OpCode;
UINT8 Length;
UINT32 InformationLength;
EFI_PHYSICAL_ADDRESS Information;
} EFI_BOOT_SCRIPT_INFORMATION;
typedef struct {
UINT16 OpCode;
UINT8 Length;
} EFI_BOOT_SCRIPT_TERMINATE;
typedef union {
EFI_BOOT_SCRIPT_GENERIC_HEADER *Header;
EFI_BOOT_SCRIPT_TABLE_HEADER *TableInfo;
EFI_BOOT_SCRIPT_IO_WRITE *IoWrite;
EFI_BOOT_SCRIPT_IO_READ_WRITE *IoReadWrite;
EFI_BOOT_SCRIPT_MEM_WRITE *MemWrite;
EFI_BOOT_SCRIPT_MEM_READ_WRITE *MemReadWrite;
EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE *PciWrite;
EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE *PciReadWrite;
EFI_BOOT_SCRIPT_SMBUS_EXECUTE *SmbusExecute;
EFI_BOOT_SCRIPT_STALL *Stall;
EFI_BOOT_SCRIPT_DISPATCH *Dispatch;
EFI_BOOT_SCRIPT_DISPATCH_2 *Dispatch2;
EFI_BOOT_SCRIPT_INFORMATION *Information;
EFI_BOOT_SCRIPT_TERMINATE *Terminate;
EFI_BOOT_SCRIPT_COMMON_HEADER *CommonHeader;
UINT8 *Raw;
} BOOT_SCRIPT_POINTERS;
#ifndef __GNUC__
#pragma pack()
#endif
#endif

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@ -0,0 +1,94 @@
/** @file
This file declares the SMBus definitions defined in SmBus Specifciation
V2.0.
Copyright (c) 2007, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
@par Revision Reference:
These definitions are defined in System Management Bus (SmBus) Specification V2.0.
**/
#ifndef _SMBUS_H_
#define _SMBUS_H_
//
// Smbus Device Address, Smbus Device Command, Smbus Operations
//
typedef struct {
UINTN SmbusDeviceAddress : 7;
} EFI_SMBUS_DEVICE_ADDRESS;
typedef UINTN EFI_SMBUS_DEVICE_COMMAND;
typedef enum _EFI_SMBUS_OPERATION
{
EfiSmbusQuickRead,
EfiSmbusQuickWrite,
EfiSmbusReceiveByte,
EfiSmbusSendByte,
EfiSmbusReadByte,
EfiSmbusWriteByte,
EfiSmbusReadWord,
EfiSmbusWriteWord,
EfiSmbusReadBlock,
EfiSmbusWriteBlock,
EfiSmbusProcessCall,
EfiSmbusBWBRProcessCall
} EFI_SMBUS_OPERATION;
#endif
/** @file
This file declares the SMBus definitions defined in SmBus Specifciation
V2.0.
Copyright (c) 2007, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
@par Revision Reference:
These definitions are defined in System Management Bus (SmBus) Specification V2.0.
**/
#ifndef _SMBUS_H_
#define _SMBUS_H_
//
// Smbus Device Address, Smbus Device Command, Smbus Operations
//
typedef struct {
UINTN SmbusDeviceAddress : 7;
} EFI_SMBUS_DEVICE_ADDRESS;
typedef UINTN EFI_SMBUS_DEVICE_COMMAND;
typedef enum _EFI_SMBUS_OPERATION
{
EfiSmbusQuickRead,
EfiSmbusQuickWrite,
EfiSmbusReceiveByte,
EfiSmbusSendByte,
EfiSmbusReadByte,
EfiSmbusWriteByte,
EfiSmbusReadWord,
EfiSmbusWriteWord,
EfiSmbusReadBlock,
EfiSmbusWriteBlock,
EfiSmbusProcessCall,
EfiSmbusBWBRProcessCall
} EFI_SMBUS_OPERATION;
#endif

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@ -1,7 +1,7 @@
/** @file
This file declares Smbus PPI.
Copyright (c) 2006, Intel Corporation
Copyright (c) 2006 - 2007, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -21,6 +21,8 @@
#ifndef _PEI_SMBUS_PPI_H
#define _PEI_SMBUS_PPI_H
#include <IndustryStandard/SmBus.h>
#define EFI_PEI_SMBUS_PPI_GUID \
{ \
0xabd42895, 0x78cf, 0x4872, {0x84, 0x44, 0x1b, 0x5c, 0x18, 0xb, 0xfb, 0xda } \

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@ -1,7 +1,7 @@
/** @file
This file declares the EFI SMBus Host Controller protocol
Copyright (c) 2006, Intel Corporation
Copyright (c) 2006 - 2007, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -21,6 +21,8 @@
#ifndef _EFI_SMBUS_H
#define _EFI_SMBUS_H
#include <IndustryStandard/SmBus.h>
#define EFI_SMBUS_HC_PROTOCOL_GUID \
{ \
0xe49d33ed, 0x513d, 0x4634, {0xb6, 0x98, 0x6f, 0x55, 0xaa, 0x75, 0x1c, 0x1b } \