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UefiCpuPkg: Add PCD to control SMRR enable & SmmFeatureControl support
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3962 Two SMM variables (mSmrrSupported & mSmmFeatureControlSupported) are global variables, they control whether the SMRR and SMM Feature Control MSR will be restored respectively. To avoid the TOCTOU, add PCD to control SMRR & SmmFeatureControl enable. Cc: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
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@ -35,3 +35,7 @@
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[Pcd]
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[Pcd]
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gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber ## SOMETIMES_CONSUMES
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gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber ## SOMETIMES_CONSUMES
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[FeaturePcd]
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gUefiCpuPkgTokenSpaceGuid.PcdSmrrEnable ## CONSUMES
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gUefiCpuPkgTokenSpaceGuid.PcdSmmFeatureControlEnable ## CONSUMES
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@ -37,16 +37,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
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#define SMM_FEATURES_LIB_IA32_MCA_CAP 0x17D
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#define SMM_FEATURES_LIB_IA32_MCA_CAP 0x17D
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#define SMM_CODE_ACCESS_CHK_BIT BIT58
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#define SMM_CODE_ACCESS_CHK_BIT BIT58
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//
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// Set default value to assume SMRR is not supported
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//
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BOOLEAN mSmrrSupported = FALSE;
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//
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// Set default value to assume MSR_SMM_FEATURE_CONTROL is not supported
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//
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BOOLEAN mSmmFeatureControlSupported = FALSE;
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//
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//
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// Set default value to assume IA-32 Architectural MSRs are used
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// Set default value to assume IA-32 Architectural MSRs are used
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//
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//
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@ -98,7 +88,7 @@ CpuFeaturesLibInitialization (
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// Check MTRR_CAP MSR bit 11 for SMRR support
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// Check MTRR_CAP MSR bit 11 for SMRR support
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//
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//
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if ((AsmReadMsr64 (SMM_FEATURES_LIB_IA32_MTRR_CAP) & BIT11) != 0) {
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if ((AsmReadMsr64 (SMM_FEATURES_LIB_IA32_MTRR_CAP) & BIT11) != 0) {
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mSmrrSupported = TRUE;
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ASSERT (FeaturePcdGet (PcdSmrrEnable));
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}
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}
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}
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}
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@ -111,7 +101,7 @@ CpuFeaturesLibInitialization (
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//
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//
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if (FamilyId == 0x06) {
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if (FamilyId == 0x06) {
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if ((ModelId == 0x1C) || (ModelId == 0x26) || (ModelId == 0x27) || (ModelId == 0x35) || (ModelId == 0x36)) {
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if ((ModelId == 0x1C) || (ModelId == 0x26) || (ModelId == 0x27) || (ModelId == 0x35) || (ModelId == 0x36)) {
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mSmrrSupported = FALSE;
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ASSERT (!FeaturePcdGet (PcdSmrrEnable));
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}
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}
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}
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}
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@ -216,13 +206,12 @@ SmmCpuFeaturesInitializeProcessor (
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// accessing SMRR base/mask MSRs. If Lock(BIT0) of MSR_FEATURE_CONTROL MSR(0x3A)
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// accessing SMRR base/mask MSRs. If Lock(BIT0) of MSR_FEATURE_CONTROL MSR(0x3A)
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// is set, then the MSR is locked and can not be modified.
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// is set, then the MSR is locked and can not be modified.
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//
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//
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if (mSmrrSupported && (mSmrrPhysBaseMsr == SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSBASE)) {
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if ((FeaturePcdGet (PcdSmrrEnable)) && (mSmrrPhysBaseMsr == SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSBASE)) {
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FeatureControl = AsmReadMsr64 (SMM_FEATURES_LIB_IA32_FEATURE_CONTROL);
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FeatureControl = AsmReadMsr64 (SMM_FEATURES_LIB_IA32_FEATURE_CONTROL);
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if ((FeatureControl & BIT3) == 0) {
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if ((FeatureControl & BIT3) == 0) {
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ASSERT ((FeatureControl & BIT0) == 0);
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if ((FeatureControl & BIT0) == 0) {
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if ((FeatureControl & BIT0) == 0) {
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AsmWriteMsr64 (SMM_FEATURES_LIB_IA32_FEATURE_CONTROL, FeatureControl | BIT3);
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AsmWriteMsr64 (SMM_FEATURES_LIB_IA32_FEATURE_CONTROL, FeatureControl | BIT3);
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} else {
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mSmrrSupported = FALSE;
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}
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}
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}
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}
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}
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}
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@ -234,7 +223,7 @@ SmmCpuFeaturesInitializeProcessor (
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// from SMRAM region. If SMRR is enabled here, then the SMRAM region
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// from SMRAM region. If SMRR is enabled here, then the SMRAM region
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// is protected and the normal mode code execution will fail.
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// is protected and the normal mode code execution will fail.
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//
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//
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if (mSmrrSupported) {
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if (FeaturePcdGet (PcdSmrrEnable)) {
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//
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//
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// SMRR size cannot be less than 4-KBytes
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// SMRR size cannot be less than 4-KBytes
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// SMRR size must be of length 2^n
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// SMRR size must be of length 2^n
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@ -287,7 +276,7 @@ SmmCpuFeaturesInitializeProcessor (
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// Do not access this MSR unless the CPU supports the SmmRegFeatureControl
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// Do not access this MSR unless the CPU supports the SmmRegFeatureControl
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//
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//
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if ((AsmReadMsr64 (SMM_FEATURES_LIB_IA32_MCA_CAP) & SMM_CODE_ACCESS_CHK_BIT) != 0) {
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if ((AsmReadMsr64 (SMM_FEATURES_LIB_IA32_MCA_CAP) & SMM_CODE_ACCESS_CHK_BIT) != 0) {
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mSmmFeatureControlSupported = TRUE;
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ASSERT (FeaturePcdGet (PcdSmmFeatureControlEnable));
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}
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}
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}
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}
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}
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}
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@ -383,7 +372,7 @@ SmmCpuFeaturesDisableSmrr (
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VOID
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VOID
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)
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)
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{
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{
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if (mSmrrSupported && mNeedConfigureMtrrs) {
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if (FeaturePcdGet (PcdSmrrEnable) && mNeedConfigureMtrrs) {
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AsmWriteMsr64 (mSmrrPhysMaskMsr, AsmReadMsr64 (mSmrrPhysMaskMsr) & ~EFI_MSR_SMRR_PHYS_MASK_VALID);
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AsmWriteMsr64 (mSmrrPhysMaskMsr, AsmReadMsr64 (mSmrrPhysMaskMsr) & ~EFI_MSR_SMRR_PHYS_MASK_VALID);
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}
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}
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}
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}
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@ -398,7 +387,7 @@ SmmCpuFeaturesReenableSmrr (
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VOID
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VOID
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)
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)
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{
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{
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if (mSmrrSupported && mNeedConfigureMtrrs) {
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if (FeaturePcdGet (PcdSmrrEnable) && mNeedConfigureMtrrs) {
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AsmWriteMsr64 (mSmrrPhysMaskMsr, AsmReadMsr64 (mSmrrPhysMaskMsr) | EFI_MSR_SMRR_PHYS_MASK_VALID);
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AsmWriteMsr64 (mSmrrPhysMaskMsr, AsmReadMsr64 (mSmrrPhysMaskMsr) | EFI_MSR_SMRR_PHYS_MASK_VALID);
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}
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}
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}
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}
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@ -419,7 +408,7 @@ SmmCpuFeaturesRendezvousEntry (
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//
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//
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// If SMRR is supported and this is the first normal SMI, then enable SMRR
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// If SMRR is supported and this is the first normal SMI, then enable SMRR
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//
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//
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if (mSmrrSupported && !mSmrrEnabled[CpuIndex]) {
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if (FeaturePcdGet (PcdSmrrEnable) && !mSmrrEnabled[CpuIndex]) {
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AsmWriteMsr64 (mSmrrPhysMaskMsr, AsmReadMsr64 (mSmrrPhysMaskMsr) | EFI_MSR_SMRR_PHYS_MASK_VALID);
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AsmWriteMsr64 (mSmrrPhysMaskMsr, AsmReadMsr64 (mSmrrPhysMaskMsr) | EFI_MSR_SMRR_PHYS_MASK_VALID);
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mSmrrEnabled[CpuIndex] = TRUE;
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mSmrrEnabled[CpuIndex] = TRUE;
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}
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}
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@ -460,7 +449,7 @@ SmmCpuFeaturesIsSmmRegisterSupported (
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IN SMM_REG_NAME RegName
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IN SMM_REG_NAME RegName
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)
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)
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{
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{
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if (mSmmFeatureControlSupported && (RegName == SmmRegFeatureControl)) {
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if (FeaturePcdGet (PcdSmmFeatureControlEnable) && (RegName == SmmRegFeatureControl)) {
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return TRUE;
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return TRUE;
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}
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}
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@ -486,7 +475,7 @@ SmmCpuFeaturesGetSmmRegister (
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IN SMM_REG_NAME RegName
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IN SMM_REG_NAME RegName
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)
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)
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{
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{
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if (mSmmFeatureControlSupported && (RegName == SmmRegFeatureControl)) {
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if (FeaturePcdGet (PcdSmmFeatureControlEnable) && (RegName == SmmRegFeatureControl)) {
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return AsmReadMsr64 (SMM_FEATURES_LIB_SMM_FEATURE_CONTROL);
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return AsmReadMsr64 (SMM_FEATURES_LIB_SMM_FEATURE_CONTROL);
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}
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}
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@ -512,7 +501,7 @@ SmmCpuFeaturesSetSmmRegister (
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IN UINT64 Value
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IN UINT64 Value
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)
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)
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{
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{
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if (mSmmFeatureControlSupported && (RegName == SmmRegFeatureControl)) {
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if (FeaturePcdGet (PcdSmmFeatureControlEnable) && (RegName == SmmRegFeatureControl)) {
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AsmWriteMsr64 (SMM_FEATURES_LIB_SMM_FEATURE_CONTROL, Value);
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AsmWriteMsr64 (SMM_FEATURES_LIB_SMM_FEATURE_CONTROL, Value);
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}
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}
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}
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}
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@ -70,5 +70,9 @@
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gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStmExceptionStackSize ## SOMETIMES_CONSUMES
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gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStmExceptionStackSize ## SOMETIMES_CONSUMES
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gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackGuard ## CONSUMES
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gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackGuard ## CONSUMES
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[FeaturePcd]
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gUefiCpuPkgTokenSpaceGuid.PcdSmrrEnable ## CONSUMES
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gUefiCpuPkgTokenSpaceGuid.PcdSmmFeatureControlEnable ## CONSUMES
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[Depex]
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[Depex]
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gEfiMpServiceProtocolGuid
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gEfiMpServiceProtocolGuid
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@ -36,3 +36,7 @@
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[FixedPcd]
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[FixedPcd]
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gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber ## SOMETIMES_CONSUMES
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gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber ## SOMETIMES_CONSUMES
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[FeaturePcd]
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gUefiCpuPkgTokenSpaceGuid.PcdSmrrEnable ## CONSUMES
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gUefiCpuPkgTokenSpaceGuid.PcdSmmFeatureControlEnable ## CONSUMES
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@ -158,6 +158,18 @@
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# @Prompt Lock SMM Feature Control MSR.
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# @Prompt Lock SMM Feature Control MSR.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmFeatureControlMsrLock|TRUE|BOOLEAN|0x3213210B
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gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmFeatureControlMsrLock|TRUE|BOOLEAN|0x3213210B
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## Indicates if SMRR will be enabled.<BR><BR>
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# TRUE - SMRR will be enabled.<BR>
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# FALSE - SMRR will not be enabled.<BR>
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# @Prompt Enable SMRR.
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gUefiCpuPkgTokenSpaceGuid.PcdSmrrEnable|TRUE|BOOLEAN|0x3213210D
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## Indicates if SmmFeatureControl will be enabled.<BR><BR>
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# TRUE - SmmFeatureControl will be enabled.<BR>
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# FALSE - SmmFeatureControl will not be enabled.<BR>
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# @Prompt Support SmmFeatureControl.
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gUefiCpuPkgTokenSpaceGuid.PcdSmmFeatureControlEnable|TRUE|BOOLEAN|0x32132110
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[PcdsFixedAtBuild]
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[PcdsFixedAtBuild]
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## List of exception vectors which need switching stack.
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## List of exception vectors which need switching stack.
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# This PCD will only take into effect if PcdCpuStackGuard is enabled.
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# This PCD will only take into effect if PcdCpuStackGuard is enabled.
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@ -100,6 +100,18 @@
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"TRUE - locked.<BR>\n"
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"TRUE - locked.<BR>\n"
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"FALSE - unlocked.<BR>"
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"FALSE - unlocked.<BR>"
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#string STR_gUefiCpuPkgTokenSpaceGuid_PcdSmrrEnable_PROMPT #language en-US "Indicates if SMRR will be enabled."
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#string STR_gUefiCpuPkgTokenSpaceGuid_PcdSmrrEnable_HELP #language en-US "Indicates if SMRR will be enabled.<BR><BR>\n"
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"TRUE - SMRR will be enabled.<BR>\n"
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"FALSE - SMRR will not be enabled.<BR>"
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#string STR_gUefiCpuPkgTokenSpaceGuid_PcdSmmFeatureControlEnable_PROMPT #language en-US "Indicates if SmmFeatureControl will be enabled."
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#string STR_gUefiCpuPkgTokenSpaceGuid_PcdSmmFeatureControlEnable_HELP #language en-US "Indicates if SmmFeatureControl will be enabled.<BR><BR>\n"
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"TRUE - SmmFeatureControl will be enabled.<BR>\n"
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"FALSE - SmmFeatureControl will not be enabled.<BR>"
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#string STR_gUefiCpuPkgTokenSpaceGuid_PcdPeiTemporaryRamStackSize_PROMPT #language en-US "Stack size in the temporary RAM"
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#string STR_gUefiCpuPkgTokenSpaceGuid_PcdPeiTemporaryRamStackSize_PROMPT #language en-US "Stack size in the temporary RAM"
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#string STR_gUefiCpuPkgTokenSpaceGuid_PcdPeiTemporaryRamStackSize_HELP #language en-US "Specifies stack size in the temporary RAM. 0 means half of TemporaryRamSize."
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#string STR_gUefiCpuPkgTokenSpaceGuid_PcdPeiTemporaryRamStackSize_HELP #language en-US "Specifies stack size in the temporary RAM. 0 means half of TemporaryRamSize."
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