mirror of https://github.com/acidanthera/audk.git
Correctly character in comments of BaseLib BitField.
Signed-off-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14497 6f19259b-4bc3-4df7-8a09-765794883524
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@ -71,8 +71,8 @@ InternalBaseLibBitFieldOrUint (
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//
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// Higher bits in OrData those are not used must be zero.
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//
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// EndBit – StartBit + 1 might be 32 while the result right shifting 32 on a 32bit integer is undefined,
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// So the logic is updated to right shift (EndBit – StartBit) bits and compare the last bit directly.
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// EndBit - StartBit + 1 might be 32 while the result right shifting 32 on a 32bit integer is undefined,
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// So the logic is updated to right shift (EndBit - StartBit) bits and compare the last bit directly.
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//
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ASSERT ((OrData >> (EndBit - StartBit)) == ((OrData >> (EndBit - StartBit)) & 1));
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@ -113,8 +113,8 @@ InternalBaseLibBitFieldAndUint (
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//
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// Higher bits in AndData those are not used must be zero.
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//
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// EndBit – StartBit + 1 might be 32 while the result right shifting 32 on a 32bit integer is undefined,
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// So the logic is updated to right shift (EndBit – StartBit) bits and compare the last bit directly.
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// EndBit - StartBit + 1 might be 32 while the result right shifting 32 on a 32bit integer is undefined,
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// So the logic is updated to right shift (EndBit - StartBit) bits and compare the last bit directly.
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//
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ASSERT ((AndData >> (EndBit - StartBit)) == ((AndData >> (EndBit - StartBit)) & 1));
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@ -811,8 +811,8 @@ BitFieldOr64 (
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//
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// Higher bits in OrData those are not used must be zero.
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//
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// EndBit – StartBit + 1 might be 64 while the result right shifting 64 on RShiftU64() API is invalid,
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// So the logic is updated to right shift (EndBit – StartBit) bits and compare the last bit directly.
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// EndBit - StartBit + 1 might be 64 while the result right shifting 64 on RShiftU64() API is invalid,
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// So the logic is updated to right shift (EndBit - StartBit) bits and compare the last bit directly.
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//
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ASSERT (RShiftU64 (OrData, EndBit - StartBit) == (RShiftU64 (OrData, EndBit - StartBit) & 1));
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@ -863,8 +863,8 @@ BitFieldAnd64 (
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//
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// Higher bits in AndData those are not used must be zero.
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//
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// EndBit – StartBit + 1 might be 64 while the right shifting 64 on RShiftU64() API is invalid,
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// So the logic is updated to right shift (EndBit – StartBit) bits and compare the last bit directly.
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// EndBit - StartBit + 1 might be 64 while the right shifting 64 on RShiftU64() API is invalid,
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// So the logic is updated to right shift (EndBit - StartBit) bits and compare the last bit directly.
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//
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ASSERT (RShiftU64 (AndData, EndBit - StartBit) == (RShiftU64 (AndData, EndBit - StartBit) & 1));
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