ArmPlatformPkg: Add ArmPlatformGetPlatformPpiList()

This function exposes the Platform Specific PPIs. They can be used by
any PrePi modules or passed to the PeiCore by PrePeiCore



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12422 6f19259b-4bc3-4df7-8a09-765794883524

ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEb.c

@@ -107,3 +107,13 @@ ArmPlatformInitializeSystemMemory (
 {
   // We do not need to initialize the System Memory on RTSM
 }
+VOID
+ArmPlatformGetPlatformPpiList (
+  OUT UINTN                   *PpiListSize,
+  OUT EFI_PEI_PPI_DESCRIPTOR  **PpiList
+  )
+{
+  *PpiListSize = 0;
+  *PpiList = NULL;
+}
+

ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c

@@ -154,3 +154,13 @@ ArmPlatformInitializeSystemMemory (
   PL341DmcInit(ARM_VE_DMC_BASE, &DDRTimings);
   PL301AxiInit(ARM_VE_FAXI_BASE);
 }
+VOID
+ArmPlatformGetPlatformPpiList (
+  OUT UINTN                   *PpiListSize,
+  OUT EFI_PEI_PPI_DESCRIPTOR  **PpiList
+  )
+{
+  *PpiListSize = 0;
+  *PpiList = NULL;
+}
+

ArmPlatformPkg/Include/Library/ArmPlatformLib.h

@@ -201,4 +201,20 @@ ArmPlatformGetAdditionalSystemMemory (
   OUT ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR** EfiMemoryMap
   );
 
+/**
+  Return the Platform specific PPIs
+
+  This function exposes the Platform Specific PPIs. They can be used by any PrePi modules or passed
+  to the PeiCore by PrePeiCore.
+
+  @param[out]   PpiListSize         Size in Bytes of the Platform PPI List
+  @param[out]   PpiList             Platform PPI List
+
+**/
+VOID
+ArmPlatformGetPlatformPpiList (
+  OUT UINTN                   *PpiListSize,
+  OUT EFI_PEI_PPI_DESCRIPTOR  **PpiList
+  );
+
 #endif

ArmPlatformPkg/PrePeiCore/MainMPCore.c

@@ -62,6 +62,12 @@ PrimaryMain (
   )
 {
   EFI_SEC_PEI_HAND_OFF        SecCoreData;
+  UINTN                       PpiListSize;
+  EFI_PEI_PPI_DESCRIPTOR      *PpiList;
+  UINTN                       TemporaryRamBase;
+  UINTN                       TemporaryRamSize;
+
+  CreatePpiList (&PpiListSize, &PpiList);
 
   // Enable the GIC Distributor
   ArmGicEnableDistributor(PcdGet32(PcdGicDistributorBase));
@@ -72,6 +78,12 @@ PrimaryMain (
     ArmGicSendSgiTo (PcdGet32(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E);
   }
 
+  // Adjust the Temporary Ram as the new Ppi List (Common + Platform Ppi Lists) is created at
+  // the base of the primary core stack
+  PpiListSize = ALIGN_VALUE(PpiListSize, 0x4);
+  TemporaryRamBase = (UINTN)PcdGet32 (PcdCPUCoresStackBase) + PpiListSize;
+  TemporaryRamSize = (UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize) - PpiListSize;
+
   //
   // Bind this information into the SEC hand-off state
   // Note: this must be in sync with the stuff in the asm file
@@ -80,13 +92,13 @@ PrimaryMain (
   SecCoreData.DataSize               = sizeof(EFI_SEC_PEI_HAND_OFF);
   SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdFvBaseAddress);
   SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdFvSize);
-  SecCoreData.TemporaryRamBase       = (VOID *)(UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize); // We consider we run on the primary core (and so we use the first stack)
+  SecCoreData.TemporaryRamBase       = (VOID *)TemporaryRamBase; // We run on the primary core (and so we use the first stack)
-  SecCoreData.TemporaryRamSize       = (UINTN)(UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize);
+  SecCoreData.TemporaryRamSize       = TemporaryRamSize;
-  SecCoreData.PeiTemporaryRamBase    = (VOID *)((UINTN)(SecCoreData.TemporaryRamBase) + (SecCoreData.TemporaryRamSize / 2));
+  SecCoreData.PeiTemporaryRamBase    = SecCoreData.TemporaryRamBase;
   SecCoreData.PeiTemporaryRamSize    = SecCoreData.TemporaryRamSize / 2;
   SecCoreData.StackBase              = (VOID *)((UINTN)(SecCoreData.TemporaryRamBase) + (SecCoreData.TemporaryRamSize/2));
   SecCoreData.StackSize              = SecCoreData.TemporaryRamSize / 2;
 
   // Jump to PEI core entry point
-  (PeiCoreEntryPoint)(&SecCoreData, (VOID *)&gSecPpiTable);
+  (PeiCoreEntryPoint)(&SecCoreData, PpiList);
 }

ArmPlatformPkg/PrePeiCore/MainUniCore.c

@@ -32,7 +32,18 @@ PrimaryMain (
   )
 {
   EFI_SEC_PEI_HAND_OFF        SecCoreData;
+  UINTN                       PpiListSize;
+  EFI_PEI_PPI_DESCRIPTOR      *PpiList;
+  UINTN                       TemporaryRamBase;
+  UINTN                       TemporaryRamSize;
 
+  CreatePpiList (&PpiListSize, &PpiList);
+
+  // Adjust the Temporary Ram as the new Ppi List (Common + Platform Ppi Lists) is created at
+  // the base of the primary core stack
+  PpiListSize = ALIGN_VALUE(PpiListSize, 0x4);
+  TemporaryRamBase = (UINTN)PcdGet32 (PcdCPUCoresStackBase) + PpiListSize;
+  TemporaryRamSize = (UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize) - PpiListSize;
 
   //
   // Bind this information into the SEC hand-off state
@@ -42,13 +53,13 @@ PrimaryMain (
   SecCoreData.DataSize               = sizeof(EFI_SEC_PEI_HAND_OFF);
   SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdFvBaseAddress);
   SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdFvSize);
-  SecCoreData.TemporaryRamBase       = (VOID *)(UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize); // We consider we run on the primary core (and so we use the first stack)
+  SecCoreData.TemporaryRamBase       = (VOID *)TemporaryRamBase; // We run on the primary core (and so we use the first stack)
-  SecCoreData.TemporaryRamSize       = (UINTN)(UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize);
+  SecCoreData.TemporaryRamSize       = TemporaryRamSize;
-  SecCoreData.PeiTemporaryRamBase    = (VOID *)((UINTN)(SecCoreData.TemporaryRamBase) + (SecCoreData.TemporaryRamSize / 2));
+  SecCoreData.PeiTemporaryRamBase    = SecCoreData.TemporaryRamBase;
   SecCoreData.PeiTemporaryRamSize    = SecCoreData.TemporaryRamSize / 2;
   SecCoreData.StackBase              = (VOID *)((UINTN)(SecCoreData.TemporaryRamBase) + (SecCoreData.TemporaryRamSize/2));
   SecCoreData.StackSize              = SecCoreData.TemporaryRamSize / 2;
 
-  // jump to pei core entry point
+  // Jump to PEI core entry point
-  (PeiCoreEntryPoint)(&SecCoreData, (VOID *)&gSecPpiTable);
+  (PeiCoreEntryPoint)(&SecCoreData, PpiList);
 }

ArmPlatformPkg/PrePeiCore/PrePeiCore.c

@@ -34,12 +34,40 @@ EFI_PEI_PPI_DESCRIPTOR      gCommonPpiTable[] = {
     &mTemporaryRamSupportPpi
   },
   {
-    EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
+    EFI_PEI_PPI_DESCRIPTOR_PPI,
     &gArmGlobalVariablePpiGuid,
     &mGlobalVariablePpi
   }
 };
 
+VOID
+CreatePpiList (
+  OUT UINTN                   *PpiListSize,
+  OUT EFI_PEI_PPI_DESCRIPTOR  **PpiList
+  )
+{
+  EFI_PEI_PPI_DESCRIPTOR *PlatformPpiList;
+  UINTN                   PlatformPpiListSize;
+  UINTN                   ListBase;
+  EFI_PEI_PPI_DESCRIPTOR *LastPpi;
+
+  // Get the Platform PPIs
+  PlatformPpiListSize = 0;
+  ArmPlatformGetPlatformPpiList (&PlatformPpiListSize, &PlatformPpiList);
+
+  // Copy the Common and Platform PPis in Temporrary Memory
+  ListBase = PcdGet32 (PcdCPUCoresStackBase);
+  CopyMem ((VOID*)ListBase, gCommonPpiTable, sizeof(gCommonPpiTable));
+  CopyMem ((VOID*)(ListBase + sizeof(gCommonPpiTable)), PlatformPpiList, PlatformPpiListSize);
+
+  // Set the Terminate flag on the last PPI entry
+  LastPpi = (EFI_PEI_PPI_DESCRIPTOR*)ListBase + ((sizeof(gCommonPpiTable) + PlatformPpiListSize) / sizeof(EFI_PEI_PPI_DESCRIPTOR)) - 1;
+  LastPpi->Flags |= EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST;
+
+  *PpiList     = (EFI_PEI_PPI_DESCRIPTOR*)ListBase;
+  *PpiListSize = sizeof(gCommonPpiTable) + PlatformPpiListSize;
+}
+
 VOID
 CEntryPoint (
   IN  UINTN                     MpId,

ArmPlatformPkg/PrePeiCore/PrePeiCore.h

@@ -25,10 +25,15 @@
 #include <PiPei.h>
 #include <Ppi/TemporaryRamSupport.h>
 
+VOID
+CreatePpiList (
+  OUT UINTN                   *PpiListSize,
+  OUT EFI_PEI_PPI_DESCRIPTOR  **PpiList
+  );
 
 EFI_STATUS
 EFIAPI
-SecTemporaryRamSupport (
+PrePeiCoreTemporaryRamSupport (
   IN CONST EFI_PEI_SERVICES   **PeiServices,
   IN EFI_PHYSICAL_ADDRESS     TemporaryMemoryBase,
   IN EFI_PHYSICAL_ADDRESS     PermanentMemoryBase,