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MdePkg/Register: Fix various typos 

Fix various typos in comments and documentation.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Antoine Coeur <coeur@gmx.fr>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Signed-off-by: Philippe Mathieu-Daude <philmd@redhat.com>
Message-Id: <20200207010831.9046-29-philmd@redhat.com>
This commit is contained in:
Antoine Coeur 2020-02-07 02:07:41 +01:00 committed by mergify[bot]
parent 43516263a8
commit 788421d5a7
6 changed files with 9 additions and 9 deletions
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8
MdePkg/Include/Register/Amd/Cpuid.h
View File

@ -11,7 +11,7 @@
SPDX-License-Identifier: BSD-2-Clause-Patent
@par Specification Reference:
AMD64 Architecture Programming Manaul volume 2, March 2017, Sections 15.34
AMD64 Architecture Programming Manual volume 2, March 2017, Sections 15.34
**/
@ -364,7 +364,7 @@ typedef union {
///
UINT32 Page1GB:1;
///
/// [Bit 27] RDTSCP intructions.
/// [Bit 27] RDTSCP instructions.
///
UINT32 RDTSCP:1;
///
@ -513,9 +513,9 @@ typedef union {
@retval EAX Extended APIC ID described by the type
CPUID_AMD_PROCESSOR_TOPOLOGY_EAX.
@retval EBX Core Indentifiers described by the type
@retval EBX Core Identifiers described by the type
CPUID_AMD_PROCESSOR_TOPOLOGY_EBX.
@retval ECX Node Indentifiers described by the type
@retval ECX Node Identifiers described by the type
CPUID_AMD_PROCESSOR_TOPOLOGY_ECX.
@retval EDX Reserved.
**/

2
MdePkg/Include/Register/Amd/Fam17Msr.h
View File

@ -10,7 +10,7 @@
SPDX-License-Identifier: BSD-2-Clause-Patent
@par Specification Reference:
AMD64 Architecture Programming Manaul volume 2, March 2017, Sections 15.34
AMD64 Architecture Programming Manual volume 2, March 2017, Sections 15.34
**/

2
MdePkg/Include/Register/Amd/Msr.h
View File

@ -10,7 +10,7 @@
SPDX-License-Identifier: BSD-2-Clause-Patent
@par Specification Reference:
AMD64 Architecture Programming Manaul volume 2, March 2017, Sections 15.34
AMD64 Architecture Programming Manual volume 2, March 2017, Sections 15.34
**/

2
MdePkg/Include/Register/Intel/Msr/GoldmontPlusMsr.h
View File

@ -1,5 +1,5 @@
/** @file
MSR Defintions for Intel Atom processors based on the Goldmont Plus microarchitecture.
MSR Definitions for Intel Atom processors based on the Goldmont Plus microarchitecture.
Provides defines for Machine Specific Registers(MSR) indexes. Data structures
are provided for MSRs that contain one or more bit fields. If the MSR value

2
MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h
View File

@ -1,5 +1,5 @@
/** @file
MSR Defintions for Intel processors based on the Skylake/Kabylake/Coffeelake/Cannonlake microarchitecture.
MSR Definitions for Intel processors based on the Skylake/Kabylake/Coffeelake/Cannonlake microarchitecture.
Provides defines for Machine Specific Registers(MSR) indexes. Data structures
are provided for MSRs that contain one or more bit fields. If the MSR value

2
MdePkg/Include/Register/Intel/StmResourceDescriptor.h
View File

@ -179,7 +179,7 @@ typedef struct {
} STM_RSC_ALL_RESOURCES_DESC;
/**
STM Register Volation Descriptor
STM Register Violation Descriptor
**/
typedef struct {
STM_RSC_DESC_HEADER Hdr;