From 7905d234bc05424f9cf5d1643bf6f08bf3264125 Mon Sep 17 00:00:00 2001 From: Jordan Justen Date: Mon, 30 May 2016 18:51:55 -0700 Subject: [PATCH] MdePkg BaseLib: Convert Ia32/RRotU64.asm to NASM The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/RRotU64.asm to Ia32/RRotU64.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen --- MdePkg/Library/BaseLib/BaseLib.inf | 2 + MdePkg/Library/BaseLib/Ia32/RRotU64.nasm | 50 ++++++++++++++++++++++++ 2 files changed, 52 insertions(+) create mode 100644 MdePkg/Library/BaseLib/Ia32/RRotU64.nasm diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf index 7f13d837e8..431ec7fc6e 100644 --- a/MdePkg/Library/BaseLib/BaseLib.inf +++ b/MdePkg/Library/BaseLib/BaseLib.inf @@ -219,6 +219,7 @@ Ia32/SwapBytes64.asm | INTEL Ia32/SetJump.nasm| INTEL Ia32/SetJump.asm | INTEL + Ia32/RRotU64.nasm| INTEL Ia32/RRotU64.asm | INTEL Ia32/RShiftU64.asm | INTEL Ia32/ReadPmc.asm | INTEL @@ -314,6 +315,7 @@ Ia32/DivU64x32.S | GCC Ia32/MultU64x64.S | GCC Ia32/MultU64x32.S | GCC + Ia32/RRotU64.nasm| GCC Ia32/RRotU64.S | GCC Ia32/LRotU64.S | GCC Ia32/ARShiftU64.S | GCC diff --git a/MdePkg/Library/BaseLib/Ia32/RRotU64.nasm b/MdePkg/Library/BaseLib/Ia32/RRotU64.nasm new file mode 100644 index 0000000000..81102022cf --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/RRotU64.nasm @@ -0,0 +1,50 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; RRotU64.nasm +; +; Abstract: +; +; 64-bit right rotation for Ia32 +; +;------------------------------------------------------------------------------ + + SECTION .text + +;------------------------------------------------------------------------------ +; UINT64 +; EFIAPI +; InternalMathRRotU64 ( +; IN UINT64 Operand, +; IN UINTN Count +; ); +;------------------------------------------------------------------------------ +global ASM_PFX(InternalMathRRotU64) +ASM_PFX(InternalMathRRotU64): + push ebx + mov cl, [esp + 16] + mov eax, [esp + 8] + mov edx, [esp + 12] + shrd ebx, eax, cl + shrd eax, edx, cl + rol ebx, cl + shrd edx, ebx, cl + test cl, 32 ; Count >= 32? + jz .0 + mov ecx, eax ; switch eax & edx if Count >= 32 + mov eax, edx + mov edx, ecx +.0: + pop ebx + ret +