ArmPlatformPkg: CodeQL Fixes.

Makes changes to comply with alerts raised by CodeQL.

The issues here fall into the following category:

1. comparison-with-wider-type

Signed-off-by: Eeshan Londhe <eeshanlondhe@microsoft.com>
This commit is contained in:
kuqin12 2024-08-01 12:20:01 -07:00 committed by mergify[bot]
parent 7327089f63
commit 79ad703b55
5 changed files with 27 additions and 27 deletions

View File

@ -140,10 +140,10 @@ VideoCopyHorizontalOverlap (
UINT16 *SourcePixel16bit; UINT16 *SourcePixel16bit;
UINT16 *DestinationPixel16bit; UINT16 *DestinationPixel16bit;
UINT32 SourcePixelY; UINTN SourcePixelY;
UINT32 DestinationPixelY; UINTN DestinationPixelY;
UINTN SizeIn32Bits; UINTN SizeIn32Bits;
UINTN SizeIn16Bits; UINTN SizeIn16Bits;
Status = EFI_SUCCESS; Status = EFI_SUCCESS;
@ -271,8 +271,8 @@ BltVideoFill (
VOID *DestinationAddr; VOID *DestinationAddr;
UINT16 *DestinationPixel16bit; UINT16 *DestinationPixel16bit;
UINT16 Pixel16bit; UINT16 Pixel16bit;
UINT32 DestinationPixelX; UINTN DestinationPixelX;
UINT32 DestinationLine; UINTN DestinationLine;
UINTN WidthInBytes; UINTN WidthInBytes;
Status = EFI_SUCCESS; Status = EFI_SUCCESS;
@ -420,11 +420,11 @@ BltVideoToBltBuffer (
VOID *DestinationAddr; VOID *DestinationAddr;
UINT16 *SourcePixel16bit; UINT16 *SourcePixel16bit;
UINT16 Pixel16bit; UINT16 Pixel16bit;
UINT32 SourcePixelX; UINTN SourcePixelX;
UINT32 SourceLine; UINTN SourceLine;
UINT32 DestinationPixelX; UINTN DestinationPixelX;
UINT32 DestinationLine; UINTN DestinationLine;
UINT32 BltBufferHorizontalResolution; UINTN BltBufferHorizontalResolution;
UINTN WidthInBytes; UINTN WidthInBytes;
Status = EFI_SUCCESS; Status = EFI_SUCCESS;
@ -583,11 +583,11 @@ BltBufferToVideo (
VOID *SourceAddr; VOID *SourceAddr;
VOID *DestinationAddr; VOID *DestinationAddr;
UINT16 *DestinationPixel16bit; UINT16 *DestinationPixel16bit;
UINT32 SourcePixelX; UINTN SourcePixelX;
UINT32 SourceLine; UINTN SourceLine;
UINT32 DestinationPixelX; UINTN DestinationPixelX;
UINT32 DestinationLine; UINTN DestinationLine;
UINT32 BltBufferHorizontalResolution; UINTN BltBufferHorizontalResolution;
UINTN WidthInBytes; UINTN WidthInBytes;
Status = EFI_SUCCESS; Status = EFI_SUCCESS;

View File

@ -34,7 +34,7 @@ PL061Locate (
OUT UINTN *RegisterBase OUT UINTN *RegisterBase
) )
{ {
UINT32 Index; UINTN Index;
for (Index = 0; Index < mPL061PlatformGpio->GpioControllerCount; Index++) { for (Index = 0; Index < mPL061PlatformGpio->GpioControllerCount; Index++) {
if ( (Gpio >= mPL061PlatformGpio->GpioController[Index].GpioIndex) if ( (Gpio >= mPL061PlatformGpio->GpioController[Index].GpioIndex)
@ -74,18 +74,18 @@ UINTN
EFIAPI EFIAPI
PL061EffectiveAddress ( PL061EffectiveAddress (
IN UINTN Address, IN UINTN Address,
IN UINTN Mask IN UINT8 Mask
) )
{ {
return ((Address + PL061_GPIO_DATA_REG_OFFSET) + (Mask << 2)); return ((Address + PL061_GPIO_DATA_REG_OFFSET) + (UINTN)(Mask << 2));
} }
STATIC STATIC
UINTN UINT8
EFIAPI EFIAPI
PL061GetPins ( PL061GetPins (
IN UINTN Address, IN UINTN Address,
IN UINTN Mask IN UINT8 Mask
) )
{ {
return MmioRead8 (PL061EffectiveAddress (Address, Mask)); return MmioRead8 (PL061EffectiveAddress (Address, Mask));
@ -96,8 +96,8 @@ VOID
EFIAPI EFIAPI
PL061SetPins ( PL061SetPins (
IN UINTN Address, IN UINTN Address,
IN UINTN Mask, IN UINT8 Mask,
IN UINTN Value IN UINT8 Value
) )
{ {
MmioWrite8 (PL061EffectiveAddress (Address, Mask), Value); MmioWrite8 (PL061EffectiveAddress (Address, Mask), Value);

View File

@ -37,6 +37,6 @@
#define PL061_GPIO_PINS 8 #define PL061_GPIO_PINS 8
// All bits low except one bit high, native bit length // All bits low except one bit high, native bit length
#define GPIO_PIN_MASK(Pin) (1UL << ((UINTN)(Pin))) #define GPIO_PIN_MASK(Pin) (UINT8)(1 << (Pin & (PL061_GPIO_PINS - 1)))
#endif // __PL061_GPIO_H__ #endif // __PL061_GPIO_H__

View File

@ -24,7 +24,7 @@
STATIC EFI_EVENT mEfiExitBootServicesEvent; STATIC EFI_EVENT mEfiExitBootServicesEvent;
STATIC EFI_HARDWARE_INTERRUPT_PROTOCOL *mInterrupt; STATIC EFI_HARDWARE_INTERRUPT_PROTOCOL *mInterrupt;
STATIC EFI_WATCHDOG_TIMER_NOTIFY mWatchdogNotify; STATIC EFI_WATCHDOG_TIMER_NOTIFY mWatchdogNotify;
STATIC UINT32 mTimerPeriod; STATIC UINT64 mTimerPeriod;
/** /**
Make sure the SP805 registers are unlocked for writing. Make sure the SP805 registers are unlocked for writing.
@ -101,7 +101,7 @@ SP805Stop (
{ {
// Disable interrupts // Disable interrupts
if ((MmioRead32 (SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) != 0) { if ((MmioRead32 (SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) != 0) {
MmioAnd32 (SP805_WDOG_CONTROL_REG, ~SP805_WDOG_CTRL_INTEN); MmioAnd32 (SP805_WDOG_CONTROL_REG, (UINT32) ~SP805_WDOG_CTRL_INTEN);
} }
} }

View File

@ -108,7 +108,7 @@
#define PL111_CTRL_LCD_16BPP_565 (6 << 1) #define PL111_CTRL_LCD_16BPP_565 (6 << 1)
#define PL111_CTRL_LCD_12BPP_444 (7 << 1) #define PL111_CTRL_LCD_12BPP_444 (7 << 1)
#define PL111_CTRL_LCD_BPP(Bpp) ((Bpp) << 1) #define PL111_CTRL_LCD_BPP(Bpp) ((Bpp) << 1)
#define PL111_CTRL_LCD_EN 1 #define PL111_CTRL_LCD_EN 1U
/**********************************************************************/ /**********************************************************************/