DynamicTablesPkg: Move Processor hierarchy info to Arch Common

Move the Processor hierarchy info object from Arm Namespace to
the Arch Common namespace.

Correspondingly also update the following modules to reflect the
changes introduced by the move:
 - PPTT generator
 - SSDT CPU topology generator
 - ConfigurationManagerObjectParser
 - Dynamic Plat Repo TokenFixer map.

Cc: Pierre Gondois <Pierre.Gondois@arm.com>
Cc: Yeo Reum Yun <YeoReum.Yun@arm.com>
Cc: AbdulLateef Attar <AbdulLateef.Attar@amd.com>
Cc: Jeshua Smith <jeshuas@nvidia.com>
Cc: Jeff Brasen <jbrasen@nvidia.com>
Cc: Girish Mahadevan <gmahadevan@nvidia.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
This commit is contained in:
Sami Mujawar 2024-03-11 13:36:32 +00:00 committed by mergify[bot]
parent d7a47297cd
commit 79dd25848e
8 changed files with 137 additions and 138 deletions

View File

@ -36,6 +36,7 @@ typedef enum ArchCommonObjectID {
EArchCommonObjDeviceHandlePci, ///< 13 - Device Handle Pci
EArchCommonObjGenericInitiatorAffinityInfo, ///< 14 - Generic Initiator Affinity
EArchCommonObjLpiInfo, ///< 15 - Lpi Info
EArchCommonObjProcHierarchyInfo, ///< 16 - Processor Hierarchy Info
EArchCommonObjMax
} EARCH_COMMON_OBJECT_ID;
@ -359,6 +360,47 @@ typedef struct CmArchCommonLpiInfo {
CHAR8 StateName[16];
} CM_ARCH_COMMON_LPI_INFO;
/** A structure that describes the Processor Hierarchy Node (Type 0) in PPTT
ID: EArchCommonObjProcHierarchyInfo
*/
typedef struct CmArchCommonProcHierarchyInfo {
/// A unique token used to identify this object
CM_OBJECT_TOKEN Token;
/// Processor structure flags (ACPI 6.3 - January 2019, PPTT, Table 5-155)
UINT32 Flags;
/// Token for the parent CM_ARCH_COMMON_PROC_HIERARCHY_INFO object in the processor
/// topology. A value of CM_NULL_TOKEN means this node has no parent.
CM_OBJECT_TOKEN ParentToken;
/// Token of the associated object which has the corresponding ACPI Processor
/// ID, e.g. for Arm systems this is a reference to CM_ARM_GICC_INFO object.
/// A value of CM_NULL_TOKEN means this node represents a group of associated
/// processors and it does not have an associated CPU interface.
CM_OBJECT_TOKEN AcpiIdObjectToken;
/// Number of resources private to this Node
UINT32 NoOfPrivateResources;
/// Token of the array which contains references to the resources private to
/// this CM_ARCH_COMMON_PROC_HIERARCHY_INFO instance. This field is ignored if
/// the NoOfPrivateResources is 0, in which case it is recommended to set
/// this field to CM_NULL_TOKEN.
CM_OBJECT_TOKEN PrivateResourcesArrayToken;
/// Optional field: Reference Token for the Lpi state of this processor.
/// Token identifying a CM_ARCH_COMMON_OBJ_REF structure, itself referencing
/// CM_ARCH_COMMON_LPI_INFO objects.
CM_OBJECT_TOKEN LpiToken;
/// Set to TRUE if UID should override index for name and _UID
/// for processor container nodes and name of processors.
/// This should be consistently set for containers or processors to avoid
/// duplicate values
BOOLEAN OverrideNameUidEnabled;
/// If OverrideNameUidEnabled is TRUE then this value will be used for name of
/// processors and processor containers.
UINT16 OverrideName;
/// If OverrideNameUidEnabled is TRUE then this value will be used for
/// the UID of processor containers.
UINT32 OverrideUid;
} CM_ARCH_COMMON_PROC_HIERARCHY_INFO;
#pragma pack()
#endif // ARCH_COMMON_NAMESPACE_OBJECTS_H_

View File

@ -48,20 +48,19 @@ typedef enum ArmObjectID {
EArmObjGicItsIdentifierArray, ///< 17 - GIC ITS Identifier Array
EArmObjIdMappingArray, ///< 18 - ID Mapping Array
EArmObjSmmuInterruptArray, ///< 19 - SMMU Interrupt Array
EArmObjProcHierarchyInfo, ///< 20 - Processor Hierarchy Info
EArmObjCacheInfo, ///< 21 - Cache Info
EArmObjCmn600Info, ///< 22 - CMN-600 Info
EArmObjRmr, ///< 23 - Reserved Memory Range Node
EArmObjMemoryRangeDescriptor, ///< 24 - Memory Range Descriptor
EArmObjCpcInfo, ///< 25 - Continuous Performance Control Info
EArmObjPccSubspaceType0Info, ///< 26 - Pcc Subspace Type 0 Info
EArmObjPccSubspaceType1Info, ///< 27 - Pcc Subspace Type 2 Info
EArmObjPccSubspaceType2Info, ///< 28 - Pcc Subspace Type 2 Info
EArmObjPccSubspaceType3Info, ///< 29 - Pcc Subspace Type 3 Info
EArmObjPccSubspaceType4Info, ///< 30 - Pcc Subspace Type 4 Info
EArmObjPccSubspaceType5Info, ///< 31 - Pcc Subspace Type 5 Info
EArmObjEtInfo, ///< 32 - Embedded Trace Extension/Module Info
EArmObjPsdInfo, ///< 33 - P-State Dependency (PSD) Info
EArmObjCacheInfo, ///< 20 - Cache Info
EArmObjCmn600Info, ///< 21 - CMN-600 Info
EArmObjRmr, ///< 22 - Reserved Memory Range Node
EArmObjMemoryRangeDescriptor, ///< 23 - Memory Range Descriptor
EArmObjCpcInfo, ///< 24 - Continuous Performance Control Info
EArmObjPccSubspaceType0Info, ///< 25 - Pcc Subspace Type 0 Info
EArmObjPccSubspaceType1Info, ///< 26 - Pcc Subspace Type 2 Info
EArmObjPccSubspaceType2Info, ///< 27 - Pcc Subspace Type 2 Info
EArmObjPccSubspaceType3Info, ///< 28 - Pcc Subspace Type 3 Info
EArmObjPccSubspaceType4Info, ///< 29 - Pcc Subspace Type 4 Info
EArmObjPccSubspaceType5Info, ///< 30 - Pcc Subspace Type 5 Info
EArmObjEtInfo, ///< 31 - Embedded Trace Extension/Module Info
EArmObjPsdInfo, ///< 32 - P-State Dependency (PSD) Info
EArmObjMax
} EARM_OBJECT_ID;
@ -645,47 +644,6 @@ typedef CM_ARCH_COMMON_GENERIC_INTERRUPT CM_ARM_SMMU_INTERRUPT;
*/
typedef CM_ARCH_COMMON_GENERIC_INTERRUPT CM_ARM_EXTENDED_INTERRUPT;
/** A structure that describes the Processor Hierarchy Node (Type 0) in PPTT
ID: EArmObjProcHierarchyInfo
*/
typedef struct CmArmProcHierarchyInfo {
/// A unique token used to identify this object
CM_OBJECT_TOKEN Token;
/// Processor structure flags (ACPI 6.3 - January 2019, PPTT, Table 5-155)
UINT32 Flags;
/// Token for the parent CM_ARM_PROC_HIERARCHY_INFO object in the processor
/// topology. A value of CM_NULL_TOKEN means this node has no parent.
CM_OBJECT_TOKEN ParentToken;
/// Token of the associated object which has the corresponding ACPI Processor
/// ID, e.g. for Arm systems this is a reference to CM_ARM_GICC_INFO object.
/// A value of CM_NULL_TOKEN means this node represents a group of associated
/// processors and it does not have an associated CPU interface.
CM_OBJECT_TOKEN AcpiIdObjectToken;
/// Number of resources private to this Node
UINT32 NoOfPrivateResources;
/// Token of the array which contains references to the resources private to
/// this CM_ARM_PROC_HIERARCHY_INFO instance. This field is ignored if
/// the NoOfPrivateResources is 0, in which case it is recommended to set
/// this field to CM_NULL_TOKEN.
CM_OBJECT_TOKEN PrivateResourcesArrayToken;
/// Optional field: Reference Token for the Lpi state of this processor.
/// Token identifying a CM_ARCH_COMMON_OBJ_REF structure, itself referencing
/// CM_ARCH_COMMON_LPI_INFO objects.
CM_OBJECT_TOKEN LpiToken;
/// Set to TRUE if UID should override index for name and _UID
/// for processor container nodes and name of processors.
/// This should be consistently set for containers or processors to avoid
/// duplicate values
BOOLEAN OverrideNameUidEnabled;
/// If OverrideNameUidEnabled is TRUE then this value will be used for name of
/// processors and processor containers.
UINT16 OverrideName;
/// If OverrideNameUidEnabled is TRUE then this value will be used for
/// the UID of processor containers.
UINT32 OverrideUid;
} CM_ARM_PROC_HIERARCHY_INFO;
/** A structure that describes the Cache Type Structure (Type 1) in PPTT
ID: EArmObjCacheInfo
@ -694,9 +652,9 @@ typedef struct CmArmCacheInfo {
/// A unique token used to identify this object
CM_OBJECT_TOKEN Token;
/// Reference token for the next level of cache that is private to the same
/// CM_ARM_PROC_HIERARCHY_INFO instance. A value of CM_NULL_TOKEN means this
/// entry represents the last cache level appropriate to the processor
/// hierarchy node structures using this entry.
/// CM_ARCH_COMMON_PROC_HIERARCHY_INFO instance. A value of CM_NULL_TOKEN
/// means this entry represents the last cache level appropriate to the
/// processor hierarchy node structures using this entry.
CM_OBJECT_TOKEN NextLevelOfCacheToken;
/// Size of the cache in bytes
UINT32 Size;

View File

@ -32,7 +32,7 @@
Requirements:
The following Configuration Manager Object(s) are used by this Generator:
- EArmObjProcHierarchyInfo (REQUIRED)
- EArchCommonObjProcHierarchyInfo (REQUIRED)
- EArmObjCacheInfo
- EArchCommonObjCmRef
- EArmObjGicCInfo (REQUIRED)
@ -43,9 +43,9 @@
information from the Configuration Manager.
*/
GET_OBJECT_LIST (
EObjNameSpaceArm,
EArmObjProcHierarchyInfo,
CM_ARM_PROC_HIERARCHY_INFO
EObjNameSpaceArchCommon,
EArchCommonObjProcHierarchyInfo,
CM_ARCH_COMMON_PROC_HIERARCHY_INFO
);
/**
@ -90,7 +90,7 @@ GET_OBJECT_LIST (
STATIC
UINT32
GetProcHierarchyNodeSize (
IN CONST CM_ARM_PROC_HIERARCHY_INFO *Node
IN CONST CM_ARCH_COMMON_PROC_HIERARCHY_INFO *Node
)
{
ASSERT (Node != NULL);
@ -107,7 +107,7 @@ GetProcHierarchyNodeSize (
GET_SIZE_OF_PPTT_STRUCTS (
ProcHierarchyNodes,
GetProcHierarchyNodeSize (NodesToIndex),
CM_ARM_PROC_HIERARCHY_INFO
CM_ARCH_COMMON_PROC_HIERARCHY_INFO
);
/**
@ -411,10 +411,10 @@ IsAcpiIdObjectTokenEqual (
IN UINTN Index2
)
{
PPTT_NODE_INDEXER *IndexedObject1;
PPTT_NODE_INDEXER *IndexedObject2;
CM_ARM_PROC_HIERARCHY_INFO *ProcNode1;
CM_ARM_PROC_HIERARCHY_INFO *ProcNode2;
PPTT_NODE_INDEXER *IndexedObject1;
PPTT_NODE_INDEXER *IndexedObject2;
CM_ARCH_COMMON_PROC_HIERARCHY_INFO *ProcNode1;
CM_ARCH_COMMON_PROC_HIERARCHY_INFO *ProcNode2;
ASSERT (
(Object1 != NULL) &&
@ -423,8 +423,8 @@ IsAcpiIdObjectTokenEqual (
IndexedObject1 = (PPTT_NODE_INDEXER *)Object1;
IndexedObject2 = (PPTT_NODE_INDEXER *)Object2;
ProcNode1 = (CM_ARM_PROC_HIERARCHY_INFO *)IndexedObject1->Object;
ProcNode2 = (CM_ARM_PROC_HIERARCHY_INFO *)IndexedObject2->Object;
ProcNode1 = (CM_ARCH_COMMON_PROC_HIERARCHY_INFO *)IndexedObject1->Object;
ProcNode2 = (CM_ARCH_COMMON_PROC_HIERARCHY_INFO *)IndexedObject2->Object;
if (IS_ACPI_PROC_ID_VALID (ProcNode1) &&
IS_ACPI_PROC_ID_VALID (ProcNode2) &&
@ -482,8 +482,8 @@ AddProcHierarchyNodes (
UINT32 GicCInfoCount;
UINT32 UniqueGicCRefCount;
PPTT_NODE_INDEXER *PpttNodeFound;
CM_ARM_PROC_HIERARCHY_INFO *ProcInfoNode;
PPTT_NODE_INDEXER *PpttNodeFound;
CM_ARCH_COMMON_PROC_HIERARCHY_INFO *ProcInfoNode;
PPTT_NODE_INDEXER *ProcNodeIterator;
UINT32 NodeCount;
@ -517,7 +517,7 @@ AddProcHierarchyNodes (
UniqueGicCRefCount = 0;
while (NodeCount-- != 0) {
ProcInfoNode = (CM_ARM_PROC_HIERARCHY_INFO *)ProcNodeIterator->Object;
ProcInfoNode = (CM_ARCH_COMMON_PROC_HIERARCHY_INFO *)ProcNodeIterator->Object;
// Check if the private resource count is within the size limit
// imposed on the Processor Hierarchy node by the specification.
@ -577,7 +577,7 @@ AddProcHierarchyNodes (
// Test if the reference is to a 'leaf' node
if (IS_PROC_NODE_LEAF (
((CM_ARM_PROC_HIERARCHY_INFO *)PpttNodeFound->Object)
((CM_ARCH_COMMON_PROC_HIERARCHY_INFO *)PpttNodeFound->Object)
))
{
Status = EFI_INVALID_PARAMETER;
@ -1074,8 +1074,8 @@ BuildPpttTable (
UINT32 ProcHierarchyNodeOffset;
UINT32 CacheStructOffset;
CM_ARM_PROC_HIERARCHY_INFO *ProcHierarchyNodeList;
CM_ARM_CACHE_INFO *CacheStructList;
CM_ARCH_COMMON_PROC_HIERARCHY_INFO *ProcHierarchyNodeList;
CM_ARM_CACHE_INFO *CacheStructList;
ACPI_PPTT_GENERATOR *Generator;
@ -1112,7 +1112,7 @@ BuildPpttTable (
// Get the processor hierarchy info and update the processor topology
// structure count with Processor Hierarchy Nodes (Type 0)
Status = GetEArmObjProcHierarchyInfo (
Status = GetEArchCommonObjProcHierarchyInfo (
CfgMgrProtocol,
CM_NULL_TOKEN,
&ProcHierarchyNodeList,

View File

@ -38,7 +38,7 @@ Requirements:
The following Configuration Manager Object(s) are required by
this Generator:
- EArmObjGicCInfo
- EArmObjProcHierarchyInfo (OPTIONAL) along with
- EArchCommonObjProcHierarchyInfo (OPTIONAL) along with
- EArchCommonObjCmRef (OPTIONAL)
- EArchCommonObjLpiInfo (OPTIONAL)
- GetEArmObjEtInfo (OPTIONAL)
@ -59,9 +59,9 @@ GET_OBJECT_LIST (
information from the Configuration Manager.
*/
GET_OBJECT_LIST (
EObjNameSpaceArm,
EArmObjProcHierarchyInfo,
CM_ARM_PROC_HIERARCHY_INFO
EObjNameSpaceArchCommon,
EArchCommonObjProcHierarchyInfo,
CM_ARCH_COMMON_PROC_HIERARCHY_INFO
);
/**
@ -116,12 +116,12 @@ GET_OBJECT_LIST (
/** Initialize the TokenTable.
One entry should be allocated for each CM_ARM_PROC_HIERARCHY_INFO
One entry should be allocated for each CM_ARCH_COMMON_PROC_HIERARCHY_INFO
structure of the platform. The TokenTable allows to have a mapping:
Index <-> CM_OBJECT_TOKEN (to CM_ARCH_COMMON_LPI_INFO structures).
There will always be less sets of Lpi states (CM_ARCH_COMMON_OBJ_REF)
than the number of cpus/clusters (CM_ARM_PROC_HIERARCHY_INFO).
than the number of cpus/clusters (CM_ARCH_COMMON_PROC_HIERARCHY_INFO).
@param [in] Generator The SSDT Cpu Topology generator.
@param [in] Count Number of entries to allocate in the TokenTable.
@ -585,8 +585,8 @@ CreateAmlEtNode (
}
@param [in] Generator The SSDT Cpu Topology generator.
@param [in] ProcHierarchyNodeInfo CM_ARM_PROC_HIERARCHY_INFO describing
the Cpu.
@param [in] ProcHierarchyNodeInfo CM_ARCH_COMMON_PROC_HIERARCHY_INFO
describing the Cpu.
@param [in] Node Node to which the _LPI method is
attached. Can represent a Cpu or a
Cluster.
@ -599,9 +599,9 @@ STATIC
EFI_STATUS
EFIAPI
CreateAmlLpiMethod (
IN ACPI_CPU_TOPOLOGY_GENERATOR *Generator,
IN CM_ARM_PROC_HIERARCHY_INFO *ProcHierarchyNodeInfo,
IN AML_OBJECT_NODE_HANDLE *Node
IN ACPI_CPU_TOPOLOGY_GENERATOR *Generator,
IN CM_ARCH_COMMON_PROC_HIERARCHY_INFO *ProcHierarchyNodeInfo,
IN AML_OBJECT_NODE_HANDLE *Node
)
{
EFI_STATUS Status;
@ -860,7 +860,7 @@ CreateAmlCpu (
return Status;
}
/** Create a Cpu in the AML namespace from a CM_ARM_PROC_HIERARCHY_INFO
/** Create a Cpu in the AML namespace from a CM_ARCH_COMMON_PROC_HIERARCHY_INFO
CM object.
@param [in] Generator The SSDT Cpu Topology generator.
@ -868,8 +868,8 @@ CreateAmlCpu (
Protocol Interface.
@param [in] ParentNode Parent node to attach the Cpu node to.
@param [in] CpuName Value used to generate the node name.
@param [in] ProcHierarchyNodeInfo CM_ARM_PROC_HIERARCHY_INFO describing
the Cpu.
@param [in] ProcHierarchyNodeInfo CM_ARCH_COMMON_PROC_HIERARCHY_INFO
describing the Cpu.
@retval EFI_SUCCESS Success.
@retval EFI_INVALID_PARAMETER Invalid parameter.
@ -883,7 +883,7 @@ CreateAmlCpuFromProcHierarchy (
IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST CfgMgrProtocol,
IN AML_NODE_HANDLE ParentNode,
IN UINT32 CpuName,
IN CM_ARM_PROC_HIERARCHY_INFO *ProcHierarchyNodeInfo
IN CM_ARCH_COMMON_PROC_HIERARCHY_INFO *ProcHierarchyNodeInfo
)
{
EFI_STATUS Status;
@ -914,7 +914,7 @@ CreateAmlCpuFromProcHierarchy (
}
// If a set of Lpi states is associated with the
// CM_ARM_PROC_HIERARCHY_INFO, create an _LPI method returning them.
// CM_ARCH_COMMON_PROC_HIERARCHY_INFO, create an _LPI method returning them.
if (ProcHierarchyNodeInfo->LpiToken != CM_NULL_TOKEN) {
Status = CreateAmlLpiMethod (Generator, ProcHierarchyNodeInfo, CpuNode);
if (EFI_ERROR (Status)) {
@ -961,7 +961,7 @@ CreateAmlCpuFromProcHierarchy (
/** Create a Processor Container in the AML namespace.
Any CM_ARM_PROC_HIERARCHY_INFO object with the following flags is
Any CM_ARCH_COMMON_PROC_HIERARCHY_INFO object with the following flags is
assumed to be a processor container:
- EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL
- EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID
@ -979,8 +979,8 @@ CreateAmlCpuFromProcHierarchy (
Protocol Interface.
@param [in] ParentNode Parent node to attach the processor
container node to.
@param [in] ProcHierarchyNodeInfo CM_ARM_PROC_HIERARCHY_INFO object used
to create the node.
@param [in] ProcHierarchyNodeInfo CM_ARCH_COMMON_PROC_HIERARCHY_INFO object
used to create the node.
@param [in] ProcContainerName Name of the processor container.
@param [in] ProcContainerUid Uid of the processor container.
@param [out] ProcContainerNodePtr If success, contains the created processor
@ -997,7 +997,7 @@ CreateAmlProcessorContainer (
IN ACPI_CPU_TOPOLOGY_GENERATOR *Generator,
IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST CfgMgrProtocol,
IN AML_NODE_HANDLE ParentNode,
IN CM_ARM_PROC_HIERARCHY_INFO *ProcHierarchyNodeInfo,
IN CM_ARCH_COMMON_PROC_HIERARCHY_INFO *ProcHierarchyNodeInfo,
IN UINT16 ProcContainerName,
IN UINT32 ProcContainerUid,
OUT AML_OBJECT_NODE_HANDLE *ProcContainerNodePtr
@ -1050,7 +1050,7 @@ CreateAmlProcessorContainer (
}
// If a set of Lpi states are associated with the
// CM_ARM_PROC_HIERARCHY_INFO, create an _LPI method returning them.
// CM_ARCH_COMMON_PROC_HIERARCHY_INFO, create an _LPI method returning them.
if (ProcHierarchyNodeInfo->LpiToken != CM_NULL_TOKEN) {
Status = CreateAmlLpiMethod (
Generator,
@ -1128,8 +1128,7 @@ CheckProcNode (
@param [in] Generator The SSDT Cpu Topology generator.
@param [in] CfgMgrProtocol Pointer to the Configuration Manager
Protocol Interface.
@param [in] NodeToken Token of the CM_ARM_PROC_HIERARCHY_INFO
currently handled.
@param [in] NodeToken Token of the CM_ARCH_COMMON_PROC_HIERARCHY_INFO currently handled.
@param [in] ParentNode Parent node to attach the created
node to.
@param [in,out] ProcContainerIndex Pointer to the current processor container
@ -1172,7 +1171,7 @@ CreateAmlCpuTopologyTree (
ProcContainerName = 0;
for (Index = 0; Index < Generator->ProcNodeCount; Index++) {
// Find the children of the CM_ARM_PROC_HIERARCHY_INFO
// Find the children of the CM_ARCH_COMMON_PROC_HIERARCHY_INFO
// currently being handled (i.e. ParentToken == NodeToken).
if (Generator->ProcNodeList[Index].ParentToken == NodeToken) {
// Only Cpus (leaf nodes in this tree) have a AcpiIdObjectToken.
@ -1281,8 +1280,8 @@ CreateAmlCpuTopologyTree (
return EFI_SUCCESS;
}
/** Create the processor hierarchy AML tree from CM_ARM_PROC_HIERARCHY_INFO
CM objects.
/** Create the processor hierarchy AML tree from
CM_ARCH_COMMON_PROC_HIERARCHY_INFO CM objects.
@param [in] Generator The SSDT Cpu Topology generator.
@param [in] CfgMgrProtocol Pointer to the Configuration Manager
@ -1469,12 +1468,12 @@ BuildSsdtCpuTopologyTable (
OUT EFI_ACPI_DESCRIPTION_HEADER **CONST Table
)
{
EFI_STATUS Status;
AML_ROOT_NODE_HANDLE RootNode;
AML_OBJECT_NODE_HANDLE ScopeNode;
CM_ARM_PROC_HIERARCHY_INFO *ProcHierarchyNodeList;
UINT32 ProcHierarchyNodeCount;
ACPI_CPU_TOPOLOGY_GENERATOR *Generator;
EFI_STATUS Status;
AML_ROOT_NODE_HANDLE RootNode;
AML_OBJECT_NODE_HANDLE ScopeNode;
CM_ARCH_COMMON_PROC_HIERARCHY_INFO *ProcHierarchyNodeList;
UINT32 ProcHierarchyNodeCount;
ACPI_CPU_TOPOLOGY_GENERATOR *Generator;
ASSERT (This != NULL);
ASSERT (AcpiTableInfo != NULL);
@ -1502,7 +1501,7 @@ BuildSsdtCpuTopologyTable (
// Get the processor hierarchy info and update the processor topology
// structure count with Processor Hierarchy Nodes (Type 0)
Status = GetEArmObjProcHierarchyInfo (
Status = GetEArchCommonObjProcHierarchyInfo (
CfgMgrProtocol,
CM_NULL_TOKEN,
&ProcHierarchyNodeList,
@ -1526,7 +1525,7 @@ BuildSsdtCpuTopologyTable (
goto exit_handler;
}
} else {
// Generate the topology from CM_ARM_PROC_HIERARCHY_INFO objects.
// Generate the topology from CM_ARCH_COMMON_PROC_HIERARCHY_INFO objects.
Generator->ProcNodeList = ProcHierarchyNodeList;
Generator->ProcNodeCount = ProcHierarchyNodeCount;

View File

@ -69,12 +69,12 @@
/** A structure used to handle the Lpi structures referencing.
A CM_ARM_PROC_HIERARCHY_INFO structure references a CM_ARCH_COMMON_OBJ_REF.
A CM_ARCH_COMMON_PROC_HIERARCHY_INFO structure references a CM_ARCH_COMMON_OBJ_REF.
This CM_ARCH_COMMON_OBJ_REF references CM_ARCH_COMMON_LPI_INFO structures.
Example:
(Cpu0) (Cpu1)
CM_ARM_PROC_HIERARCHY_INFO CM_ARM_PROC_HIERARCHY_INFO
CM_ARCH_COMMON_PROC_HIERARCHY_INFO CM_ARCH_COMMON_PROC_HIERARCHY_INFO
| |
+----------------------------------------
|
@ -88,7 +88,7 @@
(A first Lpi state) (A second Lpi state)
CM_ARCH_COMMON_LPI_INFO[0] CM_ARCH_COMMON_LPI_INFO[1]
Here, Cpu0 and Cpu1 have the same Lpi states. Both CM_ARM_PROC_HIERARCHY_INFO
Here, Cpu0 and Cpu1 have the same Lpi states. Both CM_ARCH_COMMON_PROC_HIERARCHY_INFO
structures reference the same CM_ARCH_COMMON_OBJ_REF. An entry is created in the
TokenTable such as:
0 <-> CM_ARCH_COMMON_OBJ_REF
@ -130,16 +130,16 @@ typedef struct TokenTable {
*/
typedef struct AcpiCpuTopologyGenerator {
/// ACPI Table generator header
ACPI_TABLE_GENERATOR Header;
ACPI_TABLE_GENERATOR Header;
// Private fields are defined from here.
/// Private object used to handle token referencing.
TOKEN_TABLE TokenTable;
/// List of CM_ARM_PROC_HIERARCHY_INFO CM objects.
CM_ARM_PROC_HIERARCHY_INFO *ProcNodeList;
/// Count of CM_ARM_PROC_HIERARCHY_INFO CM objects.
UINT32 ProcNodeCount;
TOKEN_TABLE TokenTable;
/// List of CM_ARCH_COMMON_PROC_HIERARCHY_INFO CM objects.
CM_ARCH_COMMON_PROC_HIERARCHY_INFO *ProcNodeList;
/// Count of CM_ARCH_COMMON_PROC_HIERARCHY_INFO CM objects.
UINT32 ProcNodeCount;
} ACPI_CPU_TOPOLOGY_GENERATOR;
#pragma pack()

View File

@ -163,7 +163,6 @@ CM_OBJECT_TOKEN_FIXER TokenFixer[EArmObjMax] = {
NULL, ///< 17 - GIC ITS Identifier Array
NULL, ///< 18 - ID Mapping Array
NULL, ///< 19 - SMMU Interrupt Array
TokenFixerNotImplemented, ///< 20 - Processor Hierarchy Info
TokenFixerNotImplemented, ///< 21 - Cache Info
NULL, ///< 22 - CMN-600 Info
NULL, ///< 23 - Reserved Memory Range Node

View File

@ -322,9 +322,9 @@ STATIC CONST CM_OBJ_PARSER CmArchCommonGenericInterruptParser[] = {
{ "Flags", 4, "0x%x", NULL }
};
/** A parser for EArmObjProcHierarchyInfo.
/** A parser for EArchCommonObjProcHierarchyInfo.
*/
STATIC CONST CM_OBJ_PARSER CmArmProcHierarchyInfoParser[] = {
STATIC CONST CM_OBJ_PARSER CmArchCommonProcHierarchyInfoParser[] = {
{ "Token", sizeof (CM_OBJECT_TOKEN), "0x%p", NULL },
{ "Flags", 4, "0x%x", NULL },
{ "ParentToken", sizeof (CM_OBJECT_TOKEN), "0x%p", NULL },
@ -686,6 +686,7 @@ STATIC CONST CM_OBJ_PARSER_ARRAY ArchCommonNamespaceObjectParser[] = {
CM_PARSER_ADD_OBJECT (EArchCommonObjDeviceHandlePci, CmArchCommonDeviceHandlePciParser),
CM_PARSER_ADD_OBJECT (EArchCommonObjGenericInitiatorAffinityInfo,CmArchCommonGenericInitiatorAffinityInfoParser),
CM_PARSER_ADD_OBJECT (EArchCommonObjLpiInfo, CmArchCommonLpiInfoParser),
CM_PARSER_ADD_OBJECT (EArchCommonObjProcHierarchyInfo, CmArchCommonProcHierarchyInfoParser),
CM_PARSER_ADD_OBJECT_RESERVED (EArchCommonObjMax)
};
@ -712,7 +713,6 @@ STATIC CONST CM_OBJ_PARSER_ARRAY ArmNamespaceObjectParser[] = {
CM_PARSER_ADD_OBJECT (EArmObjGicItsIdentifierArray, CmArmGicItsIdentifierParser),
CM_PARSER_ADD_OBJECT (EArmObjIdMappingArray, CmArmIdMappingParser),
CM_PARSER_ADD_OBJECT (EArmObjSmmuInterruptArray, CmArchCommonGenericInterruptParser),
CM_PARSER_ADD_OBJECT (EArmObjProcHierarchyInfo, CmArmProcHierarchyInfoParser),
CM_PARSER_ADD_OBJECT (EArmObjCacheInfo, CmArmCacheInfoParser),
CM_PARSER_ADD_OBJECT (EArmObjCmn600Info, CmArmCmn600InfoParser),
CM_PARSER_ADD_OBJECT (EArmObjRmr, CmArmRmrInfoParser),

View File

@ -460,20 +460,19 @@ The CM_OBJECT_ID type is used to identify the Configuration Manager
| 17 | GIC ITS Identifier Array | |
| 18 | ID Mapping Array | |
| 19 | SMMU Interrupt Array | |
| 20 | Processor Hierarchy Info | Move to Arch Common NS |
| 21 | Cache Info | Move to Arch Common NS |
| 22 | CMN 600 Info | |
| 23 | Reserved Memory Range Node | |
| 24 | Memory Range Descriptor | |
| 25 | Continuous Performance Control Info | Move to Arch Common NS |
| 26 | Pcc Subspace Type 0 Info | Move to Arch Common NS |
| 27 | Pcc Subspace Type 1 Info | Move to Arch Common NS |
| 28 | Pcc Subspace Type 2 Info | Move to Arch Common NS |
| 29 | Pcc Subspace Type 3 Info | Move to Arch Common NS |
| 30 | Pcc Subspace Type 4 Info | Move to Arch Common NS |
| 31 | Pcc Subspace Type 5 Info | Move to Arch Common NS |
| 32 | Embedded Trace Extension/Module Info | |
| 33 | P-State Dependency (PSD) Info | Move to Arch Common NS |
| 20 | Cache Info | Move to Arch Common NS |
| 21 | CMN 600 Info | |
| 22 | Reserved Memory Range Node | |
| 23 | Memory Range Descriptor | |
| 24 | Continuous Performance Control Info | Move to Arch Common NS |
| 25 | Pcc Subspace Type 0 Info | Move to Arch Common NS |
| 26 | Pcc Subspace Type 1 Info | Move to Arch Common NS |
| 27 | Pcc Subspace Type 2 Info | Move to Arch Common NS |
| 28 | Pcc Subspace Type 3 Info | Move to Arch Common NS |
| 29 | Pcc Subspace Type 4 Info | Move to Arch Common NS |
| 30 | Pcc Subspace Type 5 Info | Move to Arch Common NS |
| 31 | Embedded Trace Extension/Module Info | |
| 32 | P-State Dependency (PSD) Info | Move to Arch Common NS |
| `*` | All other values are reserved. | |
#### Object ID's in the Arch Common Namespace:
@ -496,4 +495,6 @@ The CM_OBJECT_ID type is used to identify the Configuration Manager
| 13 | Device Handle PCI | |
| 14 | Generic Initiator Affinity Info | |
| 15 | Low Power Idle State Info | |
| 16 | Processor Hierarchy Info | |
| `*` | All other values are reserved. | |