ArmPkg/TimerDxe: Read timer frequency from CPU

The PCD gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz is used in the
SEC phase (if applicable) to write the platform's counter frequency
to the CNTFRQ system register, as this needs to be done by the highest
exception level implemented.

Under virtualization, we should be able to rely on the host to have
initialized this register to a sane value, as we run at EL1 and only
use the virtual timer, so the PcdArmArchTimerFreqInHz PCD has little
meaning here.

So in either case, by the time we enter the DXE phase, we can use the
CNTFRQ system register to read the frequency instead of looking at the
PCD.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16090 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Ard Biesheuvel 2014-09-10 18:48:47 +00:00 committed by oliviermartin
parent ca3026d361
commit 7a1e861e29
2 changed files with 1 additions and 2 deletions

View File

@ -151,7 +151,7 @@ TimerDriverSetTimerPeriod (
// mTimerTicks = TimerPeriod in 1ms unit x Frequency.10^-3
// = TimerPeriod.10^-4 x Frequency.10^-3
// = (TimerPeriod x Frequency) x 10^-7
TimerTicks = MultU64x32 (TimerPeriod, FixedPcdGet32 (PcdArmArchTimerFreqInHz));
TimerTicks = MultU64x32 (TimerPeriod, ArmGenericTimerGetTimerFreq ());
TimerTicks = DivU64x32 (TimerTicks, 10000000U);
// Raise TPL to update the mTimerTicks and mTimerPeriod to ensure these values

View File

@ -55,7 +55,6 @@
gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz
[Depex]
gHardwareInterruptProtocolGuid