OVMF ResetVector: Modify interface with SEC module

Previously it was:
  ESI/RSI - SEC Core entry point
  EDI/RDI - PEI Core entry point
  EBP/RBP - Start of BFV

Now it is:
  RAX/EAX  Initial value of the EAX register
           (BIST: Built-in Self Test)
  DI       'BP': boot-strap processor, or
           'AP': application processor
  RBP/EBP  Address of Boot Firmware Volume (BFV)

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9571 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
jljusten 2009-12-16 23:29:15 +00:00
parent 8861fc792c
commit 7a55c43b07
21 changed files with 479 additions and 333 deletions

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@ -0,0 +1,53 @@
## @file
# Automate the process of building the various reset vector types
#
# Copyright (c) 2009, Intel Corporation
#
# All rights reserved. This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
import glob
import os
import subprocess
import sys
def RunCommand(commandLine):
#print ' '.join(commandLine)
return subprocess.call(commandLine)
for filename in glob.glob(os.path.join('Bin', '*.raw')):
os.remove(filename)
for arch in ('ia32', 'x64'):
for debugType in (None, 'port80', 'serial'):
output = os.path.join('Bin', 'ResetVector')
output += '.' + arch
if debugType is not None:
output += '.' + debugType
output += '.raw'
commandLine = (
'nasm',
'-D', 'ARCH_%s' % arch.upper(),
'-D', 'DEBUG_%s' % str(debugType).upper(),
'-o', output,
'ResetVectorCode.asm',
)
ret = RunCommand(commandLine)
print '\tASM\t' + output
if ret != 0: sys.exit(ret)
commandLine = (
'python',
'Tools/FixupForRawSection.py',
output,
)
print '\tFIXUP\t' + output
ret = RunCommand(commandLine)
if ret != 0: sys.exit(ret)

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@ -1,4 +1,6 @@
;------------------------------------------------------------------------------ ;------------------------------------------------------------------------------
; @file
; Common macros used in the ResetVector VTF module.
; ;
; Copyright (c) 2008, Intel Corporation ; Copyright (c) 2008, Intel Corporation
; All rights reserved. This program and the accompanying materials ; All rights reserved. This program and the accompanying materials
@ -9,25 +11,11 @@
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
; ;
; Module Name:
;
; CommonMacros.inc
;
; Abstract:
;
; Common macros used in the ResetVector VTF module.
;
;------------------------------------------------------------------------------ ;------------------------------------------------------------------------------
%define ADDR16_OF(x) (0x10000 - fourGigabytes + x) %define ADDR16_OF(x) (0x10000 - fourGigabytes + x)
%define ADDR_OF(x) (0x100000000 - fourGigabytes + x) %define ADDR_OF(x) (0x100000000 - fourGigabytes + x)
%macro callEdx 1
mov edx, ADDR_OF(%%returnLabel)
jmp %1
%%returnLabel:
%endmacro
%macro OneTimeCall 1 %macro OneTimeCall 1
jmp %1 jmp %1
%1 %+ OneTimerCallReturn: %1 %+ OneTimerCallReturn:

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@ -1,6 +1,8 @@
;------------------------------------------------------------------------------ ;------------------------------------------------------------------------------
; @file
; Debug disabled
; ;
; Copyright (c) 2008, Intel Corporation ; Copyright (c) 2009, Intel Corporation
; All rights reserved. This program and the accompanying materials ; All rights reserved. This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License ; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at ; which accompanies this distribution. The full text of the license may be found at
@ -9,43 +11,16 @@
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
; ;
; Module Name:
;
; Reset-16Bit-old-tools.asm
;
; Abstract:
;
; First code exectuted by processor after resetting.
;
;------------------------------------------------------------------------------ ;------------------------------------------------------------------------------
BITS 16 BITS 16
earlyInit_Real16: %macro debugInitialize 0
;
; No initialization is required
;
%endmacro
jmp real16InitSerialPort %macro debugShowPostCode 1
real16SerialPortInitReturn: %endmacro
jmp to32BitFlat
ALIGN 16
;
; Junk data. Old GenFv tool will modify data here.
;
DQ 0, 0
;
; Reset Vector
;
; This is where the processor will begin execution
;
jmp short earlyInit_Real16
;
; Junk data. Old GenFv tool will modify data here.
;
ALIGN 16
fourGigabytes:

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@ -1,6 +1,8 @@
;------------------------------------------------------------------------------ ;------------------------------------------------------------------------------
; @file
; Transition from 16 bit real mode into 32 bit flat protected mode
; ;
; Copyright (c) 2008, Intel Corporation ; Copyright (c) 2008 - 2009, Intel Corporation
; All rights reserved. This program and the accompanying materials ; All rights reserved. This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License ; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at ; which accompanies this distribution. The full text of the license may be found at
@ -9,14 +11,6 @@
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
; ;
; Module Name:
;
; 16RealTo32Flat.asm
;
; Abstract:
;
; Transition from 16 bit real mode into 32 bit flat protected mode
;
;------------------------------------------------------------------------------ ;------------------------------------------------------------------------------
%define SEC_DEFAULT_CR0 0x40000023 %define SEC_DEFAULT_CR0 0x40000023
@ -24,11 +18,12 @@
BITS 16 BITS 16
to32BitFlat: ;
; Modified: EAX, EBX
;
TransitionFromReal16To32BitFlat:
writeToSerialPort '1' debugShowPostCode POSTCODE_16BIT_MODE
writeToSerialPort '6'
writeToSerialPort ' '
cli cli
@ -42,10 +37,6 @@ o32 lgdt [bx]
mov eax, SEC_DEFAULT_CR0 mov eax, SEC_DEFAULT_CR0
mov cr0, eax mov cr0, eax
; mov eax, cr0
; or al, 1
; mov cr0, eax
jmp LINEAR_CODE_SEL:dword ADDR_OF(jumpTo32BitAndLandHere) jmp LINEAR_CODE_SEL:dword ADDR_OF(jumpTo32BitAndLandHere)
BITS 32 BITS 32
jumpTo32BitAndLandHere: jumpTo32BitAndLandHere:
@ -53,9 +44,7 @@ jumpTo32BitAndLandHere:
mov eax, SEC_DEFAULT_CR4 mov eax, SEC_DEFAULT_CR4
mov cr4, eax mov cr4, eax
writeToSerialPort '3' debugShowPostCode POSTCODE_32BIT_MODE
writeToSerialPort '2'
writeToSerialPort ' '
mov ax, LINEAR_SEL mov ax, LINEAR_SEL
mov ds, ax mov ds, ax
@ -64,7 +53,7 @@ jumpTo32BitAndLandHere:
mov gs, ax mov gs, ax
mov ss, ax mov ss, ax
jmp TransitionFrom16RealTo32FlatComplete OneTimeCallRet TransitionFromReal16To32BitFlat
ALIGN 2 ALIGN 2

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@ -0,0 +1,48 @@
;------------------------------------------------------------------------------
; @file
; 16-bit initialization code
;
; Copyright (c) 2008 - 2009, Intel Corporation
; All rights reserved. This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
;------------------------------------------------------------------------------
BITS 16
;
; @param[out] DI 'BP' to indicate boot-strap processor
;
EarlyBspInitReal16:
mov di, 'BP'
jmp short Main16
;
; @param[out] DI 'AP' to indicate application processor
;
EarlyApInitReal16:
mov di, 'AP'
jmp short Main16
;
; Modified: EAX
;
; @param[in] EAX Initial value of the EAX register (BIST: Built-in Self Test)
; @param[out] ESP Initial value of the EAX register (BIST: Built-in Self Test)
;
EarlyInit16:
;
; ESP - Initial value of the EAX register (BIST: Built-in Self Test)
;
mov esp, eax
debugInitialize
OneTimeCallRet EarlyInit16

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@ -1,6 +1,8 @@
;------------------------------------------------------------------------------ ;------------------------------------------------------------------------------
; @file
; First code exectuted by processor after resetting.
; ;
; Copyright (c) 2008, Intel Corporation ; Copyright (c) 2008 - 2009, Intel Corporation
; All rights reserved. This program and the accompanying materials ; All rights reserved. This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License ; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at ; which accompanies this distribution. The full text of the license may be found at
@ -9,28 +11,25 @@
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
; ;
; Module Name:
;
; Reset-16Bit-vft0.asm
;
; Abstract:
;
; First code exectuted by processor after resetting.
;
;------------------------------------------------------------------------------ ;------------------------------------------------------------------------------
BITS 16 BITS 16
earlyInit_Real16:
jmp real16InitSerialPort
real16SerialPortInitReturn:
jmp to32BitFlat
ALIGN 16 ALIGN 16
DD 0, 0, 0 applicationProcessorEntryPoint:
;
; Application Processors entry point
;
; GenFv generates code aligned on a 4k boundary which will jump to this
; location. (0xffffffe0) This allows the Local APIC Startup IPI to be
; used to wake up the application processors.
;
jmp short EarlyApInitReal16
ALIGN 8
DD 0
; ;
; The VTF signature ; The VTF signature
@ -41,12 +40,16 @@ ALIGN 16
vtfSignature: vtfSignature:
DB 'V', 'T', 'F', 0 DB 'V', 'T', 'F', 0
ALIGN 16
resetVector:
; ;
; Reset Vector ; Reset Vector
; ;
; This is where the processor will begin execution ; This is where the processor will begin execution
; ;
jmp short earlyInit_Real16 wbinvd
jmp short EarlyBspInitReal16
ALIGN 16 ALIGN 16

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@ -1,6 +1,8 @@
;------------------------------------------------------------------------------ ;------------------------------------------------------------------------------
; @file
; Transition from 32 bit flat protected mode into 64 bit flat protected mode
; ;
; Copyright (c) 2008, Intel Corporation ; Copyright (c) 2008 - 2009, Intel Corporation
; All rights reserved. This program and the accompanying materials ; All rights reserved. This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License ; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at ; which accompanies this distribution. The full text of the license may be found at
@ -9,18 +11,13 @@
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
; ;
; Module Name:
;
; 32FlatTo64Flat.asm
;
; Abstract:
;
; Transition from 32 bit flat protected mode into 64 bit flat protected mode
;
;------------------------------------------------------------------------------ ;------------------------------------------------------------------------------
BITS 32 BITS 32
;
; Modified: EAX
;
Transition32FlatTo64Flat: Transition32FlatTo64Flat:
mov eax, ((ADDR_OF_START_OF_RESET_CODE & ~0xfff) - 0x1000) mov eax, ((ADDR_OF_START_OF_RESET_CODE & ~0xfff) - 0x1000)
@ -43,9 +40,7 @@ Transition32FlatTo64Flat:
BITS 64 BITS 64
jumpTo64BitAndLandHere: jumpTo64BitAndLandHere:
writeToSerialPort '6' debugShowPostCode POSTCODE_64BIT_MODE
writeToSerialPort '4'
writeToSerialPort ' '
OneTimeCallRet Transition32FlatTo64Flat OneTimeCallRet Transition32FlatTo64Flat

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@ -1,6 +1,8 @@
;------------------------------------------------------------------------------ ;------------------------------------------------------------------------------
; @file
; Search for the Boot Firmware Volume (BFV) base address
; ;
; Copyright (c) 2008, Intel Corporation ; Copyright (c) 2008 - 2009, Intel Corporation
; All rights reserved. This program and the accompanying materials ; All rights reserved. This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License ; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at ; which accompanies this distribution. The full text of the license may be found at
@ -9,14 +11,6 @@
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
; ;
; Module Name:
;
; SearchForBfvBase.asm
;
; Abstract:
;
; Search for the Boot FV Base Address
;
;------------------------------------------------------------------------------ ;------------------------------------------------------------------------------
;#define EFI_FIRMWARE_FILE_SYSTEM2_GUID \ ;#define EFI_FIRMWARE_FILE_SYSTEM2_GUID \
@ -29,21 +23,21 @@
BITS 32 BITS 32
; ;
; Input: ; Modified: EAX, EBX
; None ; Preserved: EDI, ESP
; ;
; Output: ; @param[out] EBP Address of Boot Firmware Volume (BFV)
; EBP - BFV Base Address
;
; Modified:
; EAX, EBX
; ;
Flat32SearchForBfvBase: Flat32SearchForBfvBase:
xor eax, eax xor eax, eax
searchingForBfvHeaderLoop: searchingForBfvHeaderLoop:
;
; We check for a firmware volume at every 4KB address in the top 16MB
; just below 4GB. (Addresses at 0xffHHH000 where H is any hex digit.)
;
sub eax, 0x1000 sub eax, 0x1000
cmp eax, 0xff800000 cmp eax, 0xff000000
jb searchedForBfvHeaderButNotFound jb searchedForBfvHeaderButNotFound
; ;
@ -70,19 +64,23 @@ searchingForBfvHeaderLoop:
jmp searchedForBfvHeaderAndItWasFound jmp searchedForBfvHeaderAndItWasFound
searchedForBfvHeaderButNotFound: searchedForBfvHeaderButNotFound:
writeToSerialPort '!' ;
xor eax, eax ; Hang if the SEC entry point was not found
;
debugShowPostCode POSTCODE_BFV_NOT_FOUND
;
; 0xbfbfbfbf in the EAX & EBP registers helps signal what failed
; for debugging purposes.
;
mov eax, 0xBFBFBFBF
mov ebp, eax
jmp $
searchedForBfvHeaderAndItWasFound: searchedForBfvHeaderAndItWasFound:
mov ebp, eax mov ebp, eax
writeToSerialPort 'B' debugShowPostCode POSTCODE_BFV_FOUND
writeToSerialPort 'F'
writeToSerialPort 'V'
writeToSerialPort ' '
or ebp, ebp
jz $
OneTimeCallRet Flat32SearchForBfvBase OneTimeCallRet Flat32SearchForBfvBase

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@ -1,6 +1,8 @@
;------------------------------------------------------------------------------ ;------------------------------------------------------------------------------
; @file
; Search for the SEC Core entry point
; ;
; Copyright (c) 2008, Intel Corporation ; Copyright (c) 2008 - 2009, Intel Corporation
; All rights reserved. This program and the accompanying materials ; All rights reserved. This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License ; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at ; which accompanies this distribution. The full text of the license may be found at
@ -9,40 +11,26 @@
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
; ;
; Module Name:
;
; SearchForSecAndPeiEntry.asm
;
; Abstract:
;
; Search for the SEC Core and PEI Core entry points
;
;------------------------------------------------------------------------------ ;------------------------------------------------------------------------------
BITS 32 BITS 32
%define EFI_FV_FILETYPE_SECURITY_CORE 0x03 %define EFI_FV_FILETYPE_SECURITY_CORE 0x03
%define EFI_FV_FILETYPE_PEI_CORE 0x04
; ;
; Input: ; Modified: EAX, EBX, ECX, EDX
; EBP - BFV Base Address ; Preserved: EDI, EBP, ESP
; ;
; Output: ; @param[in] EBP Address of Boot Firmware Volume (BFV)
; ESI - SEC Core Entry Point Address (or 0 if not found) ; @param[out] ESI SEC Core Entry Point Address
; EDI - PEI Core Entry Point Address (or 0 if not found)
; ;
; Modified: Flat32SearchForSecEntryPoint:
; EAX, EBX, ECX
;
Flat32SearchForSecAndPeiEntries:
; ;
; Initialize EBP and ESI to 0 ; Initialize EBP and ESI to 0
; ;
xor ebx, ebx xor ebx, ebx
mov esi, ebx mov esi, ebx
mov edi, ebx
; ;
; Pass over the BFV header ; Pass over the BFV header
@ -50,7 +38,7 @@ Flat32SearchForSecAndPeiEntries:
mov eax, ebp mov eax, ebp
mov bx, [ebp + 0x30] mov bx, [ebp + 0x30]
add eax, ebx add eax, ebx
jc doneSeachingForSecAndPeiEntries jc secEntryPointWasNotFound
jmp searchingForFfsFileHeaderLoop jmp searchingForFfsFileHeaderLoop
@ -59,17 +47,17 @@ moveForwardWhileSearchingForFfsFileHeaderLoop:
; Make forward progress in the search ; Make forward progress in the search
; ;
inc eax inc eax
jc doneSeachingForSecAndPeiEntries jc secEntryPointWasNotFound
searchingForFfsFileHeaderLoop: searchingForFfsFileHeaderLoop:
test eax, eax test eax, eax
jz doneSeachingForSecAndPeiEntries jz secEntryPointWasNotFound
; ;
; Ensure 8 byte alignment ; Ensure 8 byte alignment
; ;
add eax, 7 add eax, 7
jc doneSeachingForSecAndPeiEntries jc secEntryPointWasNotFound
and al, 0xf8 and al, 0xf8
; ;
@ -82,7 +70,6 @@ searchingForFfsFileHeaderLoop:
and ecx, 0x00ffffff and ecx, 0x00ffffff
or ecx, ecx or ecx, ecx
jz moveForwardWhileSearchingForFfsFileHeaderLoop jz moveForwardWhileSearchingForFfsFileHeaderLoop
; jmp $
add ecx, eax add ecx, eax
jz jumpSinceWeFoundTheLastFfsFile jz jumpSinceWeFoundTheLastFfsFile
jc moveForwardWhileSearchingForFfsFileHeaderLoop jc moveForwardWhileSearchingForFfsFileHeaderLoop
@ -91,53 +78,41 @@ jumpSinceWeFoundTheLastFfsFile:
; ;
; There seems to be a valid file at eax ; There seems to be a valid file at eax
; ;
mov bl, [eax + 0x12] ; BL - File Type cmp byte [eax + 0x12], EFI_FV_FILETYPE_SECURITY_CORE ; Check File Type
cmp bl, EFI_FV_FILETYPE_PEI_CORE
je fileTypeIsPeiCore
cmp bl, EFI_FV_FILETYPE_SECURITY_CORE
jne readyToTryFfsFileAtEcx jne readyToTryFfsFileAtEcx
fileTypeIsSecCore: fileTypeIsSecCore:
callEdx GetEntryPointOfFfsFileReturnEdx OneTimeCall GetEntryPointOfFfsFile
test eax, eax test eax, eax
jz readyToTryFfsFileAtEcx jnz doneSeachingForSecEntryPoint
mov esi, eax
jmp readyToTryFfsFileAtEcx
fileTypeIsPeiCore:
callEdx GetEntryPointOfFfsFileReturnEdx
test eax, eax
jz readyToTryFfsFileAtEcx
mov edi, eax
readyToTryFfsFileAtEcx: readyToTryFfsFileAtEcx:
;
; Try the next FFS file at ECX
;
mov eax, ecx mov eax, ecx
jmp searchingForFfsFileHeaderLoop jmp searchingForFfsFileHeaderLoop
doneSeachingForSecAndPeiEntries: secEntryPointWasNotFound:
xor eax, eax
doneSeachingForSecEntryPoint:
mov esi, eax
test esi, esi test esi, esi
jnz secCoreEntryPointWasFound jnz secCoreEntryPointWasFound
writeToSerialPort '!'
secCoreEntryPointWasNotFound:
;
; Hang if the SEC entry point was not found
;
debugShowPostCode POSTCODE_SEC_NOT_FOUND
jz $
secCoreEntryPointWasFound: secCoreEntryPointWasFound:
writeToSerialPort 'S' debugShowPostCode POSTCODE_SEC_FOUND
writeToSerialPort 'E'
writeToSerialPort 'C'
writeToSerialPort ' '
test edi, edi
jnz peiCoreEntryPointWasFound
writeToSerialPort '!'
peiCoreEntryPointWasFound:
writeToSerialPort 'P'
writeToSerialPort 'E'
writeToSerialPort 'I'
writeToSerialPort ' '
OneTimeCallRet Flat32SearchForSecAndPeiEntries
OneTimeCallRet Flat32SearchForSecEntryPoint
%define EFI_SECTION_PE32 0x10 %define EFI_SECTION_PE32 0x10
@ -152,7 +127,7 @@ peiCoreEntryPointWasFound:
; Modified: ; Modified:
; EBX ; EBX
; ;
GetEntryPointOfFfsFileReturnEdx: GetEntryPointOfFfsFile:
test eax, eax test eax, eax
jz getEntryPointOfFfsFileErrorReturn jz getEntryPointOfFfsFileErrorReturn
add eax, 0x18 ; EAX = Start of section add eax, 0x18 ; EAX = Start of section
@ -217,6 +192,5 @@ getEntryPointOfFfsFileErrorReturn:
mov eax, 0 mov eax, 0
getEntryPointOfFfsFileReturn: getEntryPointOfFfsFileReturn:
jmp edx OneTimeCallRet GetEntryPointOfFfsFile

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@ -1,63 +0,0 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2008, Intel Corporation
; All rights reserved. This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; JumpToSec.asm
;
; Abstract:
;
; Jump from the reset vector binary to SEC
;
;------------------------------------------------------------------------------
BITS 32
TransitionFrom16RealTo32FlatComplete:
OneTimeCall Flat32SearchForBfvBase
OneTimeCall Flat32SearchForSecAndPeiEntries
;
; ESI - SEC Core entry point
; EDI - PEI Core entry point
; EBP - Start of BFV
;
; Jump to SEC Core entry point
;
%ifdef ARCH_IA32
jmp esi
%else
OneTimeCall Transition32FlatTo64Flat
BITS 64
mov rax, 0x00000000ffffffff
and rsi, rax
and rdi, rax
and rbp, rax
;
; RSI - SEC Core entry point
; RDI - PEI Core entry point
; RBP - Start of BFV
;
; Jump to SEC Core entry point
;
jmp rsi
%endif

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@ -0,0 +1,106 @@
;------------------------------------------------------------------------------
; @file
; Main routine of the pre-SEC code up through the jump into SEC
;
; Copyright (c) 2008 - 2009, Intel Corporation
; All rights reserved. This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
;------------------------------------------------------------------------------
BITS 16
;
; Modified: EBX, ECX, EDX, EBP
;
; @param[in,out] RAX/EAX Initial value of the EAX register
; (BIST: Built-in Self Test)
; @param[in,out] DI 'BP': boot-strap processor, or
; 'AP': application processor
; @param[out] RBP/EBP Address of Boot Firmware Volume (BFV)
;
; @return None This routine jumps to SEC and does not return
;
Main16:
OneTimeCall EarlyInit16
;
; Transition the processor from 16-bit real mode to 32-bit flat mode
;
OneTimeCall TransitionFromReal16To32BitFlat
BITS 32
;
; Search for the Boot Firmware Volume (BFV)
;
OneTimeCall Flat32SearchForBfvBase
;
; EBP - Start of BFV
;
;
; Search for the SEC entry point
;
OneTimeCall Flat32SearchForSecEntryPoint
;
; ESI - SEC Core entry point
; EBP - Start of BFV
;
%ifdef ARCH_IA32
;
; Restore initial EAX value into the EAX register
;
mov eax, esp
;
; Jump to the 32-bit SEC entry point
;
jmp esi
%else
;
; Transition the processor from 32-bit flat mode to 64-bit flat mode
;
OneTimeCall Transition32FlatTo64Flat
BITS 64
;
; Some values were calculated in 32-bit mode. Make sure the upper
; 32-bits of 64-bit registers are zero for these values.
;
mov rax, 0x00000000ffffffff
and rsi, rax
and rbp, rax
and rsp, rax
;
; RSI - SEC Core entry point
; RBP - Start of BFV
;
;
; Restore initial EAX value into the RAX register
;
mov rax, rsp
;
; Jump to the 64-bit SEC entry point
;
jmp rsi
%endif

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@ -0,0 +1,28 @@
;------------------------------------------------------------------------------
; @file
; Port 0x80 debug support macros
;
; Copyright (c) 2009, Intel Corporation
; All rights reserved. This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
;------------------------------------------------------------------------------
BITS 16
%macro debugInitialize 0
;
; No initialization is required
;
%endmacro
%macro debugShowPostCode 1
mov al, %1
out 0x80, al
%endmacro

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@ -0,0 +1,25 @@
;------------------------------------------------------------------------------
; @file
; Definitions of POST CODES for the reset vector module
;
; Copyright (c) 2009, Intel Corporation
; All rights reserved. This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
;------------------------------------------------------------------------------
%define POSTCODE_16BIT_MODE 0x16
%define POSTCODE_32BIT_MODE 0x32
%define POSTCODE_64BIT_MODE 0x64
%define POSTCODE_BFV_NOT_FOUND 0xb0
%define POSTCODE_BFV_FOUND 0xb1
%define POSTCODE_SEC_NOT_FOUND 0xf0
%define POSTCODE_SEC_FOUND 0xf1

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@ -1,6 +1,8 @@
;------------------------------------------------------------------------------ ;------------------------------------------------------------------------------
; @file
; This file includes all other code files to assemble the reset vector code
; ;
; Copyright (c) 2008, Intel Corporation ; Copyright (c) 2008 - 2009, Intel Corporation
; All rights reserved. This program and the accompanying materials ; All rights reserved. This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License ; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at ; which accompanies this distribution. The full text of the license may be found at
@ -9,14 +11,6 @@
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
; ;
; Module Name:
;
; ResetVectorCode.asm
;
; Abstract:
;
; Create code for VTF raw section.
;
;------------------------------------------------------------------------------ ;------------------------------------------------------------------------------
%ifdef ARCH_IA32 %ifdef ARCH_IA32
@ -29,15 +23,30 @@
%endif %endif
%include "CommonMacros.inc" %include "CommonMacros.inc"
%include "SerialDebug.asm"
%include "PostCodes.inc"
%ifdef DEBUG_NONE
%include "DebugDisabled.asm"
%elifdef DEBUG_PORT80
%include "Port80Debug.asm"
%elifdef DEBUG_SERIAL
%include "SerialDebug.asm"
%else
%error "No debug type was specified."
%endif
%include "Ia32/SearchForBfvBase.asm" %include "Ia32/SearchForBfvBase.asm"
%include "Ia32/SearchForSecAndPeiEntries.asm" %include "Ia32/SearchForSecEntry.asm"
%include "JumpToSec.asm"
%include "Ia16/16RealTo32Flat.asm"
%ifdef ARCH_X64 %ifdef ARCH_X64
%include "Ia32/32FlatTo64Flat.asm" %include "Ia32/32FlatTo64Flat.asm"
%endif %endif
%include "Ia16/16RealTo32Flat.asm"
%include "Ia16/Init16.asm"
%include "Main.asm"
%include "Ia16/ResetVectorVtf0.asm" %include "Ia16/ResetVectorVtf0.asm"

View File

@ -1,6 +1,8 @@
;------------------------------------------------------------------------------ ;------------------------------------------------------------------------------
; @file
; Serial port debug support macros
; ;
; Copyright (c) 2008, Intel Corporation ; Copyright (c) 2008 - 2009, Intel Corporation
; All rights reserved. This program and the accompanying materials ; All rights reserved. This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License ; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at ; which accompanies this distribution. The full text of the license may be found at
@ -9,18 +11,8 @@
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
; ;
; Module Name:
;
; SerialDebug.asm
;
; Abstract:
;
; Serial port support macros
;
;------------------------------------------------------------------------------ ;------------------------------------------------------------------------------
BITS 16
;//--------------------------------------------- ;//---------------------------------------------
;// UART Register Offsets ;// UART Register Offsets
;//--------------------------------------------- ;//---------------------------------------------
@ -88,12 +80,38 @@ BITS 16
out dx, al out dx, al
%endmacro %endmacro
%macro writeToSerialPort 1 %macro debugShowCharacter 1
waitForSerialTxReady waitForSerialTxReady
outToSerialPort 0, %1 outToSerialPort 0, %1
%endmacro %endmacro
real16InitSerialPort: %macro debugShowHexDigit 1
%if (%1 < 0xa)
debugShowCharacter BYTE ('0' + (%1))
%else
debugShowCharacter BYTE ('a' + ((%1) - 0xa))
%endif
%endmacro
%macro debugNewline 0
debugShowCharacter `\r`
debugShowCharacter `\n`
%endmacro
%macro debugShowPostCode 1
debugShowHexDigit (((%1) >> 4) & 0xf)
debugShowHexDigit ((%1) & 0xf)
debugNewline
%endmacro
BITS 16
%macro debugInitialize 0
jmp real16InitDebug
real16InitDebugReturn:
%endmacro
real16InitDebug:
; ;
; Set communications format ; Set communications format
; ;
@ -110,5 +128,5 @@ real16InitSerialPort:
; ;
outToSerialPort LCR_OFFSET, SERIAL_DEFAULT_LCR outToSerialPort LCR_OFFSET, SERIAL_DEFAULT_LCR
jmp real16SerialPortInitReturn jmp real16InitDebugReturn