mirror of https://github.com/acidanthera/audk.git
ArmVirtualizationPkg: add GICv3 detection to VirtFdtDxe
This adds support for detecting the presence of a GICv3 interrupt controller from the device tree, and recording its distributor and redistributor base addresses in their respective PCDs. Contributed-under: TianoCore Contribution Agreement 1.0 Reviewed-by: Olivier Martin <olivier.martin@arm.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16956 6f19259b-4bc3-4df7-8a09-765794883524
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@ -188,6 +188,7 @@
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# ARM General Interrupt Controller
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# ARM General Interrupt Controller
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#
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#
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gArmTokenSpaceGuid.PcdGicDistributorBase|0x0
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gArmTokenSpaceGuid.PcdGicDistributorBase|0x0
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gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x0
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gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x0
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gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x0
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## PL031 RealTimeClock
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## PL031 RealTimeClock
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@ -47,6 +47,7 @@ typedef enum {
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PropertyTypePsci,
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PropertyTypePsci,
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PropertyTypeFwCfg,
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PropertyTypeFwCfg,
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PropertyTypePciHost,
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PropertyTypePciHost,
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PropertyTypeGicV3,
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} PROPERTY_TYPE;
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} PROPERTY_TYPE;
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typedef struct {
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typedef struct {
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@ -64,6 +65,7 @@ STATIC CONST PROPERTY CompatibleProperties[] = {
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{ PropertyTypePsci, "arm,psci-0.2" },
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{ PropertyTypePsci, "arm,psci-0.2" },
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{ PropertyTypeFwCfg, "qemu,fw-cfg-mmio" },
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{ PropertyTypeFwCfg, "qemu,fw-cfg-mmio" },
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{ PropertyTypePciHost, "pci-host-ecam-generic" },
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{ PropertyTypePciHost, "pci-host-ecam-generic" },
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{ PropertyTypeGicV3, "arm,gic-v3" },
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{ PropertyTypeUnknown, "" }
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{ PropertyTypeUnknown, "" }
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};
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};
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@ -286,7 +288,7 @@ InitializeVirtFdtDxe (
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VIRTIO_TRANSPORT_DEVICE_PATH *DevicePath;
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VIRTIO_TRANSPORT_DEVICE_PATH *DevicePath;
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EFI_HANDLE Handle;
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EFI_HANDLE Handle;
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UINT64 RegBase;
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UINT64 RegBase;
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UINT64 DistBase, CpuBase;
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UINT64 DistBase, CpuBase, RedistBase;
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CONST INTERRUPT_PROPERTY *InterruptProp;
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CONST INTERRUPT_PROPERTY *InterruptProp;
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INT32 SecIntrNum, IntrNum, VirtIntrNum, HypIntrNum;
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INT32 SecIntrNum, IntrNum, VirtIntrNum, HypIntrNum;
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CONST CHAR8 *PsciMethod;
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CONST CHAR8 *PsciMethod;
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@ -434,6 +436,36 @@ InitializeVirtFdtDxe (
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DEBUG ((EFI_D_INFO, "Found GIC @ 0x%Lx/0x%Lx\n", DistBase, CpuBase));
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DEBUG ((EFI_D_INFO, "Found GIC @ 0x%Lx/0x%Lx\n", DistBase, CpuBase));
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break;
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break;
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case PropertyTypeGicV3:
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//
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// The GIC v3 DT binding describes a series of at least 3 physical (base
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// addresses, size) pairs: the distributor interface (GICD), at least one
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// redistributor region (GICR) containing dedicated redistributor
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// interfaces for all individual CPUs, and the CPU interface (GICC).
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// Under virtualization, we assume that the first redistributor region
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// listed covers the boot CPU. Also, our GICv3 driver only supports the
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// system register CPU interface, so we can safely ignore the MMIO version
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// which is listed after the sequence of redistributor interfaces.
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// This means we are only interested in the first two memory regions
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// supplied, and ignore everything else.
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//
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ASSERT (Len >= 32);
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// RegProp[0..1] == { GICD base, GICD size }
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DistBase = fdt64_to_cpu (((UINT64 *)RegProp)[0]);
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ASSERT (DistBase < MAX_UINT32);
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// RegProp[2..3] == { GICR base, GICR size }
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RedistBase = fdt64_to_cpu (((UINT64 *)RegProp)[2]);
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ASSERT (RedistBase < MAX_UINT32);
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PcdSet32 (PcdGicDistributorBase, (UINT32)DistBase);
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PcdSet32 (PcdGicRedistributorsBase, (UINT32)RedistBase);
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DEBUG ((EFI_D_INFO, "Found GIC v3 (re)distributor @ 0x%Lx (0x%Lx)\n",
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DistBase, RedistBase));
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break;
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case PropertyTypeRtc:
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case PropertyTypeRtc:
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ASSERT (Len == 16);
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ASSERT (Len == 16);
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@ -52,6 +52,7 @@
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gArmVirtualizationTokenSpaceGuid.PcdFwCfgSelectorAddress
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gArmVirtualizationTokenSpaceGuid.PcdFwCfgSelectorAddress
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gArmVirtualizationTokenSpaceGuid.PcdFwCfgDataAddress
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gArmVirtualizationTokenSpaceGuid.PcdFwCfgDataAddress
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gArmTokenSpaceGuid.PcdGicDistributorBase
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gArmTokenSpaceGuid.PcdGicDistributorBase
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gArmTokenSpaceGuid.PcdGicRedistributorsBase
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gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
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gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
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gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
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gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
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gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
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gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
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