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CorebootModulePkg/CbSupportPei: Mask off all legacy 8259 interrupt sources 

The current coreboot UEFI payload has an assumption that all interrupt
sources should be masked off before transferring control to the payload.
However, it is not the case on some platforms, such as QEMU. It will
cause boot failure due to unexpected pending interrupt in the payload.

To resolve it all legacy 8259 interrupt sources need to be masked
piror to the DXE phase. The fix was tested on QEMU virtual platform.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17550 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Maurice Ma 2015-06-03 02:44:28 +00:00 committed by mauricema
parent 8e5015c217
commit 7b7fc3e783
3 changed files with 15 additions and 4 deletions
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13
CorebootModulePkg/CbSupportPei/CbSupportPei.c
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@ -2,7 +2,7 @@
This PEIM will parse coreboot table in memory and report resource information into pei core.
This file contains the main entrypoint of the PEIM.
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -14,6 +14,9 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "CbSupportPei.h"
#define LEGACY_8259_MASK_REGISTER_MASTER 0x21
#define LEGACY_8259_MASK_REGISTER_SLAVE 0xA1
EFI_MEMORY_TYPE_INFORMATION mDefaultMemoryTypeInformation[] = {
{ EfiACPIReclaimMemory, 0x008 },
{ EfiACPIMemoryNVS, 0x004 },
@ -374,7 +377,13 @@ CbPeiEntryPoint (
CopyMem (pFbInfo, &FbInfo, sizeof (FRAME_BUFFER_INFO));
DEBUG ((EFI_D_ERROR, "Create frame buffer info guid hob\n"));
}
//
// Mask off all legacy 8259 interrupt sources
//
IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0xFF);
IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0xFF);
return EFI_SUCCESS;
}

3
CorebootModulePkg/CbSupportPei/CbSupportPei.h
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@ -1,7 +1,7 @@
/** @file
The header file of Coreboot Support PEIM.
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -27,6 +27,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#include <Library/PcdLib.h>
#include <Library/CbParseLib.h>
#include <Library/MtrrLib.h>
#include <Library/IoLib.h>
#include <Guid/SmramMemoryReserve.h>
#include <Guid/MemoryTypeInformation.h>

3
CorebootModulePkg/CbSupportPei/CbSupportPei.inf
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@ -4,7 +4,7 @@
# Parses coreboot table in memory and report resource information into pei core. It will install
# the memory as required.
#
# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@ -51,6 +51,7 @@
PcdLib
CbParseLib
MtrrLib
IoLib
[Guids]
gEfiSmmPeiSmramMemoryReserveGuid