mirror of https://github.com/acidanthera/audk.git
SourceLevelDebugPkg: Replace Opcode with the corresponding instructions.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3790 Replace Opcode with the corresponding instructions. The code changes have been verified with CompareBuild.py tool, which can be used to compare the results of two different EDK II builds to determine if they generate the same binaries. (tool link: https://github.com/mdkinney/edk2/tree/sandbox/CompareBuild) Signed-off-by: Jason Lou <yun.lou@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
This commit is contained in:
parent
d3febfd9ad
commit
7bc8b1d9f4
|
@ -1,6 +1,6 @@
|
||||||
;------------------------------------------------------------------------------
|
;------------------------------------------------------------------------------
|
||||||
;
|
;
|
||||||
; Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>
|
; Copyright (c) 2010 - 2022, Intel Corporation. All rights reserved.<BR>
|
||||||
; SPDX-License-Identifier: BSD-2-Clause-Patent
|
; SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||||
;
|
;
|
||||||
; Module Name:
|
; Module Name:
|
||||||
|
@ -321,7 +321,7 @@ NoExtrPush:
|
||||||
test edx, BIT24 ; Test for FXSAVE/FXRESTOR support.
|
test edx, BIT24 ; Test for FXSAVE/FXRESTOR support.
|
||||||
; edx still contains result from CPUID above
|
; edx still contains result from CPUID above
|
||||||
jz .2
|
jz .2
|
||||||
db 0xf, 0xae, 00000111y ;fxsave [edi]
|
fxsave [edi]
|
||||||
.2:
|
.2:
|
||||||
|
|
||||||
;; save the exception data
|
;; save the exception data
|
||||||
|
@ -342,7 +342,7 @@ NoExtrPush:
|
||||||
cpuid ; use CPUID to determine if FXSAVE/FXRESTOR are supported
|
cpuid ; use CPUID to determine if FXSAVE/FXRESTOR are supported
|
||||||
test edx, BIT24 ; Test for FXSAVE/FXRESTOR support
|
test edx, BIT24 ; Test for FXSAVE/FXRESTOR support
|
||||||
jz .3
|
jz .3
|
||||||
db 0xf, 0xae, 00001110y ; fxrstor [esi]
|
fxrstor [esi]
|
||||||
.3:
|
.3:
|
||||||
add esp, 512
|
add esp, 512
|
||||||
|
|
||||||
|
|
|
@ -1,6 +1,6 @@
|
||||||
;------------------------------------------------------------------------------
|
;------------------------------------------------------------------------------
|
||||||
;
|
;
|
||||||
; Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
|
; Copyright (c) 2016 - 2022, Intel Corporation. All rights reserved.<BR>
|
||||||
; SPDX-License-Identifier: BSD-2-Clause-Patent
|
; SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||||
;
|
;
|
||||||
; Module Name:
|
; Module Name:
|
||||||
|
@ -293,7 +293,7 @@ NoExtrPush:
|
||||||
rep stosq
|
rep stosq
|
||||||
pop rcx
|
pop rcx
|
||||||
mov rdi, rsp
|
mov rdi, rsp
|
||||||
db 0xf, 0xae, 00000111y ;fxsave [rdi]
|
fxsave [rdi]
|
||||||
|
|
||||||
;; save the exception data
|
;; save the exception data
|
||||||
push qword [rbp + 16]
|
push qword [rbp + 16]
|
||||||
|
@ -314,7 +314,7 @@ NoExtrPush:
|
||||||
add rsp, 8
|
add rsp, 8
|
||||||
|
|
||||||
mov rsi, rsp
|
mov rsi, rsp
|
||||||
db 0xf, 0xae, 00001110y ; fxrstor [rsi]
|
fxrstor [rsi]
|
||||||
add rsp, 512
|
add rsp, 512
|
||||||
|
|
||||||
;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
|
;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
|
||||||
|
|
Loading…
Reference in New Issue