ArmPlatformPkg: remove unused DebugSecExtraActionLib library

This implementation of ArmPlatformSecExtraActionLib is no longer used
anywhere so remove it.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
This commit is contained in:
Ard Biesheuvel 2017-11-15 11:42:09 +00:00
parent 37fcab3e10
commit 7c0e497d6e
2 changed files with 0 additions and 175 deletions

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@ -1,121 +0,0 @@
/** @file
*
* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
* which accompanies this distribution. The full text of the license may be found at
* http://opensource.org/licenses/bsd-license.php
*
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
*
**/
#include <PiPei.h>
#include <Library/ArmLib.h>
#include <Library/ArmGicLib.h>
#include <Library/ArmPlatformLib.h>
#include <Library/ArmPlatformSecLib.h>
#include <Library/DebugLib.h>
#include <Library/PcdLib.h>
#include <Library/PrintLib.h>
#include <Library/SerialPortLib.h>
// When the firmware is built as not Standalone, the secondary cores need to wait the firmware
// entirely written into DRAM. It is the firmware from DRAM which will wake up the secondary cores.
VOID
NonSecureWaitForFirmware (
VOID
)
{
VOID (*SecondaryStart)(VOID);
UINTN AcknowledgeInterrupt;
UINTN InterruptId;
// The secondary cores will execute the firmware once wake from WFI.
SecondaryStart = (VOID (*)())(UINTN)PcdGet64 (PcdFvBaseAddress);
ArmCallWFI ();
// Acknowledge the interrupt and send End of Interrupt signal.
AcknowledgeInterrupt = ArmGicAcknowledgeInterrupt (PcdGet64 (PcdGicInterruptInterfaceBase), &InterruptId);
// Check if it is a valid interrupt ID
if (InterruptId < ArmGicGetMaxNumInterrupts (PcdGet64 (PcdGicDistributorBase))) {
// Got a valid SGI number hence signal End of Interrupt
ArmGicEndOfInterrupt (PcdGet64 (PcdGicInterruptInterfaceBase), AcknowledgeInterrupt);
}
// Jump to secondary core entry point.
SecondaryStart ();
// PEI Core should always load and never return
ASSERT (FALSE);
}
/**
Call before jumping to Normal World
This function allows the firmware platform to do extra actions before
jumping to the Normal World
**/
VOID
ArmPlatformSecExtraAction (
IN UINTN MpId,
OUT UINTN* JumpAddress
)
{
CHAR8 Buffer[100];
UINTN CharCount;
UINTN* StartAddress;
if (FeaturePcdGet (PcdStandalone) == FALSE) {
//
// Warning: This code assumes the DRAM has already been initialized by ArmPlatformSecLib
//
if (ArmPlatformIsPrimaryCore (MpId)) {
StartAddress = (UINTN*)(UINTN)PcdGet64 (PcdFvBaseAddress);
// Patch the DRAM to make an infinite loop at the start address
*StartAddress = 0xEAFFFFFE; // opcode for while(1)
CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Waiting for firmware at 0x%08X ...\n\r",StartAddress);
SerialPortWrite ((UINT8 *) Buffer, CharCount);
*JumpAddress = PcdGet64 (PcdFvBaseAddress);
} else {
// When the primary core is stopped by the hardware debugger to copy the firmware
// into DRAM. The secondary cores are still running. As soon as the first bytes of
// the firmware are written into DRAM, the secondary cores will start to execute the
// code even if the firmware is not entirely written into the memory.
// That's why the secondary cores need to be parked in WFI and wake up once the
// firmware is ready.
*JumpAddress = (UINTN)NonSecureWaitForFirmware;
}
} else if (FeaturePcdGet (PcdSystemMemoryInitializeInSec)) {
//
// Warning: This code assumes the DRAM has already been initialized by ArmPlatformSecLib
//
if (ArmPlatformIsPrimaryCore (MpId)) {
// Signal the secondary cores they can jump to PEI phase
ArmGicSendSgiTo (PcdGet64 (PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId));
// To enter into Non Secure state, we need to make a return from exception
*JumpAddress = PcdGet64 (PcdFvBaseAddress);
} else {
// We wait for the primary core to finish to initialize the System Memory. Otherwise the secondary
// cores would make crash the system by setting their stacks in DRAM before the primary core has not
// finished to initialize the system memory.
*JumpAddress = (UINTN)NonSecureWaitForFirmware;
}
} else {
*JumpAddress = PcdGet64 (PcdFvBaseAddress);
}
}

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#/* @file
# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#*/
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = DebugSecExtraActionLib
FILE_GUID = 8fff7a60-a6f8-11e0-990a-0002a5d5c51b
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = ArmPlatformSecExtraActionLib
#
# The following information is for reference only and not required by the build tools.
#
# VALID_ARCHITECTURES = ARM
#
[Sources.common]
DebugSecExtraActionLib.c
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
ArmPkg/ArmPkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec
[LibraryClasses]
ArmPlatformLib
DebugLib
PcdLib
ArmGicLib
PrintLib
SerialPortLib
[FeaturePcd]
gArmPlatformTokenSpaceGuid.PcdStandalone
gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec
[FixedPcd]
gArmTokenSpaceGuid.PcdFvBaseAddress
gArmTokenSpaceGuid.PcdGicDistributorBase
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
gArmTokenSpaceGuid.PcdGicSgiIntId