UefiCpuPkg: Change complex DEBUG_CODE() to DEBUG_CODE_BEGIN/END()

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3767

Update use of DEBUG_CODE(Expression) if Expression is a complex code
block with if/while/for/case statements that use {}.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
This commit is contained in:
Michael D Kinney 2021-12-05 14:34:05 -08:00 committed by mergify[bot]
parent f9f4fb2329
commit 7c2a6033c1
6 changed files with 14 additions and 16 deletions

View File

@ -1071,7 +1071,7 @@ AddMemoryMappedIoSpace (
}
}
DEBUG_CODE (
DEBUG_CODE_BEGIN ();
//
// Make sure there are adjacent descriptors covering [Base, Base + Length).
// It is possible that they have not been merged; merging can be prevented
@ -1089,7 +1089,7 @@ AddMemoryMappedIoSpace (
ASSERT (Descriptor.GcdMemoryType == EfiGcdMemoryTypeMemoryMappedIo);
ASSERT ((Descriptor.Capabilities & Capabilities) == Capabilities);
}
);
DEBUG_CODE_END ();
FreeMemorySpaceMap:
FreePool (MemorySpaceMap);
@ -1212,4 +1212,3 @@ InitializeCpu (
return Status;
}

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@ -243,7 +243,7 @@ GetApicMode (
VOID
)
{
DEBUG_CODE (
DEBUG_CODE_BEGIN ();
{
MSR_IA32_APIC_BASE_REGISTER ApicBaseMsr;
@ -259,7 +259,7 @@ GetApicMode (
ASSERT (ApicBaseMsr.Bits.EXTD == 0);
}
}
);
DEBUG_CODE_END ();
return LOCAL_APIC_MODE_XAPIC;
}

View File

@ -2155,7 +2155,7 @@ MpInitLibInitialize (
//
// Dump the microcode revision for each core.
//
DEBUG_CODE (
DEBUG_CODE_BEGIN ();
UINT32 ThreadId;
UINT32 ExpectedMicrocodeRevision;
CpuInfoInHob = (CPU_INFO_IN_HOB *) (UINTN) CpuMpData->CpuInfoInHob;
@ -2176,7 +2176,7 @@ MpInitLibInitialize (
));
}
}
);
DEBUG_CODE_END ();
//
// Initialize global data for MP support
//

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@ -2186,7 +2186,7 @@ MtrrSetMemoryAttributesInMtrrSettings (
//
// 0. Dump the requests.
//
DEBUG_CODE (
DEBUG_CODE_BEGIN ();
DEBUG ((DEBUG_CACHE, "Mtrr: Set Mem Attribute to %a, ScratchSize = %x%a",
(MtrrSetting == NULL) ? "Hardware" : "Buffer", *ScratchSize,
(RangeCount <= 1) ? "," : "\n"
@ -2197,7 +2197,7 @@ MtrrSetMemoryAttributesInMtrrSettings (
Ranges[Index].BaseAddress, Ranges[Index].BaseAddress + Ranges[Index].Length
));
}
);
DEBUG_CODE_END ();
//
// 1. Validate the parameters.
@ -2715,7 +2715,7 @@ MtrrDebugPrintAllMtrrsWorker (
IN MTRR_SETTINGS *MtrrSetting
)
{
DEBUG_CODE (
DEBUG_CODE_BEGIN ();
MTRR_SETTINGS LocalMtrrs;
MTRR_SETTINGS *Mtrrs;
UINTN Index;
@ -2799,7 +2799,7 @@ MtrrDebugPrintAllMtrrsWorker (
Ranges[Index].BaseAddress, Ranges[Index].BaseAddress + Ranges[Index].Length - 1
));
}
);
DEBUG_CODE_END ();
}
/**

View File

@ -636,7 +636,7 @@ AnalysisProcessorFeatures (
//
// Dump the last CPU feature list
//
DEBUG_CODE (
DEBUG_CODE_BEGIN ();
DEBUG ((DEBUG_INFO, "Last CPU features list...\n"));
Entry = GetFirstNode (&CpuFeaturesData->FeatureList);
while (!IsNull (&CpuFeaturesData->FeatureList, Entry)) {
@ -659,7 +659,7 @@ AnalysisProcessorFeatures (
DumpCpuFeatureMask (PcdGetPtr (PcdCpuFeaturesSetting), CpuFeaturesData->BitMaskSize);
DEBUG ((DEBUG_INFO, "Final PcdCpuFeaturesSetting:\n"));
DumpCpuFeatureMask (CpuFeaturesData->SettingPcd, CpuFeaturesData->BitMaskSize);
);
DEBUG_CODE_END ();
//
// Save PCDs and display CPU PCDs
@ -1190,4 +1190,3 @@ CpuFeaturesDetect (
AnalysisProcessorFeatures (CpuFeaturesData->NumberOfCpus);
}

View File

@ -597,12 +597,12 @@ PiCpuSmmEntry (
// If support CPU hot plug, PcdCpuSmmEnableBspElection should be set to TRUE.
// A constant BSP index makes no sense because it may be hot removed.
//
DEBUG_CODE (
DEBUG_CODE_BEGIN ();
if (FeaturePcdGet (PcdCpuHotPlugSupport)) {
ASSERT (FeaturePcdGet (PcdCpuSmmEnableBspElection));
}
);
DEBUG_CODE_END ();
//
// Save the PcdCpuSmmCodeAccessCheckEnable value into a global variable.