mirror of https://github.com/acidanthera/audk.git
UefiCpuPkg/MpInitLib: Fill MP_CPU_EXCHANGE_INFO fields
FillExchangeInfoData() is used to fill MP_CPU_EXCHANGE_INFO date exchanged between C code and assembly code of AP reset vector. v5: 1. Reference ApWakeupFunction instead of ApCFunction. Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> Tested-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Michael Kinney <michael.d.kinney@intel.com>
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@ -16,6 +16,47 @@
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EFI_GUID mCpuInitMpLibHobGuid = CPU_INIT_MP_LIB_HOB_GUID;
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/**
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The function will check if BSP Execute Disable is enabled.
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DxeIpl may have enabled Execute Disable for BSP,
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APs need to get the status and sync up the settings.
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@retval TRUE BSP Execute Disable is enabled.
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@retval FALSE BSP Execute Disable is not enabled.
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**/
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BOOLEAN
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IsBspExecuteDisableEnabled (
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VOID
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)
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{
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UINT32 Eax;
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CPUID_EXTENDED_CPU_SIG_EDX Edx;
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MSR_IA32_EFER_REGISTER EferMsr;
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BOOLEAN Enabled;
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Enabled = FALSE;
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AsmCpuid (CPUID_EXTENDED_FUNCTION, &Eax, NULL, NULL, NULL);
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if (Eax >= CPUID_EXTENDED_CPU_SIG) {
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AsmCpuid (CPUID_EXTENDED_CPU_SIG, NULL, NULL, NULL, &Edx.Uint32);
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//
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// CPUID 0x80000001
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// Bit 20: Execute Disable Bit available.
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//
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if (Edx.Bits.NX != 0) {
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EferMsr.Uint64 = AsmReadMsr64 (MSR_IA32_EFER);
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//
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// MSR 0xC0000080
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// Bit 11: Execute Disable Bit enable.
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//
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if (EferMsr.Bits.NXE != 0) {
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Enabled = TRUE;
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}
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}
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}
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return Enabled;
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}
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/**
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Get the Application Processors state.
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@ -406,6 +447,44 @@ ApWakeupFunction (
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}
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}
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/**
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This function will fill the exchange info structure.
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@param[in] CpuMpData Pointer to CPU MP Data
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**/
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VOID
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FillExchangeInfoData (
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IN CPU_MP_DATA *CpuMpData
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)
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{
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volatile MP_CPU_EXCHANGE_INFO *ExchangeInfo;
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ExchangeInfo = CpuMpData->MpCpuExchangeInfo;
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ExchangeInfo->Lock = 0;
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ExchangeInfo->StackStart = CpuMpData->Buffer;
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ExchangeInfo->StackSize = CpuMpData->CpuApStackSize;
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ExchangeInfo->BufferStart = CpuMpData->WakeupBuffer;
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ExchangeInfo->ModeOffset = CpuMpData->AddressMap.ModeEntryOffset;
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ExchangeInfo->CodeSegment = AsmReadCs ();
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ExchangeInfo->DataSegment = AsmReadDs ();
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ExchangeInfo->Cr3 = AsmReadCr3 ();
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ExchangeInfo->CFunction = (UINTN) ApWakeupFunction;
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ExchangeInfo->NumApsExecuting = 0;
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ExchangeInfo->CpuMpData = CpuMpData;
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ExchangeInfo->EnableExecuteDisable = IsBspExecuteDisableEnabled ();
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//
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// Get the BSP's data of GDT and IDT
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//
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AsmReadGdtr ((IA32_DESCRIPTOR *) &ExchangeInfo->GdtrProfile);
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AsmReadIdtr ((IA32_DESCRIPTOR *) &ExchangeInfo->IdtrProfile);
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}
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/**
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MP Initialize Library initialization.
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