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ArmPkg/GenericWatchdogDxe: Declare MMIO PCDs as UINT64 

PcdGenericWatchdogControlBase & PcdGenericWatchdogRefreshBase
are declared as UINT32 values in ArmPkg.dec, but for platforms
with addresses in the memory range above 4GB this causes build
error F000: Too large PCD value for datum type [UINT32]
of PCD gArmTokenSpaceGuid.PcdGenericWatchdogControlBase

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Alexei Fedorov <alexei.fedorov@arm.com>
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=361
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
This commit is contained in:
Alexei 2017-02-06 19:05:54 +00:00 committed by Ard Biesheuvel
parent 8a399fab0a
commit 7c609a144b
2 changed files with 8 additions and 8 deletions
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6
ArmPkg/ArmPkg.dec
View File

@ -2,7 +2,7 @@
# ARM processor package. # ARM processor package.
# #
# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR> # Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
# Copyright (c) 2011 - 2015, ARM Limited. All rights reserved. # Copyright (c) 2011 - 2017, ARM Limited. All rights reserved.
# #
# This program and the accompanying materials # This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License # are licensed and made available under the terms and conditions of the BSD License
@ -252,8 +252,8 @@
# ARM Generic Watchdog # ARM Generic Watchdog
# #
gArmTokenSpaceGuid.PcdGenericWatchdogControlBase|0x2A440000|UINT32|0x00000007 gArmTokenSpaceGuid.PcdGenericWatchdogControlBase|0x2A440000|UINT64|0x00000007
gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase|0x2A450000|UINT32|0x00000008 gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase|0x2A450000|UINT64|0x00000008
gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum|93|UINT32|0x00000009 gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum|93|UINT32|0x00000009
# #

10
ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdog.h
View File

@ -1,6 +1,6 @@
/** @file /** @file
* *
* Copyright (c) 2013-2014, ARM Limited. All rights reserved. * Copyright (c) 2013-2017, ARM Limited. All rights reserved.
* *
* This program and the accompanying materials * This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD * are licensed and made available under the terms and conditions of the BSD
@ -15,12 +15,12 @@
#define __GENERIC_WATCHDOG_H__ #define __GENERIC_WATCHDOG_H__
// Refresh Frame: // Refresh Frame:
#define GENERIC_WDOG_REFRESH_REG ((UINT32)FixedPcdGet32 (PcdGenericWatchdogRefreshBase) + 0x000) #define GENERIC_WDOG_REFRESH_REG ((UINTN)FixedPcdGet64 (PcdGenericWatchdogRefreshBase) + 0x000)
// Control Frame: // Control Frame:
#define GENERIC_WDOG_CONTROL_STATUS_REG ((UINT32)FixedPcdGet32 (PcdGenericWatchdogControlBase) + 0x000) #define GENERIC_WDOG_CONTROL_STATUS_REG ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x000)
#define GENERIC_WDOG_OFFSET_REG ((UINT32)FixedPcdGet32 (PcdGenericWatchdogControlBase) + 0x008) #define GENERIC_WDOG_OFFSET_REG ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x008)
#define GENERIC_WDOG_COMPARE_VALUE_REG ((UINT32)FixedPcdGet32 (PcdGenericWatchdogControlBase) + 0x010) #define GENERIC_WDOG_COMPARE_VALUE_REG ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x010)
// Values of bit 0 of the Control/Status Register // Values of bit 0 of the Control/Status Register
#define GENERIC_WDOG_ENABLED 1 #define GENERIC_WDOG_ENABLED 1