mirror of https://github.com/acidanthera/audk.git
OvmfPkg: PciHostBridgeLib: permit access to the full extended config space
By now OVMF makes MdeModulePkg/Bus/Pci/PciHostBridgeDxe go through MMCONFIG (when running on Q35). Enable the driver to address each B/D/F's config space up to and including offset 0xFFF. Cc: Gabriel Somlo <somlo@cmu.edu> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Cc: Micha Zegan <webczat_200@poczta.onet.pl> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Tested-by: Gabriel Somlo <somlo@cmu.edu> Tested-by: Micha Zegan <webczat_200@poczta.onet.pl>
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@ -16,6 +16,7 @@
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#include <PiDxe.h>
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#include <PiDxe.h>
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#include <IndustryStandard/Pci.h>
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#include <IndustryStandard/Pci.h>
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#include <IndustryStandard/Q35MchIch9.h>
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#include <Protocol/PciHostBridgeResourceAllocation.h>
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#include <Protocol/PciHostBridgeResourceAllocation.h>
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#include <Protocol/PciRootBridgeIo.h>
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#include <Protocol/PciRootBridgeIo.h>
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@ -139,7 +140,8 @@ InitRootBridge (
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RootBus->Mem.Limit = PcdGet64 (PcdPciMmio32Base) +
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RootBus->Mem.Limit = PcdGet64 (PcdPciMmio32Base) +
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(PcdGet64 (PcdPciMmio32Size) - 1);
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(PcdGet64 (PcdPciMmio32Size) - 1);
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RootBus->NoExtendedConfigSpace = TRUE;
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RootBus->NoExtendedConfigSpace = (PcdGet16 (PcdOvmfHostBridgePciDevId) !=
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INTEL_Q35_MCH_DEVICE_ID);
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DevicePath = AllocateCopyPool (sizeof mRootBridgeDevicePathTemplate,
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DevicePath = AllocateCopyPool (sizeof mRootBridgeDevicePathTemplate,
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&mRootBridgeDevicePathTemplate);
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&mRootBridgeDevicePathTemplate);
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@ -51,3 +51,4 @@
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gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize
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gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize
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gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base
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gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base
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gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size
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gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId
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