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ArmPkg: apply Cortex-A57 errata 

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leo Duran <leo.duran@amd.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
This commit is contained in:
Leendert van Doorn 2016-03-24 15:30:05 -05:00 committed by Ard Biesheuvel
parent da6ae66641
commit 7e5a6e394c
1 changed files with 6 additions and 3 deletions
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9
ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.c
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@ -40,12 +40,15 @@ ArmCpuSetup (
} }
// //
// If CPU is CortexA57 r0p0 apply Errata: 806969 // If CPU is CortexA57 r0p0 apply Errata workarounds
// //
if ((ArmReadMidr () & ((ARM_CPU_TYPE_MASK << 4) | ARM_CPU_REV_MASK)) == if ((ArmReadMidr () & ((ARM_CPU_TYPE_MASK << 4) | ARM_CPU_REV_MASK)) ==
((ARM_CPU_TYPE_A57 << 4) | ARM_CPU_REV(0,0))) { ((ARM_CPU_TYPE_A57 << 4) | ARM_CPU_REV(0,0))) {
// DisableLoadStoreWB
ArmSetCpuActlrBit (1ULL << 49); // Errata 806969: DisableLoadStoreWB (1ULL << 49)
// Errata 813420: Execute Data Cache clean as Data Cache clean/invalidate (1ULL << 44)
// Errata 814670: disable DMB nullification (1ULL << 58)
ArmSetCpuActlrBit ( (1ULL << 49) | (1ULL << 44) | (1ULL << 58) );
} }
} }